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@@ -60,7 +60,6 @@ struct aic32x4_rate_divs {
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struct aic32x4_priv {
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u32 sysclk;
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- s32 master;
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u8 page_no;
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void *control_data;
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u32 power_cfg;
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@@ -369,7 +368,6 @@ static int aic32x4_set_dai_sysclk(struct snd_soc_dai *codec_dai,
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static int aic32x4_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
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{
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struct snd_soc_codec *codec = codec_dai->codec;
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- struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec);
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u8 iface_reg_1;
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u8 iface_reg_2;
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u8 iface_reg_3;
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@@ -384,11 +382,9 @@ static int aic32x4_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
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/* set master/slave audio interface */
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBM_CFM:
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- aic32x4->master = 1;
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iface_reg_1 |= AIC32X4_BCLKMASTER | AIC32X4_WCLKMASTER;
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break;
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case SND_SOC_DAIFMT_CBS_CFS:
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- aic32x4->master = 0;
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break;
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default:
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printk(KERN_ERR "aic32x4: invalid DAI master/slave interface\n");
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@@ -526,64 +522,58 @@ static int aic32x4_mute(struct snd_soc_dai *dai, int mute)
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static int aic32x4_set_bias_level(struct snd_soc_codec *codec,
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enum snd_soc_bias_level level)
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{
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- struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec);
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-
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switch (level) {
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case SND_SOC_BIAS_ON:
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- if (aic32x4->master) {
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- /* Switch on PLL */
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- snd_soc_update_bits(codec, AIC32X4_PLLPR,
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- AIC32X4_PLLEN, AIC32X4_PLLEN);
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-
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- /* Switch on NDAC Divider */
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- snd_soc_update_bits(codec, AIC32X4_NDAC,
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- AIC32X4_NDACEN, AIC32X4_NDACEN);
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-
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- /* Switch on MDAC Divider */
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- snd_soc_update_bits(codec, AIC32X4_MDAC,
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- AIC32X4_MDACEN, AIC32X4_MDACEN);
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-
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- /* Switch on NADC Divider */
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- snd_soc_update_bits(codec, AIC32X4_NADC,
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- AIC32X4_NADCEN, AIC32X4_NADCEN);
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-
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- /* Switch on MADC Divider */
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- snd_soc_update_bits(codec, AIC32X4_MADC,
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- AIC32X4_MADCEN, AIC32X4_MADCEN);
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-
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- /* Switch on BCLK_N Divider */
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- snd_soc_update_bits(codec, AIC32X4_BCLKN,
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- AIC32X4_BCLKEN, AIC32X4_BCLKEN);
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- }
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+ /* Switch on PLL */
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+ snd_soc_update_bits(codec, AIC32X4_PLLPR,
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+ AIC32X4_PLLEN, AIC32X4_PLLEN);
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+
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+ /* Switch on NDAC Divider */
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+ snd_soc_update_bits(codec, AIC32X4_NDAC,
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+ AIC32X4_NDACEN, AIC32X4_NDACEN);
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+
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+ /* Switch on MDAC Divider */
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+ snd_soc_update_bits(codec, AIC32X4_MDAC,
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+ AIC32X4_MDACEN, AIC32X4_MDACEN);
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+
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+ /* Switch on NADC Divider */
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+ snd_soc_update_bits(codec, AIC32X4_NADC,
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+ AIC32X4_NADCEN, AIC32X4_NADCEN);
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+
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+ /* Switch on MADC Divider */
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+ snd_soc_update_bits(codec, AIC32X4_MADC,
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+ AIC32X4_MADCEN, AIC32X4_MADCEN);
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+
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+ /* Switch on BCLK_N Divider */
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+ snd_soc_update_bits(codec, AIC32X4_BCLKN,
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+ AIC32X4_BCLKEN, AIC32X4_BCLKEN);
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break;
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case SND_SOC_BIAS_PREPARE:
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break;
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case SND_SOC_BIAS_STANDBY:
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- if (aic32x4->master) {
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- /* Switch off PLL */
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- snd_soc_update_bits(codec, AIC32X4_PLLPR,
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- AIC32X4_PLLEN, 0);
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-
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- /* Switch off NDAC Divider */
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- snd_soc_update_bits(codec, AIC32X4_NDAC,
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- AIC32X4_NDACEN, 0);
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-
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- /* Switch off MDAC Divider */
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- snd_soc_update_bits(codec, AIC32X4_MDAC,
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- AIC32X4_MDACEN, 0);
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-
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- /* Switch off NADC Divider */
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- snd_soc_update_bits(codec, AIC32X4_NADC,
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- AIC32X4_NADCEN, 0);
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-
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- /* Switch off MADC Divider */
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- snd_soc_update_bits(codec, AIC32X4_MADC,
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- AIC32X4_MADCEN, 0);
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-
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- /* Switch off BCLK_N Divider */
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- snd_soc_update_bits(codec, AIC32X4_BCLKN,
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- AIC32X4_BCLKEN, 0);
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- }
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+ /* Switch off PLL */
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+ snd_soc_update_bits(codec, AIC32X4_PLLPR,
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+ AIC32X4_PLLEN, 0);
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+
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+ /* Switch off NDAC Divider */
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+ snd_soc_update_bits(codec, AIC32X4_NDAC,
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+ AIC32X4_NDACEN, 0);
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+
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+ /* Switch off MDAC Divider */
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+ snd_soc_update_bits(codec, AIC32X4_MDAC,
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+ AIC32X4_MDACEN, 0);
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+
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+ /* Switch off NADC Divider */
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+ snd_soc_update_bits(codec, AIC32X4_NADC,
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+ AIC32X4_NADCEN, 0);
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+
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+ /* Switch off MADC Divider */
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+ snd_soc_update_bits(codec, AIC32X4_MADC,
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+ AIC32X4_MADCEN, 0);
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+
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+ /* Switch off BCLK_N Divider */
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+ snd_soc_update_bits(codec, AIC32X4_BCLKN,
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+ AIC32X4_BCLKEN, 0);
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break;
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case SND_SOC_BIAS_OFF:
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break;
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@@ -651,9 +641,11 @@ static int aic32x4_probe(struct snd_soc_codec *codec)
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if (aic32x4->power_cfg & AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE) {
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snd_soc_write(codec, AIC32X4_PWRCFG, AIC32X4_AVDDWEAKDISABLE);
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}
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- if (aic32x4->power_cfg & AIC32X4_PWR_AIC32X4_LDO_ENABLE) {
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- snd_soc_write(codec, AIC32X4_LDOCTL, AIC32X4_LDOCTLEN);
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- }
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+
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+ tmp_reg = (aic32x4->power_cfg & AIC32X4_PWR_AIC32X4_LDO_ENABLE) ?
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+ AIC32X4_LDOCTLEN : 0;
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+ snd_soc_write(codec, AIC32X4_LDOCTL, tmp_reg);
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+
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tmp_reg = snd_soc_read(codec, AIC32X4_CMMODE);
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if (aic32x4->power_cfg & AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36) {
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tmp_reg |= AIC32X4_LDOIN_18_36;
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