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@@ -110,6 +110,11 @@
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#define ECC1RESULTSIZE 0x1
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#define ECCCLEAR 0x100
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#define ECC1 0x1
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+#define PREFETCH_FIFOTHRESHOLD_MAX 0x40
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+#define PREFETCH_FIFOTHRESHOLD(val) ((val) << 8)
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+#define PREFETCH_STATUS_COUNT(val) (val & 0x00003fff)
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+#define PREFETCH_STATUS_FIFO_CNT(val) ((val >> 24) & 0x7F)
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+#define STATUS_BUFF_EMPTY 0x00000001
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/* oob info generated runtime depending on ecc algorithm and layout selected */
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static struct nand_ecclayout omap_oobinfo;
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@@ -269,7 +274,7 @@ static void omap_write_buf8(struct mtd_info *mtd, const u_char *buf, int len)
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/* wait until buffer is available for write */
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do {
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status = readl(info->reg.gpmc_status) &
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- GPMC_STATUS_BUFF_EMPTY;
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+ STATUS_BUFF_EMPTY;
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} while (!status);
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}
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}
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@@ -307,7 +312,7 @@ static void omap_write_buf16(struct mtd_info *mtd, const u_char * buf, int len)
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/* wait until buffer is available for write */
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do {
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status = readl(info->reg.gpmc_status) &
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- GPMC_STATUS_BUFF_EMPTY;
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+ STATUS_BUFF_EMPTY;
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} while (!status);
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}
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}
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@@ -348,7 +353,7 @@ static void omap_read_buf_pref(struct mtd_info *mtd, u_char *buf, int len)
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} else {
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do {
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r_count = readl(info->reg.gpmc_prefetch_status);
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- r_count = GPMC_PREFETCH_STATUS_FIFO_CNT(r_count);
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+ r_count = PREFETCH_STATUS_FIFO_CNT(r_count);
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r_count = r_count >> 2;
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ioread32_rep(info->nand.IO_ADDR_R, p, r_count);
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p += r_count;
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@@ -395,7 +400,7 @@ static void omap_write_buf_pref(struct mtd_info *mtd,
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} else {
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while (len) {
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w_count = readl(info->reg.gpmc_prefetch_status);
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- w_count = GPMC_PREFETCH_STATUS_FIFO_CNT(w_count);
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+ w_count = PREFETCH_STATUS_FIFO_CNT(w_count);
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w_count = w_count >> 1;
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for (i = 0; (i < w_count) && len; i++, len -= 2)
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iowrite16(*p++, info->nand.IO_ADDR_W);
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@@ -407,7 +412,7 @@ static void omap_write_buf_pref(struct mtd_info *mtd,
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do {
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cpu_relax();
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val = readl(info->reg.gpmc_prefetch_status);
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- val = GPMC_PREFETCH_STATUS_COUNT(val);
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+ val = PREFETCH_STATUS_COUNT(val);
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} while (val && (tim++ < limit));
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/* disable and stop the PFPW engine */
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@@ -493,7 +498,7 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
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do {
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cpu_relax();
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val = readl(info->reg.gpmc_prefetch_status);
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- val = GPMC_PREFETCH_STATUS_COUNT(val);
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+ val = PREFETCH_STATUS_COUNT(val);
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} while (val && (tim++ < limit));
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/* disable and stop the PFPW engine */
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@@ -556,7 +561,7 @@ static irqreturn_t omap_nand_irq(int this_irq, void *dev)
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u32 bytes;
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bytes = readl(info->reg.gpmc_prefetch_status);
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- bytes = GPMC_PREFETCH_STATUS_FIFO_CNT(bytes);
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+ bytes = PREFETCH_STATUS_FIFO_CNT(bytes);
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bytes = bytes & 0xFFFC; /* io in multiple of 4 bytes */
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if (info->iomode == OMAP_NAND_IO_WRITE) { /* checks for write io */
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if (this_irq == info->gpmc_irq_count)
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@@ -682,7 +687,7 @@ static void omap_write_buf_irq_pref(struct mtd_info *mtd,
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limit = (loops_per_jiffy * msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS));
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do {
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val = readl(info->reg.gpmc_prefetch_status);
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- val = GPMC_PREFETCH_STATUS_COUNT(val);
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+ val = PREFETCH_STATUS_COUNT(val);
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cpu_relax();
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} while (val && (tim++ < limit));
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