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@@ -26,7 +26,13 @@
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serial1 = &serial1;
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pci0 = &pci0;
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pci1 = &pci1;
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- rapidio0 = &rapidio0;
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+/*
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+ * Only one of Rapid IO or PCI can be present due to HW limitations and
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+ * due to the fact that the 2 now share address space in the new memory
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+ * map. The most likely case is that we have PCI, so comment out the
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+ * rapidio node. Leave it here for reference.
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+ */
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+ /* rapidio0 = &rapidio0; */
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};
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cpus {
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@@ -62,18 +68,17 @@
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reg = <0x00000000 0x40000000>; // 1G at 0x0
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};
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- localbus@f8005000 {
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+ localbus@ffe05000 {
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#address-cells = <2>;
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#size-cells = <1>;
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compatible = "fsl,mpc8641-localbus", "simple-bus";
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- reg = <0xf8005000 0x1000>;
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+ reg = <0xffe05000 0x1000>;
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interrupts = <19 2>;
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interrupt-parent = <&mpic>;
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- ranges = <0 0 0xff800000 0x00800000
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- 1 0 0xfe000000 0x01000000
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- 2 0 0xf8200000 0x00100000
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- 3 0 0xf8100000 0x00100000>;
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+ ranges = <0 0 0xef800000 0x00800000
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+ 2 0 0xffdf8000 0x00008000
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+ 3 0 0xffdf0000 0x00008000>;
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flash@0,0 {
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compatible = "cfi-flash";
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@@ -103,13 +108,13 @@
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};
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};
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- soc8641@f8000000 {
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+ soc8641@ffe00000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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compatible = "simple-bus";
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- ranges = <0x00000000 0xf8000000 0x00100000>;
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- reg = <0xf8000000 0x00001000>; // CCSRBAR
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+ ranges = <0x00000000 0xffe00000 0x00100000>;
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+ reg = <0xffe00000 0x00001000>; // CCSRBAR
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bus-frequency = <0>;
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i2c@3000 {
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@@ -295,17 +300,17 @@
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};
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};
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- pci0: pcie@f8008000 {
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+ pci0: pcie@ffe08000 {
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cell-index = <0>;
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compatible = "fsl,mpc8641-pcie";
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device_type = "pci";
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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- reg = <0xf8008000 0x1000>;
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+ reg = <0xffe08000 0x1000>;
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bus-range = <0x0 0xff>;
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ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
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- 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
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+ 0x01000000 0x0 0x00000000 0xffc00000 0x0 0x00010000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <24 2>;
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@@ -436,7 +441,7 @@
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0x01000000 0x0 0x00000000
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0x01000000 0x0 0x00000000
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- 0x0 0x00100000>;
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+ 0x0 0x00010000>;
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uli1575@0 {
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reg = <0 0 0 0 0>;
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#size-cells = <2>;
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@@ -446,7 +451,7 @@
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0x0 0x20000000
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0x01000000 0x0 0x00000000
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0x01000000 0x0 0x00000000
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- 0x0 0x00100000>;
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+ 0x0 0x00010000>;
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isa@1e {
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device_type = "isa";
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#interrupt-cells = <2>;
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@@ -504,17 +509,17 @@
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};
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- pci1: pcie@f8009000 {
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+ pci1: pcie@ffe09000 {
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cell-index = <1>;
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compatible = "fsl,mpc8641-pcie";
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device_type = "pci";
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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- reg = <0xf8009000 0x1000>;
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+ reg = <0xffe09000 0x1000>;
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bus-range = <0 0xff>;
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ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
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- 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
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+ 0x01000000 0x0 0x00000000 0xffc10000 0x0 0x00010000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <25 2>;
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@@ -537,18 +542,21 @@
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0x01000000 0x0 0x00000000
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0x01000000 0x0 0x00000000
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- 0x0 0x00100000>;
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+ 0x0 0x00010000>;
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};
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};
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- rapidio0: rapidio@f80c0000 {
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+/*
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+ rapidio0: rapidio@ffec0000 {
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#address-cells = <2>;
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#size-cells = <2>;
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compatible = "fsl,rapidio-delta";
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- reg = <0xf80c0000 0x20000>;
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- ranges = <0 0 0xc0000000 0 0x20000000>;
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+ reg = <0xffec0000 0x20000>;
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+ ranges = <0 0 0x80000000 0 0x20000000>;
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interrupt-parent = <&mpic>;
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- /* err_irq bell_outb_irq bell_inb_irq
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- msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq */
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+ // err_irq bell_outb_irq bell_inb_irq
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+ // msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq
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interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>;
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};
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+*/
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+
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};
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