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@@ -275,6 +275,15 @@ static struct clksrc_clk clk_hclk = {
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.reg_div = { .reg = S5P_CLK_DIV0, .shift = 8, .size = 4 },
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};
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+static struct clksrc_clk clk_pclk = {
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+ .clk = {
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+ .name = "clk_pclk",
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+ .id = -1,
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+ .parent = &clk_hclk.clk,
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+ },
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+ .reg_div = { .reg = S5P_CLK_DIV0, .shift = 12, .size = 4 },
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+};
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+
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int s5p6440_clk48m_ctrl(struct clk *clk, int enable)
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{
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unsigned long flags;
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@@ -590,6 +599,7 @@ static struct clksrc_clk *sysclks[] = {
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&clk_dout_mpll,
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&clk_armclk,
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&clk_hclk,
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+ &clk_pclk,
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};
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void __init_or_cpufreq s5p6440_setup_clocks(void)
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@@ -639,7 +649,7 @@ void __init_or_cpufreq s5p6440_setup_clocks(void)
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fclk = clk_get_rate(&clk_armclk.clk);
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hclk = clk_get_rate(&clk_hclk.clk);
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- pclk = hclk / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK);
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+ pclk = clk_get_rate(&clk_pclk.clk);
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if (__raw_readl(S5P_OTHERS) & S5P_OTHERS_HCLK_LOW_SEL_MPLL) {
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/* Asynchronous mode */
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