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@@ -2338,6 +2338,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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struct ath9k_channel *curchan = ah->curchan;
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u32 saveDefAntenna;
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u32 macStaId1;
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+ u64 tsf = 0;
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int i, rx_chainmask, r;
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ah->extprotspacing = sc->ht_extprotspacing;
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@@ -2372,6 +2373,10 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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macStaId1 = REG_READ(ah, AR_STA_ID1) & AR_STA_ID1_BASE_RATE_11B;
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+ /* For chips on which RTC reset is done, save TSF before it gets cleared */
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+ if (AR_SREV_9280(ah) && ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))
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+ tsf = ath9k_hw_gettsf64(ah);
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+
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saveLedState = REG_READ(ah, AR_CFG_LED) &
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(AR_CFG_LED_ASSOC_CTL | AR_CFG_LED_MODE_SEL |
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AR_CFG_LED_BLINK_THRESH_SEL | AR_CFG_LED_BLINK_SLOW);
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@@ -2398,6 +2403,10 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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udelay(50);
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}
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+ /* Restore TSF */
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+ if (tsf && AR_SREV_9280(ah) && ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))
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+ ath9k_hw_settsf64(ah, tsf);
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+
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if (AR_SREV_9280_10_OR_LATER(ah))
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REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, AR_GPIO_JTAG_DISABLE);
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