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@@ -1051,6 +1051,14 @@ mac_reset_top:
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*/
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hw->mac.cached_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
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autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
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+
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+ /* Enable link if disabled in NVM */
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+ if (autoc2 & IXGBE_AUTOC2_LINK_DISABLE_MASK) {
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+ autoc2 &= ~IXGBE_AUTOC2_LINK_DISABLE_MASK;
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+ IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2);
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+ IXGBE_WRITE_FLUSH(hw);
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+ }
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+
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if (hw->mac.orig_link_settings_stored == false) {
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hw->mac.orig_autoc = hw->mac.cached_autoc;
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hw->mac.orig_autoc2 = autoc2;
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@@ -2186,8 +2194,17 @@ static s32 ixgbe_read_eeprom_82599(struct ixgbe_hw *hw,
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**/
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s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw)
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{
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- s32 i, autoc_reg, ret_val;
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- s32 anlp1_reg = 0;
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+ s32 ret_val;
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+ u32 anlp1_reg = 0;
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+ u32 i, autoc_reg, autoc2_reg;
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+
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+ /* Enable link if disabled in NVM */
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+ autoc2_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
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+ if (autoc2_reg & IXGBE_AUTOC2_LINK_DISABLE_MASK) {
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+ autoc2_reg &= ~IXGBE_AUTOC2_LINK_DISABLE_MASK;
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+ IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2_reg);
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+ IXGBE_WRITE_FLUSH(hw);
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+ }
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autoc_reg = hw->mac.cached_autoc;
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autoc_reg |= IXGBE_AUTOC_AN_RESTART;
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