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@@ -40,13 +40,13 @@
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#include "iwl-4965.h"
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#include "iwl-sta.h"
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-void il4965_check_abort_status(struct il_priv *priv,
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+void il4965_check_abort_status(struct il_priv *il,
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u8 frame_count, u32 status)
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{
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if (frame_count == 1 && status == TX_STATUS_FAIL_RFKILL_FLUSH) {
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- IL_ERR(priv, "Tx flush command to flush out all frames\n");
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- if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
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- queue_work(priv->workqueue, &priv->tx_flush);
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+ IL_ERR(il, "Tx flush command to flush out all frames\n");
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+ if (!test_bit(STATUS_EXIT_PENDING, &il->status))
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+ queue_work(il->workqueue, &il->tx_flush);
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}
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}
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@@ -59,7 +59,7 @@ struct il_mod_params il4965_mod_params = {
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/* the rest are 0 by default */
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};
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-void il4965_rx_queue_reset(struct il_priv *priv, struct il_rx_queue *rxq)
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+void il4965_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
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{
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unsigned long flags;
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int i;
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@@ -71,10 +71,10 @@ void il4965_rx_queue_reset(struct il_priv *priv, struct il_rx_queue *rxq)
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/* In the reset function, these buffers may have been allocated
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* to an SKB, so we need to unmap and free potential storage */
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if (rxq->pool[i].page != NULL) {
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- pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
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- PAGE_SIZE << priv->hw_params.rx_page_order,
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+ pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
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+ PAGE_SIZE << il->hw_params.rx_page_order,
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PCI_DMA_FROMDEVICE);
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- __il_free_pages(priv, rxq->pool[i].page);
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+ __il_free_pages(il, rxq->pool[i].page);
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rxq->pool[i].page = NULL;
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}
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list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
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@@ -91,29 +91,29 @@ void il4965_rx_queue_reset(struct il_priv *priv, struct il_rx_queue *rxq)
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spin_unlock_irqrestore(&rxq->lock, flags);
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}
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-int il4965_rx_init(struct il_priv *priv, struct il_rx_queue *rxq)
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+int il4965_rx_init(struct il_priv *il, struct il_rx_queue *rxq)
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{
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u32 rb_size;
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const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
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u32 rb_timeout = 0;
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- if (priv->cfg->mod_params->amsdu_size_8K)
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+ if (il->cfg->mod_params->amsdu_size_8K)
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rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
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else
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rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
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/* Stop Rx DMA */
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- il_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
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+ il_write_direct32(il, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
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/* Reset driver's Rx queue write index */
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- il_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
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+ il_write_direct32(il, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
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/* Tell device where to find RBD circular buffer in DRAM */
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- il_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
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+ il_write_direct32(il, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
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(u32)(rxq->bd_dma >> 8));
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/* Tell device where in DRAM to update its Rx status */
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- il_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
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+ il_write_direct32(il, FH_RSCSR_CHNL0_STTS_WPTR_REG,
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rxq->rb_stts_dma >> 4);
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/* Enable Rx DMA
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@@ -122,7 +122,7 @@ int il4965_rx_init(struct il_priv *priv, struct il_rx_queue *rxq)
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* RB timeout 0x10
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* 256 RBDs
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*/
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- il_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
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+ il_write_direct32(il, FH_MEM_RCSR_CHNL0_CONFIG_REG,
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FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
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FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
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FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
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@@ -131,77 +131,77 @@ int il4965_rx_init(struct il_priv *priv, struct il_rx_queue *rxq)
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(rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
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/* Set interrupt coalescing timer to default (2048 usecs) */
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- il_write8(priv, CSR_INT_COALESCING, IL_HOST_INT_TIMEOUT_DEF);
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+ il_write8(il, CSR_INT_COALESCING, IL_HOST_INT_TIMEOUT_DEF);
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return 0;
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}
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-static void il4965_set_pwr_vmain(struct il_priv *priv)
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+static void il4965_set_pwr_vmain(struct il_priv *il)
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{
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/*
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* (for documentation purposes)
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* to set power to V_AUX, do:
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- if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
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- il_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
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+ if (pci_pme_capable(il->pci_dev, PCI_D3cold))
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+ il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
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APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
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~APMG_PS_CTRL_MSK_PWR_SRC);
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*/
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- il_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
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+ il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
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APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
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~APMG_PS_CTRL_MSK_PWR_SRC);
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}
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-int il4965_hw_nic_init(struct il_priv *priv)
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+int il4965_hw_nic_init(struct il_priv *il)
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{
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unsigned long flags;
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- struct il_rx_queue *rxq = &priv->rxq;
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+ struct il_rx_queue *rxq = &il->rxq;
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int ret;
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/* nic_init */
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- spin_lock_irqsave(&priv->lock, flags);
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- priv->cfg->ops->lib->apm_ops.init(priv);
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+ spin_lock_irqsave(&il->lock, flags);
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+ il->cfg->ops->lib->apm_ops.init(il);
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/* Set interrupt coalescing calibration timer to default (512 usecs) */
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- il_write8(priv, CSR_INT_COALESCING, IL_HOST_INT_CALIB_TIMEOUT_DEF);
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+ il_write8(il, CSR_INT_COALESCING, IL_HOST_INT_CALIB_TIMEOUT_DEF);
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- spin_unlock_irqrestore(&priv->lock, flags);
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+ spin_unlock_irqrestore(&il->lock, flags);
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- il4965_set_pwr_vmain(priv);
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+ il4965_set_pwr_vmain(il);
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- priv->cfg->ops->lib->apm_ops.config(priv);
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+ il->cfg->ops->lib->apm_ops.config(il);
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/* Allocate the RX queue, or reset if it is already allocated */
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if (!rxq->bd) {
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- ret = il_rx_queue_alloc(priv);
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+ ret = il_rx_queue_alloc(il);
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if (ret) {
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- IL_ERR(priv, "Unable to initialize Rx queue\n");
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+ IL_ERR(il, "Unable to initialize Rx queue\n");
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return -ENOMEM;
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}
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} else
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- il4965_rx_queue_reset(priv, rxq);
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+ il4965_rx_queue_reset(il, rxq);
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- il4965_rx_replenish(priv);
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+ il4965_rx_replenish(il);
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- il4965_rx_init(priv, rxq);
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+ il4965_rx_init(il, rxq);
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- spin_lock_irqsave(&priv->lock, flags);
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+ spin_lock_irqsave(&il->lock, flags);
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rxq->need_update = 1;
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- il_rx_queue_update_write_ptr(priv, rxq);
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+ il_rx_queue_update_write_ptr(il, rxq);
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- spin_unlock_irqrestore(&priv->lock, flags);
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+ spin_unlock_irqrestore(&il->lock, flags);
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/* Allocate or reset and init all Tx and Command queues */
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- if (!priv->txq) {
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- ret = il4965_txq_ctx_alloc(priv);
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+ if (!il->txq) {
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+ ret = il4965_txq_ctx_alloc(il);
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if (ret)
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return ret;
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} else
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- il4965_txq_ctx_reset(priv);
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+ il4965_txq_ctx_reset(il);
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- set_bit(STATUS_INIT, &priv->status);
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+ set_bit(STATUS_INIT, &il->status);
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return 0;
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}
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@@ -209,7 +209,7 @@ int il4965_hw_nic_init(struct il_priv *priv)
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/**
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* il4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
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*/
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-static inline __le32 il4965_dma_addr2rbd_ptr(struct il_priv *priv,
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+static inline __le32 il4965_dma_addr2rbd_ptr(struct il_priv *il,
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dma_addr_t dma_addr)
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{
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return cpu_to_le32((u32)(dma_addr >> 8));
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@@ -226,9 +226,9 @@ static inline __le32 il4965_dma_addr2rbd_ptr(struct il_priv *priv,
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* also updates the memory address in the firmware to reference the new
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* target buffer.
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*/
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-void il4965_rx_queue_restock(struct il_priv *priv)
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+void il4965_rx_queue_restock(struct il_priv *il)
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{
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- struct il_rx_queue *rxq = &priv->rxq;
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+ struct il_rx_queue *rxq = &il->rxq;
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struct list_head *element;
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struct il_rx_mem_buffer *rxb;
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unsigned long flags;
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@@ -245,7 +245,7 @@ void il4965_rx_queue_restock(struct il_priv *priv)
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list_del(element);
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/* Point to Rx buffer via next RBD in circular buffer */
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- rxq->bd[rxq->write] = il4965_dma_addr2rbd_ptr(priv,
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+ rxq->bd[rxq->write] = il4965_dma_addr2rbd_ptr(il,
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rxb->page_dma);
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rxq->queue[rxq->write] = rxb;
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rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
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@@ -255,7 +255,7 @@ void il4965_rx_queue_restock(struct il_priv *priv)
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/* If the pre-allocated buffer pool is dropping low, schedule to
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* refill it */
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if (rxq->free_count <= RX_LOW_WATERMARK)
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- queue_work(priv->workqueue, &priv->rx_replenish);
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+ queue_work(il->workqueue, &il->rx_replenish);
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/* If we've added more space for the firmware to place data, tell it.
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@@ -264,7 +264,7 @@ void il4965_rx_queue_restock(struct il_priv *priv)
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spin_lock_irqsave(&rxq->lock, flags);
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rxq->need_update = 1;
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spin_unlock_irqrestore(&rxq->lock, flags);
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- il_rx_queue_update_write_ptr(priv, rxq);
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+ il_rx_queue_update_write_ptr(il, rxq);
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}
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}
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@@ -276,9 +276,9 @@ void il4965_rx_queue_restock(struct il_priv *priv)
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* Also restock the Rx queue via il_rx_queue_restock.
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* This is called as a scheduled work item (except for during initialization)
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*/
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-static void il4965_rx_allocate(struct il_priv *priv, gfp_t priority)
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+static void il4965_rx_allocate(struct il_priv *il, gfp_t priority)
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{
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- struct il_rx_queue *rxq = &priv->rxq;
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+ struct il_rx_queue *rxq = &il->rxq;
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struct list_head *element;
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struct il_rx_mem_buffer *rxb;
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struct page *page;
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@@ -296,20 +296,20 @@ static void il4965_rx_allocate(struct il_priv *priv, gfp_t priority)
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if (rxq->free_count > RX_LOW_WATERMARK)
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gfp_mask |= __GFP_NOWARN;
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- if (priv->hw_params.rx_page_order > 0)
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+ if (il->hw_params.rx_page_order > 0)
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gfp_mask |= __GFP_COMP;
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/* Alloc a new receive buffer */
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- page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
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+ page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
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if (!page) {
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if (net_ratelimit())
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- IL_DEBUG_INFO(priv, "alloc_pages failed, "
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+ IL_DEBUG_INFO(il, "alloc_pages failed, "
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"order: %d\n",
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- priv->hw_params.rx_page_order);
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+ il->hw_params.rx_page_order);
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if ((rxq->free_count <= RX_LOW_WATERMARK) &&
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net_ratelimit())
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- IL_CRIT(priv,
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+ IL_CRIT(il,
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"Failed to alloc_pages with %s. "
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"Only %u free buffers remaining.\n",
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priority == GFP_ATOMIC ?
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@@ -325,7 +325,7 @@ static void il4965_rx_allocate(struct il_priv *priv, gfp_t priority)
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if (list_empty(&rxq->rx_used)) {
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spin_unlock_irqrestore(&rxq->lock, flags);
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- __free_pages(page, priv->hw_params.rx_page_order);
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+ __free_pages(page, il->hw_params.rx_page_order);
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return;
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}
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element = rxq->rx_used.next;
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@@ -337,8 +337,8 @@ static void il4965_rx_allocate(struct il_priv *priv, gfp_t priority)
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BUG_ON(rxb->page);
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rxb->page = page;
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/* Get physical address of the RB */
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- rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
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- PAGE_SIZE << priv->hw_params.rx_page_order,
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+ rxb->page_dma = pci_map_page(il->pci_dev, page, 0,
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+ PAGE_SIZE << il->hw_params.rx_page_order,
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PCI_DMA_FROMDEVICE);
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/* dma address must be no more than 36 bits */
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BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36));
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@@ -349,28 +349,28 @@ static void il4965_rx_allocate(struct il_priv *priv, gfp_t priority)
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list_add_tail(&rxb->list, &rxq->rx_free);
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rxq->free_count++;
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- priv->alloc_rxb_page++;
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+ il->alloc_rxb_page++;
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spin_unlock_irqrestore(&rxq->lock, flags);
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}
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}
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-void il4965_rx_replenish(struct il_priv *priv)
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+void il4965_rx_replenish(struct il_priv *il)
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{
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unsigned long flags;
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- il4965_rx_allocate(priv, GFP_KERNEL);
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+ il4965_rx_allocate(il, GFP_KERNEL);
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- spin_lock_irqsave(&priv->lock, flags);
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- il4965_rx_queue_restock(priv);
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- spin_unlock_irqrestore(&priv->lock, flags);
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+ spin_lock_irqsave(&il->lock, flags);
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+ il4965_rx_queue_restock(il);
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+ spin_unlock_irqrestore(&il->lock, flags);
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}
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-void il4965_rx_replenish_now(struct il_priv *priv)
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+void il4965_rx_replenish_now(struct il_priv *il)
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{
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- il4965_rx_allocate(priv, GFP_ATOMIC);
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+ il4965_rx_allocate(il, GFP_ATOMIC);
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- il4965_rx_queue_restock(priv);
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+ il4965_rx_queue_restock(il);
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}
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/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
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@@ -378,33 +378,33 @@ void il4965_rx_replenish_now(struct il_priv *priv)
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* This free routine walks the list of POOL entries and if SKB is set to
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* non NULL it is unmapped and freed
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*/
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-void il4965_rx_queue_free(struct il_priv *priv, struct il_rx_queue *rxq)
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+void il4965_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
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{
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int i;
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for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
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if (rxq->pool[i].page != NULL) {
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- pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
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- PAGE_SIZE << priv->hw_params.rx_page_order,
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+ pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
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+ PAGE_SIZE << il->hw_params.rx_page_order,
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PCI_DMA_FROMDEVICE);
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- __il_free_pages(priv, rxq->pool[i].page);
|
|
|
+ __il_free_pages(il, rxq->pool[i].page);
|
|
|
rxq->pool[i].page = NULL;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
- dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
|
|
|
+ dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
|
|
|
rxq->bd_dma);
|
|
|
- dma_free_coherent(&priv->pci_dev->dev, sizeof(struct il_rb_status),
|
|
|
+ dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
|
|
|
rxq->rb_stts, rxq->rb_stts_dma);
|
|
|
rxq->bd = NULL;
|
|
|
rxq->rb_stts = NULL;
|
|
|
}
|
|
|
|
|
|
-int il4965_rxq_stop(struct il_priv *priv)
|
|
|
+int il4965_rxq_stop(struct il_priv *il)
|
|
|
{
|
|
|
|
|
|
/* stop Rx DMA */
|
|
|
- il_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
|
|
|
- il_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
|
|
|
+ il_write_direct32(il, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
|
|
|
+ il_poll_direct_bit(il, FH_MEM_RSSR_RX_STATUS_REG,
|
|
|
FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
|
|
|
|
|
|
return 0;
|
|
@@ -431,7 +431,7 @@ int il4965_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
|
|
|
return -1;
|
|
|
}
|
|
|
|
|
|
-static int il4965_calc_rssi(struct il_priv *priv,
|
|
|
+static int il4965_calc_rssi(struct il_priv *il,
|
|
|
struct il_rx_phy_res *rx_resp)
|
|
|
{
|
|
|
/* data from PHY/DSP regarding signal strength, etc.,
|
|
@@ -456,7 +456,7 @@ static int il4965_calc_rssi(struct il_priv *priv,
|
|
|
if (valid_antennae & (1 << i))
|
|
|
max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
|
|
|
|
|
|
- IL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
|
|
|
+ IL_DEBUG_STATS(il, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
|
|
|
ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
|
|
|
max_rssi, agc);
|
|
|
|
|
@@ -466,7 +466,7 @@ static int il4965_calc_rssi(struct il_priv *priv,
|
|
|
}
|
|
|
|
|
|
|
|
|
-static u32 il4965_translate_rx_status(struct il_priv *priv, u32 decrypt_in)
|
|
|
+static u32 il4965_translate_rx_status(struct il_priv *il, u32 decrypt_in)
|
|
|
{
|
|
|
u32 decrypt_out = 0;
|
|
|
|
|
@@ -519,13 +519,13 @@ static u32 il4965_translate_rx_status(struct il_priv *priv, u32 decrypt_in)
|
|
|
break;
|
|
|
}
|
|
|
|
|
|
- IL_DEBUG_RX(priv, "decrypt_in:0x%x decrypt_out = 0x%x\n",
|
|
|
+ IL_DEBUG_RX(il, "decrypt_in:0x%x decrypt_out = 0x%x\n",
|
|
|
decrypt_in, decrypt_out);
|
|
|
|
|
|
return decrypt_out;
|
|
|
}
|
|
|
|
|
|
-static void il4965_pass_packet_to_mac80211(struct il_priv *priv,
|
|
|
+static void il4965_pass_packet_to_mac80211(struct il_priv *il,
|
|
|
struct ieee80211_hdr *hdr,
|
|
|
u16 len,
|
|
|
u32 ampdu_status,
|
|
@@ -536,36 +536,36 @@ static void il4965_pass_packet_to_mac80211(struct il_priv *priv,
|
|
|
__le16 fc = hdr->frame_control;
|
|
|
|
|
|
/* We only process data packets if the interface is open */
|
|
|
- if (unlikely(!priv->is_open)) {
|
|
|
- IL_DEBUG_DROP_LIMIT(priv,
|
|
|
+ if (unlikely(!il->is_open)) {
|
|
|
+ IL_DEBUG_DROP_LIMIT(il,
|
|
|
"Dropping packet while interface is not open.\n");
|
|
|
return;
|
|
|
}
|
|
|
|
|
|
/* In case of HW accelerated crypto and bad decryption, drop */
|
|
|
- if (!priv->cfg->mod_params->sw_crypto &&
|
|
|
- il_set_decrypted_flag(priv, hdr, ampdu_status, stats))
|
|
|
+ if (!il->cfg->mod_params->sw_crypto &&
|
|
|
+ il_set_decrypted_flag(il, hdr, ampdu_status, stats))
|
|
|
return;
|
|
|
|
|
|
skb = dev_alloc_skb(128);
|
|
|
if (!skb) {
|
|
|
- IL_ERR(priv, "dev_alloc_skb failed\n");
|
|
|
+ IL_ERR(il, "dev_alloc_skb failed\n");
|
|
|
return;
|
|
|
}
|
|
|
|
|
|
skb_add_rx_frag(skb, 0, rxb->page, (void *)hdr - rxb_addr(rxb), len);
|
|
|
|
|
|
- il_update_stats(priv, false, fc, len);
|
|
|
+ il_update_stats(il, false, fc, len);
|
|
|
memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
|
|
|
|
|
|
- ieee80211_rx(priv->hw, skb);
|
|
|
- priv->alloc_rxb_page--;
|
|
|
+ ieee80211_rx(il->hw, skb);
|
|
|
+ il->alloc_rxb_page--;
|
|
|
rxb->page = NULL;
|
|
|
}
|
|
|
|
|
|
/* Called for REPLY_RX (legacy ABG frames), or
|
|
|
* REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
|
|
|
-void il4965_rx_reply_rx(struct il_priv *priv,
|
|
|
+void il4965_rx_reply_rx(struct il_priv *il,
|
|
|
struct il_rx_mem_buffer *rxb)
|
|
|
{
|
|
|
struct ieee80211_hdr *header;
|
|
@@ -582,7 +582,7 @@ void il4965_rx_reply_rx(struct il_priv *priv,
|
|
|
* REPLY_RX and REPLY_RX_MPDU_CMD are handled differently.
|
|
|
* REPLY_RX: physical layer info is in this buffer
|
|
|
* REPLY_RX_MPDU_CMD: physical layer info was sent in separate
|
|
|
- * command and cached in priv->last_phy_res
|
|
|
+ * command and cached in il->last_phy_res
|
|
|
*
|
|
|
* Here we set up local variables depending on which command is
|
|
|
* received.
|
|
@@ -597,28 +597,28 @@ void il4965_rx_reply_rx(struct il_priv *priv,
|
|
|
phy_res->cfg_phy_cnt + len);
|
|
|
ampdu_status = le32_to_cpu(rx_pkt_status);
|
|
|
} else {
|
|
|
- if (!priv->_4965.last_phy_res_valid) {
|
|
|
- IL_ERR(priv, "MPDU frame without cached PHY data\n");
|
|
|
+ if (!il->_4965.last_phy_res_valid) {
|
|
|
+ IL_ERR(il, "MPDU frame without cached PHY data\n");
|
|
|
return;
|
|
|
}
|
|
|
- phy_res = &priv->_4965.last_phy_res;
|
|
|
+ phy_res = &il->_4965.last_phy_res;
|
|
|
amsdu = (struct il_rx_mpdu_res_start *)pkt->u.raw;
|
|
|
header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
|
|
|
len = le16_to_cpu(amsdu->byte_count);
|
|
|
rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*amsdu) + len);
|
|
|
- ampdu_status = il4965_translate_rx_status(priv,
|
|
|
+ ampdu_status = il4965_translate_rx_status(il,
|
|
|
le32_to_cpu(rx_pkt_status));
|
|
|
}
|
|
|
|
|
|
if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
|
|
|
- IL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
|
|
|
+ IL_DEBUG_DROP(il, "dsp size out of range [0,20]: %d/n",
|
|
|
phy_res->cfg_phy_cnt);
|
|
|
return;
|
|
|
}
|
|
|
|
|
|
if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
|
|
|
!(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
|
|
|
- IL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n",
|
|
|
+ IL_DEBUG_RX(il, "Bad CRC or FIFO: 0x%08X.\n",
|
|
|
le32_to_cpu(rx_pkt_status));
|
|
|
return;
|
|
|
}
|
|
@@ -641,13 +641,13 @@ void il4965_rx_reply_rx(struct il_priv *priv,
|
|
|
* this W/A doesn't propagate it to the mac80211 */
|
|
|
/*rx_status.flag |= RX_FLAG_MACTIME_MPDU;*/
|
|
|
|
|
|
- priv->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
|
|
|
+ il->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
|
|
|
|
|
|
/* Find max signal strength (dBm) among 3 antenna/receiver chains */
|
|
|
- rx_status.signal = il4965_calc_rssi(priv, phy_res);
|
|
|
+ rx_status.signal = il4965_calc_rssi(il, phy_res);
|
|
|
|
|
|
- il_dbg_log_rx_data_frame(priv, len, header);
|
|
|
- IL_DEBUG_STATS_LIMIT(priv, "Rssi %d, TSF %llu\n",
|
|
|
+ il_dbg_log_rx_data_frame(il, len, header);
|
|
|
+ IL_DEBUG_STATS_LIMIT(il, "Rssi %d, TSF %llu\n",
|
|
|
rx_status.signal, (unsigned long long)rx_status.mactime);
|
|
|
|
|
|
/*
|
|
@@ -679,22 +679,22 @@ void il4965_rx_reply_rx(struct il_priv *priv,
|
|
|
if (rate_n_flags & RATE_MCS_SGI_MSK)
|
|
|
rx_status.flag |= RX_FLAG_SHORT_GI;
|
|
|
|
|
|
- il4965_pass_packet_to_mac80211(priv, header, len, ampdu_status,
|
|
|
+ il4965_pass_packet_to_mac80211(il, header, len, ampdu_status,
|
|
|
rxb, &rx_status);
|
|
|
}
|
|
|
|
|
|
/* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
|
|
|
* This will be used later in il_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
|
|
|
-void il4965_rx_reply_rx_phy(struct il_priv *priv,
|
|
|
+void il4965_rx_reply_rx_phy(struct il_priv *il,
|
|
|
struct il_rx_mem_buffer *rxb)
|
|
|
{
|
|
|
struct il_rx_packet *pkt = rxb_addr(rxb);
|
|
|
- priv->_4965.last_phy_res_valid = true;
|
|
|
- memcpy(&priv->_4965.last_phy_res, pkt->u.raw,
|
|
|
+ il->_4965.last_phy_res_valid = true;
|
|
|
+ memcpy(&il->_4965.last_phy_res, pkt->u.raw,
|
|
|
sizeof(struct il_rx_phy_res));
|
|
|
}
|
|
|
|
|
|
-static int il4965_get_channels_for_scan(struct il_priv *priv,
|
|
|
+static int il4965_get_channels_for_scan(struct il_priv *il,
|
|
|
struct ieee80211_vif *vif,
|
|
|
enum ieee80211_band band,
|
|
|
u8 is_active, u8 n_probes,
|
|
@@ -708,18 +708,18 @@ static int il4965_get_channels_for_scan(struct il_priv *priv,
|
|
|
int added, i;
|
|
|
u16 channel;
|
|
|
|
|
|
- sband = il_get_hw_mode(priv, band);
|
|
|
+ sband = il_get_hw_mode(il, band);
|
|
|
if (!sband)
|
|
|
return 0;
|
|
|
|
|
|
- active_dwell = il_get_active_dwell_time(priv, band, n_probes);
|
|
|
- passive_dwell = il_get_passive_dwell_time(priv, band, vif);
|
|
|
+ active_dwell = il_get_active_dwell_time(il, band, n_probes);
|
|
|
+ passive_dwell = il_get_passive_dwell_time(il, band, vif);
|
|
|
|
|
|
if (passive_dwell <= active_dwell)
|
|
|
passive_dwell = active_dwell + 1;
|
|
|
|
|
|
- for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
|
|
|
- chan = priv->scan_request->channels[i];
|
|
|
+ for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
|
|
|
+ chan = il->scan_request->channels[i];
|
|
|
|
|
|
if (chan->band != band)
|
|
|
continue;
|
|
@@ -727,9 +727,9 @@ static int il4965_get_channels_for_scan(struct il_priv *priv,
|
|
|
channel = chan->hw_value;
|
|
|
scan_ch->channel = cpu_to_le16(channel);
|
|
|
|
|
|
- ch_info = il_get_channel_info(priv, band, channel);
|
|
|
+ ch_info = il_get_channel_info(il, band, channel);
|
|
|
if (!il_is_channel_valid(ch_info)) {
|
|
|
- IL_DEBUG_SCAN(priv,
|
|
|
+ IL_DEBUG_SCAN(il,
|
|
|
"Channel %d is INVALID for this band.\n",
|
|
|
channel);
|
|
|
continue;
|
|
@@ -759,7 +759,7 @@ static int il4965_get_channels_for_scan(struct il_priv *priv,
|
|
|
else
|
|
|
scan_ch->tx_gain = ((1 << 5) | (5 << 3));
|
|
|
|
|
|
- IL_DEBUG_SCAN(priv, "Scanning ch=%d prob=0x%X [%s %d]\n",
|
|
|
+ IL_DEBUG_SCAN(il, "Scanning ch=%d prob=0x%X [%s %d]\n",
|
|
|
channel, le32_to_cpu(scan_ch->type),
|
|
|
(scan_ch->type & SCAN_CHANNEL_TYPE_ACTIVE) ?
|
|
|
"ACTIVE" : "PASSIVE",
|
|
@@ -770,11 +770,11 @@ static int il4965_get_channels_for_scan(struct il_priv *priv,
|
|
|
added++;
|
|
|
}
|
|
|
|
|
|
- IL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
|
|
|
+ IL_DEBUG_SCAN(il, "total channels to scan %d\n", added);
|
|
|
return added;
|
|
|
}
|
|
|
|
|
|
-int il4965_request_scan(struct il_priv *priv, struct ieee80211_vif *vif)
|
|
|
+int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
|
|
|
{
|
|
|
struct il_host_cmd cmd = {
|
|
|
.id = REPLY_SCAN_CMD,
|
|
@@ -782,47 +782,47 @@ int il4965_request_scan(struct il_priv *priv, struct ieee80211_vif *vif)
|
|
|
.flags = CMD_SIZE_HUGE,
|
|
|
};
|
|
|
struct il_scan_cmd *scan;
|
|
|
- struct il_rxon_context *ctx = &priv->contexts[IL_RXON_CTX_BSS];
|
|
|
+ struct il_rxon_context *ctx = &il->contexts[IL_RXON_CTX_BSS];
|
|
|
u32 rate_flags = 0;
|
|
|
u16 cmd_len;
|
|
|
u16 rx_chain = 0;
|
|
|
enum ieee80211_band band;
|
|
|
u8 n_probes = 0;
|
|
|
- u8 rx_ant = priv->hw_params.valid_rx_ant;
|
|
|
+ u8 rx_ant = il->hw_params.valid_rx_ant;
|
|
|
u8 rate;
|
|
|
bool is_active = false;
|
|
|
int chan_mod;
|
|
|
u8 active_chains;
|
|
|
- u8 scan_tx_antennas = priv->hw_params.valid_tx_ant;
|
|
|
+ u8 scan_tx_antennas = il->hw_params.valid_tx_ant;
|
|
|
int ret;
|
|
|
|
|
|
- lockdep_assert_held(&priv->mutex);
|
|
|
+ lockdep_assert_held(&il->mutex);
|
|
|
|
|
|
if (vif)
|
|
|
ctx = il_rxon_ctx_from_vif(vif);
|
|
|
|
|
|
- if (!priv->scan_cmd) {
|
|
|
- priv->scan_cmd = kmalloc(sizeof(struct il_scan_cmd) +
|
|
|
+ if (!il->scan_cmd) {
|
|
|
+ il->scan_cmd = kmalloc(sizeof(struct il_scan_cmd) +
|
|
|
IL_MAX_SCAN_SIZE, GFP_KERNEL);
|
|
|
- if (!priv->scan_cmd) {
|
|
|
- IL_DEBUG_SCAN(priv,
|
|
|
+ if (!il->scan_cmd) {
|
|
|
+ IL_DEBUG_SCAN(il,
|
|
|
"fail to allocate memory for scan\n");
|
|
|
return -ENOMEM;
|
|
|
}
|
|
|
}
|
|
|
- scan = priv->scan_cmd;
|
|
|
+ scan = il->scan_cmd;
|
|
|
memset(scan, 0, sizeof(struct il_scan_cmd) + IL_MAX_SCAN_SIZE);
|
|
|
|
|
|
scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
|
|
|
scan->quiet_time = IL_ACTIVE_QUIET_TIME;
|
|
|
|
|
|
- if (il_is_any_associated(priv)) {
|
|
|
+ if (il_is_any_associated(il)) {
|
|
|
u16 interval;
|
|
|
u32 extra;
|
|
|
u32 suspend_time = 100;
|
|
|
u32 scan_suspend_time = 100;
|
|
|
|
|
|
- IL_DEBUG_INFO(priv, "Scanning while associated...\n");
|
|
|
+ IL_DEBUG_INFO(il, "Scanning while associated...\n");
|
|
|
interval = vif->bss_conf.beacon_int;
|
|
|
|
|
|
scan->suspend_time = 0;
|
|
@@ -834,39 +834,39 @@ int il4965_request_scan(struct il_priv *priv, struct ieee80211_vif *vif)
|
|
|
scan_suspend_time = (extra |
|
|
|
((suspend_time % interval) * 1024));
|
|
|
scan->suspend_time = cpu_to_le32(scan_suspend_time);
|
|
|
- IL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
|
|
|
+ IL_DEBUG_SCAN(il, "suspend_time 0x%X beacon interval %d\n",
|
|
|
scan_suspend_time, interval);
|
|
|
}
|
|
|
|
|
|
- if (priv->scan_request->n_ssids) {
|
|
|
+ if (il->scan_request->n_ssids) {
|
|
|
int i, p = 0;
|
|
|
- IL_DEBUG_SCAN(priv, "Kicking off active scan\n");
|
|
|
- for (i = 0; i < priv->scan_request->n_ssids; i++) {
|
|
|
+ IL_DEBUG_SCAN(il, "Kicking off active scan\n");
|
|
|
+ for (i = 0; i < il->scan_request->n_ssids; i++) {
|
|
|
/* always does wildcard anyway */
|
|
|
- if (!priv->scan_request->ssids[i].ssid_len)
|
|
|
+ if (!il->scan_request->ssids[i].ssid_len)
|
|
|
continue;
|
|
|
scan->direct_scan[p].id = WLAN_EID_SSID;
|
|
|
scan->direct_scan[p].len =
|
|
|
- priv->scan_request->ssids[i].ssid_len;
|
|
|
+ il->scan_request->ssids[i].ssid_len;
|
|
|
memcpy(scan->direct_scan[p].ssid,
|
|
|
- priv->scan_request->ssids[i].ssid,
|
|
|
- priv->scan_request->ssids[i].ssid_len);
|
|
|
+ il->scan_request->ssids[i].ssid,
|
|
|
+ il->scan_request->ssids[i].ssid_len);
|
|
|
n_probes++;
|
|
|
p++;
|
|
|
}
|
|
|
is_active = true;
|
|
|
} else
|
|
|
- IL_DEBUG_SCAN(priv, "Start passive scan.\n");
|
|
|
+ IL_DEBUG_SCAN(il, "Start passive scan.\n");
|
|
|
|
|
|
scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
|
|
|
scan->tx_cmd.sta_id = ctx->bcast_sta_id;
|
|
|
scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
|
|
|
|
|
|
- switch (priv->scan_band) {
|
|
|
+ switch (il->scan_band) {
|
|
|
case IEEE80211_BAND_2GHZ:
|
|
|
scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
|
|
|
chan_mod = le32_to_cpu(
|
|
|
- priv->contexts[IL_RXON_CTX_BSS].active.flags &
|
|
|
+ il->contexts[IL_RXON_CTX_BSS].active.flags &
|
|
|
RXON_FLG_CHANNEL_MODE_MSK)
|
|
|
>> RXON_FLG_CHANNEL_MODE_POS;
|
|
|
if (chan_mod == CHANNEL_MODE_PURE_40) {
|
|
@@ -880,7 +880,7 @@ int il4965_request_scan(struct il_priv *priv, struct ieee80211_vif *vif)
|
|
|
rate = IL_RATE_6M_PLCP;
|
|
|
break;
|
|
|
default:
|
|
|
- IL_WARN(priv, "Invalid scan band\n");
|
|
|
+ IL_WARN(il, "Invalid scan band\n");
|
|
|
return -EIO;
|
|
|
}
|
|
|
|
|
@@ -904,54 +904,54 @@ int il4965_request_scan(struct il_priv *priv, struct ieee80211_vif *vif)
|
|
|
scan->good_CRC_th = is_active ? IL_GOOD_CRC_TH_DEFAULT :
|
|
|
IL_GOOD_CRC_TH_NEVER;
|
|
|
|
|
|
- band = priv->scan_band;
|
|
|
+ band = il->scan_band;
|
|
|
|
|
|
- if (priv->cfg->scan_rx_antennas[band])
|
|
|
- rx_ant = priv->cfg->scan_rx_antennas[band];
|
|
|
+ if (il->cfg->scan_rx_antennas[band])
|
|
|
+ rx_ant = il->cfg->scan_rx_antennas[band];
|
|
|
|
|
|
- priv->scan_tx_ant[band] = il4965_toggle_tx_ant(priv,
|
|
|
- priv->scan_tx_ant[band],
|
|
|
+ il->scan_tx_ant[band] = il4965_toggle_tx_ant(il,
|
|
|
+ il->scan_tx_ant[band],
|
|
|
scan_tx_antennas);
|
|
|
- rate_flags |= il4965_ant_idx_to_flags(priv->scan_tx_ant[band]);
|
|
|
+ rate_flags |= il4965_ant_idx_to_flags(il->scan_tx_ant[band]);
|
|
|
scan->tx_cmd.rate_n_flags = il4965_hw_set_rate_n_flags(rate, rate_flags);
|
|
|
|
|
|
/* In power save mode use one chain, otherwise use all chains */
|
|
|
- if (test_bit(STATUS_POWER_PMI, &priv->status)) {
|
|
|
+ if (test_bit(STATUS_POWER_PMI, &il->status)) {
|
|
|
/* rx_ant has been set to all valid chains previously */
|
|
|
active_chains = rx_ant &
|
|
|
- ((u8)(priv->chain_noise_data.active_chains));
|
|
|
+ ((u8)(il->chain_noise_data.active_chains));
|
|
|
if (!active_chains)
|
|
|
active_chains = rx_ant;
|
|
|
|
|
|
- IL_DEBUG_SCAN(priv, "chain_noise_data.active_chains: %u\n",
|
|
|
- priv->chain_noise_data.active_chains);
|
|
|
+ IL_DEBUG_SCAN(il, "chain_noise_data.active_chains: %u\n",
|
|
|
+ il->chain_noise_data.active_chains);
|
|
|
|
|
|
rx_ant = il4965_first_antenna(active_chains);
|
|
|
}
|
|
|
|
|
|
/* MIMO is not used here, but value is required */
|
|
|
- rx_chain |= priv->hw_params.valid_rx_ant << RXON_RX_CHAIN_VALID_POS;
|
|
|
+ rx_chain |= il->hw_params.valid_rx_ant << RXON_RX_CHAIN_VALID_POS;
|
|
|
rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
|
|
|
rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_SEL_POS;
|
|
|
rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
|
|
|
scan->rx_chain = cpu_to_le16(rx_chain);
|
|
|
|
|
|
- cmd_len = il_fill_probe_req(priv,
|
|
|
+ cmd_len = il_fill_probe_req(il,
|
|
|
(struct ieee80211_mgmt *)scan->data,
|
|
|
vif->addr,
|
|
|
- priv->scan_request->ie,
|
|
|
- priv->scan_request->ie_len,
|
|
|
+ il->scan_request->ie,
|
|
|
+ il->scan_request->ie_len,
|
|
|
IL_MAX_SCAN_SIZE - sizeof(*scan));
|
|
|
scan->tx_cmd.len = cpu_to_le16(cmd_len);
|
|
|
|
|
|
scan->filter_flags |= (RXON_FILTER_ACCEPT_GRP_MSK |
|
|
|
RXON_FILTER_BCON_AWARE_MSK);
|
|
|
|
|
|
- scan->channel_count = il4965_get_channels_for_scan(priv, vif, band,
|
|
|
+ scan->channel_count = il4965_get_channels_for_scan(il, vif, band,
|
|
|
is_active, n_probes,
|
|
|
(void *)&scan->data[cmd_len]);
|
|
|
if (scan->channel_count == 0) {
|
|
|
- IL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
|
|
|
+ IL_DEBUG_SCAN(il, "channel count %d\n", scan->channel_count);
|
|
|
return -EIO;
|
|
|
}
|
|
|
|
|
@@ -960,49 +960,49 @@ int il4965_request_scan(struct il_priv *priv, struct ieee80211_vif *vif)
|
|
|
cmd.data = scan;
|
|
|
scan->len = cpu_to_le16(cmd.len);
|
|
|
|
|
|
- set_bit(STATUS_SCAN_HW, &priv->status);
|
|
|
+ set_bit(STATUS_SCAN_HW, &il->status);
|
|
|
|
|
|
- ret = il_send_cmd_sync(priv, &cmd);
|
|
|
+ ret = il_send_cmd_sync(il, &cmd);
|
|
|
if (ret)
|
|
|
- clear_bit(STATUS_SCAN_HW, &priv->status);
|
|
|
+ clear_bit(STATUS_SCAN_HW, &il->status);
|
|
|
|
|
|
return ret;
|
|
|
}
|
|
|
|
|
|
-int il4965_manage_ibss_station(struct il_priv *priv,
|
|
|
+int il4965_manage_ibss_station(struct il_priv *il,
|
|
|
struct ieee80211_vif *vif, bool add)
|
|
|
{
|
|
|
struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
|
|
|
|
|
|
if (add)
|
|
|
- return il4965_add_bssid_station(priv, vif_priv->ctx,
|
|
|
+ return il4965_add_bssid_station(il, vif_priv->ctx,
|
|
|
vif->bss_conf.bssid,
|
|
|
&vif_priv->ibss_bssid_sta_id);
|
|
|
- return il_remove_station(priv, vif_priv->ibss_bssid_sta_id,
|
|
|
+ return il_remove_station(il, vif_priv->ibss_bssid_sta_id,
|
|
|
vif->bss_conf.bssid);
|
|
|
}
|
|
|
|
|
|
-void il4965_free_tfds_in_queue(struct il_priv *priv,
|
|
|
+void il4965_free_tfds_in_queue(struct il_priv *il,
|
|
|
int sta_id, int tid, int freed)
|
|
|
{
|
|
|
- lockdep_assert_held(&priv->sta_lock);
|
|
|
+ lockdep_assert_held(&il->sta_lock);
|
|
|
|
|
|
- if (priv->stations[sta_id].tid[tid].tfds_in_queue >= freed)
|
|
|
- priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
|
|
|
+ if (il->stations[sta_id].tid[tid].tfds_in_queue >= freed)
|
|
|
+ il->stations[sta_id].tid[tid].tfds_in_queue -= freed;
|
|
|
else {
|
|
|
- IL_DEBUG_TX(priv, "free more than tfds_in_queue (%u:%d)\n",
|
|
|
- priv->stations[sta_id].tid[tid].tfds_in_queue,
|
|
|
+ IL_DEBUG_TX(il, "free more than tfds_in_queue (%u:%d)\n",
|
|
|
+ il->stations[sta_id].tid[tid].tfds_in_queue,
|
|
|
freed);
|
|
|
- priv->stations[sta_id].tid[tid].tfds_in_queue = 0;
|
|
|
+ il->stations[sta_id].tid[tid].tfds_in_queue = 0;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
#define IL_TX_QUEUE_MSK 0xfffff
|
|
|
|
|
|
-static bool il4965_is_single_rx_stream(struct il_priv *priv)
|
|
|
+static bool il4965_is_single_rx_stream(struct il_priv *il)
|
|
|
{
|
|
|
- return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
|
|
|
- priv->current_ht_config.single_chain_sufficient;
|
|
|
+ return il->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
|
|
|
+ il->current_ht_config.single_chain_sufficient;
|
|
|
}
|
|
|
|
|
|
#define IL_NUM_RX_CHAINS_MULTIPLE 3
|
|
@@ -1020,10 +1020,10 @@ static bool il4965_is_single_rx_stream(struct il_priv *priv)
|
|
|
* MIMO (dual stream) requires at least 2, but works better with 3.
|
|
|
* This does not determine *which* chains to use, just how many.
|
|
|
*/
|
|
|
-static int il4965_get_active_rx_chain_count(struct il_priv *priv)
|
|
|
+static int il4965_get_active_rx_chain_count(struct il_priv *il)
|
|
|
{
|
|
|
/* # of Rx chains to use when expecting MIMO. */
|
|
|
- if (il4965_is_single_rx_stream(priv))
|
|
|
+ if (il4965_is_single_rx_stream(il))
|
|
|
return IL_NUM_RX_CHAINS_SINGLE;
|
|
|
else
|
|
|
return IL_NUM_RX_CHAINS_MULTIPLE;
|
|
@@ -1034,10 +1034,10 @@ static int il4965_get_active_rx_chain_count(struct il_priv *priv)
|
|
|
* multiplexing power save, use the active count for rx chain count.
|
|
|
*/
|
|
|
static int
|
|
|
-il4965_get_idle_rx_chain_count(struct il_priv *priv, int active_cnt)
|
|
|
+il4965_get_idle_rx_chain_count(struct il_priv *il, int active_cnt)
|
|
|
{
|
|
|
/* # Rx chains when idling, depending on SMPS mode */
|
|
|
- switch (priv->current_ht_config.smps) {
|
|
|
+ switch (il->current_ht_config.smps) {
|
|
|
case IEEE80211_SMPS_STATIC:
|
|
|
case IEEE80211_SMPS_DYNAMIC:
|
|
|
return IL_NUM_IDLE_CHAINS_SINGLE;
|
|
@@ -1045,7 +1045,7 @@ il4965_get_idle_rx_chain_count(struct il_priv *priv, int active_cnt)
|
|
|
return active_cnt;
|
|
|
default:
|
|
|
WARN(1, "invalid SMPS mode %d",
|
|
|
- priv->current_ht_config.smps);
|
|
|
+ il->current_ht_config.smps);
|
|
|
return active_cnt;
|
|
|
}
|
|
|
}
|
|
@@ -1067,10 +1067,10 @@ static u8 il4965_count_chain_bitmap(u32 chain_bitmap)
|
|
|
* Selects how many and which Rx receivers/antennas/chains to use.
|
|
|
* This should not be used for scan command ... it puts data in wrong place.
|
|
|
*/
|
|
|
-void il4965_set_rxon_chain(struct il_priv *priv, struct il_rxon_context *ctx)
|
|
|
+void il4965_set_rxon_chain(struct il_priv *il, struct il_rxon_context *ctx)
|
|
|
{
|
|
|
- bool is_single = il4965_is_single_rx_stream(priv);
|
|
|
- bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
|
|
|
+ bool is_single = il4965_is_single_rx_stream(il);
|
|
|
+ bool is_cam = !test_bit(STATUS_POWER_PMI, &il->status);
|
|
|
u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
|
|
|
u32 active_chains;
|
|
|
u16 rx_chain;
|
|
@@ -1079,16 +1079,16 @@ void il4965_set_rxon_chain(struct il_priv *priv, struct il_rxon_context *ctx)
|
|
|
* Before first association, we assume all antennas are connected.
|
|
|
* Just after first association, il4965_chain_noise_calibration()
|
|
|
* checks which antennas actually *are* connected. */
|
|
|
- if (priv->chain_noise_data.active_chains)
|
|
|
- active_chains = priv->chain_noise_data.active_chains;
|
|
|
+ if (il->chain_noise_data.active_chains)
|
|
|
+ active_chains = il->chain_noise_data.active_chains;
|
|
|
else
|
|
|
- active_chains = priv->hw_params.valid_rx_ant;
|
|
|
+ active_chains = il->hw_params.valid_rx_ant;
|
|
|
|
|
|
rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
|
|
|
|
|
|
/* How many receivers should we use? */
|
|
|
- active_rx_cnt = il4965_get_active_rx_chain_count(priv);
|
|
|
- idle_rx_cnt = il4965_get_idle_rx_chain_count(priv, active_rx_cnt);
|
|
|
+ active_rx_cnt = il4965_get_active_rx_chain_count(il);
|
|
|
+ idle_rx_cnt = il4965_get_idle_rx_chain_count(il, active_rx_cnt);
|
|
|
|
|
|
|
|
|
/* correct rx chain count according hw settings
|
|
@@ -1111,7 +1111,7 @@ void il4965_set_rxon_chain(struct il_priv *priv, struct il_rxon_context *ctx)
|
|
|
else
|
|
|
ctx->staging.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
|
|
|
|
|
|
- IL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
|
|
|
+ IL_DEBUG_ASSOC(il, "rx_chain=0x%X active=%d idle=%d\n",
|
|
|
ctx->staging.rx_chain,
|
|
|
active_rx_cnt, idle_rx_cnt);
|
|
|
|
|
@@ -1119,7 +1119,7 @@ void il4965_set_rxon_chain(struct il_priv *priv, struct il_rxon_context *ctx)
|
|
|
active_rx_cnt < idle_rx_cnt);
|
|
|
}
|
|
|
|
|
|
-u8 il4965_toggle_tx_ant(struct il_priv *priv, u8 ant, u8 valid)
|
|
|
+u8 il4965_toggle_tx_ant(struct il_priv *il, u8 ant, u8 valid)
|
|
|
{
|
|
|
int i;
|
|
|
u8 ind = ant;
|
|
@@ -1149,7 +1149,7 @@ static const char *il4965_get_fh_string(int cmd)
|
|
|
}
|
|
|
}
|
|
|
|
|
|
-int il4965_dump_fh(struct il_priv *priv, char **buf, bool display)
|
|
|
+int il4965_dump_fh(struct il_priv *il, char **buf, bool display)
|
|
|
{
|
|
|
int i;
|
|
|
#ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
|
|
@@ -1179,16 +1179,16 @@ int il4965_dump_fh(struct il_priv *priv, char **buf, bool display)
|
|
|
pos += scnprintf(*buf + pos, bufsz - pos,
|
|
|
" %34s: 0X%08x\n",
|
|
|
il4965_get_fh_string(fh_tbl[i]),
|
|
|
- il_read_direct32(priv, fh_tbl[i]));
|
|
|
+ il_read_direct32(il, fh_tbl[i]));
|
|
|
}
|
|
|
return pos;
|
|
|
}
|
|
|
#endif
|
|
|
- IL_ERR(priv, "FH register values:\n");
|
|
|
+ IL_ERR(il, "FH register values:\n");
|
|
|
for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
|
|
|
- IL_ERR(priv, " %34s: 0X%08x\n",
|
|
|
+ IL_ERR(il, " %34s: 0X%08x\n",
|
|
|
il4965_get_fh_string(fh_tbl[i]),
|
|
|
- il_read_direct32(priv, fh_tbl[i]));
|
|
|
+ il_read_direct32(il, fh_tbl[i]));
|
|
|
}
|
|
|
return 0;
|
|
|
}
|