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@@ -222,12 +222,18 @@ static int tegra_i2s_hw_params(struct snd_pcm_substream *substream,
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if (i2sclock % (2 * srate))
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reg |= TEGRA_I2S_TIMING_NON_SYM_ENABLE;
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+ if (!i2s->clk_refs)
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+ clk_enable(i2s->clk_i2s);
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+
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tegra_i2s_write(i2s, TEGRA_I2S_TIMING, reg);
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tegra_i2s_write(i2s, TEGRA_I2S_FIFO_SCR,
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TEGRA_I2S_FIFO_SCR_FIFO2_ATN_LVL_FOUR_SLOTS |
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TEGRA_I2S_FIFO_SCR_FIFO1_ATN_LVL_FOUR_SLOTS);
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+ if (!i2s->clk_refs)
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+ clk_disable(i2s->clk_i2s);
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+
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return 0;
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}
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