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+/*
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+ * drivers/net/phy/national.c
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+ *
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+ * Driver for National Semiconductor PHYs
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+ *
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+ * Author: Stuart Menefy <stuart.menefy@st.com>
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+ * Maintainer: Giuseppe Cavallaro <peppe.cavallaro@st.com>
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+ *
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+ * Copyright (c) 2008 STMicroelectronics Limited
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License as published by the
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+ * Free Software Foundation; either version 2 of the License, or (at your
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+ * option) any later version.
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+ *
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/mii.h>
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+#include <linux/ethtool.h>
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+#include <linux/phy.h>
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+#include <linux/netdevice.h>
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+
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+/* DP83865 phy identifier values */
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+#define DP83865_PHY_ID 0x20005c7a
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+
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+#define DP83865_INT_MASK_REG 0x15
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+#define DP83865_INT_MASK_STATUS 0x14
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+
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+#define DP83865_INT_REMOTE_FAULT 0x0008
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+#define DP83865_INT_ANE_COMPLETED 0x0010
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+#define DP83865_INT_LINK_CHANGE 0xe000
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+#define DP83865_INT_MASK_DEFAULT (DP83865_INT_REMOTE_FAULT | \
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+ DP83865_INT_ANE_COMPLETED | \
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+ DP83865_INT_LINK_CHANGE)
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+
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+/* Advanced proprietary configuration */
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+#define NS_EXP_MEM_CTL 0x16
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+#define NS_EXP_MEM_DATA 0x1d
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+#define NS_EXP_MEM_ADD 0x1e
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+
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+#define LED_CTRL_REG 0x13
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+#define AN_FALLBACK_AN 0x0001
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+#define AN_FALLBACK_CRC 0x0002
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+#define AN_FALLBACK_IE 0x0004
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+#define ALL_FALLBACK_ON (AN_FALLBACK_AN | AN_FALLBACK_CRC | AN_FALLBACK_IE)
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+
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+enum hdx_loopback {
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+ hdx_loopback_on = 0,
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+ hdx_loopback_off = 1,
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+};
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+
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+static u8 ns_exp_read(struct phy_device *phydev, u16 reg)
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+{
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+ phy_write(phydev, NS_EXP_MEM_ADD, reg);
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+ return phy_read(phydev, NS_EXP_MEM_DATA);
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+}
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+
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+static void ns_exp_write(struct phy_device *phydev, u16 reg, u8 data)
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+{
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+ phy_write(phydev, NS_EXP_MEM_ADD, reg);
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+ phy_write(phydev, NS_EXP_MEM_DATA, data);
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+}
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+
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+static int ns_config_intr(struct phy_device *phydev)
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+{
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+ int err;
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+
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+ if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
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+ err = phy_write(phydev, DP83865_INT_MASK_REG,
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+ DP83865_INT_MASK_DEFAULT);
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+ else
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+ err = phy_write(phydev, DP83865_INT_MASK_REG, 0);
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+
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+ return err;
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+}
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+
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+static int ns_ack_interrupt(struct phy_device *phydev)
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+{
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+ int ret = phy_read(phydev, DP83865_INT_MASK_STATUS);
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+ if (ret < 0)
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+ return ret;
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+
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+ return 0;
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+}
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+
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+static void ns_giga_speed_fallback(struct phy_device *phydev, int mode)
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+{
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+ int bmcr = phy_read(phydev, MII_BMCR);
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+
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+ phy_write(phydev, MII_BMCR, (bmcr | BMCR_PDOWN));
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+
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+ /* Enable 8 bit expended memory read/write (no auto increment) */
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+ phy_write(phydev, NS_EXP_MEM_CTL, 0);
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+ phy_write(phydev, NS_EXP_MEM_ADD, 0x1C0);
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+ phy_write(phydev, NS_EXP_MEM_DATA, 0x0008);
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+ phy_write(phydev, MII_BMCR, (bmcr & ~BMCR_PDOWN));
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+ phy_write(phydev, LED_CTRL_REG, mode);
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+ return;
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+}
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+
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+static void ns_10_base_t_hdx_loopack(struct phy_device *phydev, int disable)
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+{
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+ if (disable)
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+ ns_exp_write(phydev, 0x1c0, ns_exp_read(phydev, 0x1c0) | 1);
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+ else
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+ ns_exp_write(phydev, 0x1c0,
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+ ns_exp_read(phydev, 0x1c0) & 0xfffe);
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+
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+ printk(KERN_DEBUG "DP83865 PHY: 10BASE-T HDX loopback %s\n",
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+ (ns_exp_read(phydev, 0x1c0) & 0x0001) ? "off" : "on");
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+
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+ return;
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+}
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+
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+static int ns_config_init(struct phy_device *phydev)
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+{
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+ ns_giga_speed_fallback(phydev, ALL_FALLBACK_ON);
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+ /* In the latest MAC or switches design, the 10 Mbps loopback
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+ is desired to be turned off. */
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+ ns_10_base_t_hdx_loopack(phydev, hdx_loopback_off);
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+ return ns_ack_interrupt(phydev);
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+}
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+
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+static struct phy_driver dp83865_driver = {
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+ .phy_id = DP83865_PHY_ID,
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+ .phy_id_mask = 0xfffffff0,
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+ .name = "NatSemi DP83865",
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+ .features = PHY_GBIT_FEATURES | SUPPORTED_Pause | SUPPORTED_Asym_Pause,
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+ .flags = PHY_HAS_INTERRUPT,
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+ .config_init = ns_config_init,
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+ .config_aneg = genphy_config_aneg,
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+ .read_status = genphy_read_status,
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+ .ack_interrupt = ns_ack_interrupt,
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+ .config_intr = ns_config_intr,
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+ .driver = {.owner = THIS_MODULE,}
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+};
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+
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+static int __init ns_init(void)
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+{
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+ return phy_driver_register(&dp83865_driver);
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+}
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+
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+static void __exit ns_exit(void)
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+{
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+ phy_driver_unregister(&dp83865_driver);
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+}
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+
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+MODULE_DESCRIPTION("NatSemi PHY driver");
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+MODULE_AUTHOR("Stuart Menefy");
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+MODULE_LICENSE("GPL");
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+
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+module_init(ns_init);
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+module_exit(ns_exit);
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