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+/*
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+ * Au1xxx counter0 (aka Time-Of-Year counter) RTC interface driver.
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+ *
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+ * Copyright (C) 2008 Manuel Lauss <mano@roarinelk.homelinux.net>
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+ *
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+ * This file is subject to the terms and conditions of the GNU General Public
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+ * License. See the file "COPYING" in the main directory of this archive
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+ * for more details.
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+ */
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+
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+/* All current Au1xxx SoCs have 2 counters fed by an external 32.768 kHz
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+ * crystal. Counter 0, which keeps counting during sleep/powerdown, is
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+ * used to count seconds since the beginning of the unix epoch.
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+ *
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+ * The counters must be configured and enabled by bootloader/board code;
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+ * no checks as to whether they really get a proper 32.768kHz clock are
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+ * made as this would take far too long.
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+ */
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+
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+#include <linux/module.h>
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+#include <linux/kernel.h>
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+#include <linux/rtc.h>
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+#include <linux/init.h>
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+#include <linux/platform_device.h>
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+#include <linux/io.h>
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+#include <asm/mach-au1x00/au1000.h>
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+
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+/* 32kHz clock enabled and detected */
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+#define CNTR_OK (SYS_CNTRL_E0 | SYS_CNTRL_32S)
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+
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+static int au1xtoy_rtc_read_time(struct device *dev, struct rtc_time *tm)
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+{
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+ unsigned long t;
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+
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+ t = au_readl(SYS_TOYREAD);
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+
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+ rtc_time_to_tm(t, tm);
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+
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+ return rtc_valid_tm(tm);
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+}
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+
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+static int au1xtoy_rtc_set_time(struct device *dev, struct rtc_time *tm)
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+{
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+ unsigned long t;
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+
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+ rtc_tm_to_time(tm, &t);
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+
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+ au_writel(t, SYS_TOYWRITE);
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+ au_sync();
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+
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+ /* wait for the pending register write to succeed. This can
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+ * take up to 6 seconds...
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+ */
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+ while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S)
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+ msleep(1);
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+
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+ return 0;
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+}
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+
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+static struct rtc_class_ops au1xtoy_rtc_ops = {
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+ .read_time = au1xtoy_rtc_read_time,
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+ .set_time = au1xtoy_rtc_set_time,
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+};
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+
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+static int __devinit au1xtoy_rtc_probe(struct platform_device *pdev)
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+{
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+ struct rtc_device *rtcdev;
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+ unsigned long t;
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+ int ret;
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+
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+ t = au_readl(SYS_COUNTER_CNTRL);
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+ if (!(t & CNTR_OK)) {
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+ dev_err(&pdev->dev, "counters not working; aborting.\n");
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+ ret = -ENODEV;
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+ goto out_err;
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+ }
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+
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+ ret = -ETIMEDOUT;
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+
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+ /* set counter0 tickrate to 1Hz if necessary */
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+ if (au_readl(SYS_TOYTRIM) != 32767) {
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+ /* wait until hardware gives access to TRIM register */
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+ t = 0x00100000;
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+ while ((au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S) && t--)
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+ msleep(1);
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+
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+ if (!t) {
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+ /* timed out waiting for register access; assume
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+ * counters are unusable.
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+ */
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+ dev_err(&pdev->dev, "timeout waiting for access\n");
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+ goto out_err;
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+ }
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+
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+ /* set 1Hz TOY tick rate */
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+ au_writel(32767, SYS_TOYTRIM);
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+ au_sync();
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+ }
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+
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+ /* wait until the hardware allows writes to the counter reg */
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+ while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S)
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+ msleep(1);
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+
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+ rtcdev = rtc_device_register("rtc-au1xxx", &pdev->dev,
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+ &au1xtoy_rtc_ops, THIS_MODULE);
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+ if (IS_ERR(rtcdev)) {
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+ ret = PTR_ERR(rtcdev);
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+ goto out_err;
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+ }
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+
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+ platform_set_drvdata(pdev, rtcdev);
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+
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+ return 0;
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+
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+out_err:
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+ return ret;
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+}
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+
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+static int __devexit au1xtoy_rtc_remove(struct platform_device *pdev)
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+{
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+ struct rtc_device *rtcdev = platform_get_drvdata(pdev);
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+
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+ rtc_device_unregister(rtcdev);
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+ platform_set_drvdata(pdev, NULL);
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+
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+ return 0;
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+}
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+
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+static struct platform_driver au1xrtc_driver = {
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+ .driver = {
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+ .name = "rtc-au1xxx",
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+ .owner = THIS_MODULE,
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+ },
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+ .remove = __devexit_p(au1xtoy_rtc_remove),
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+};
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+
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+static int __init au1xtoy_rtc_init(void)
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+{
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+ return platform_driver_probe(&au1xrtc_driver, au1xtoy_rtc_probe);
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+}
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+
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+static void __exit au1xtoy_rtc_exit(void)
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+{
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+ platform_driver_unregister(&au1xrtc_driver);
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+}
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+
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+module_init(au1xtoy_rtc_init);
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+module_exit(au1xtoy_rtc_exit);
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+
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+MODULE_DESCRIPTION("Au1xxx TOY-counter-based RTC driver");
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+MODULE_AUTHOR("Manuel Lauss <manuel.lauss@gmail.com>");
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+MODULE_LICENSE("GPL");
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+MODULE_ALIAS("platform:rtc-au1xxx");
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