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@@ -2367,31 +2367,26 @@ static void gen6_disable_rps(struct drm_device *dev)
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int intel_enable_rc6(const struct drm_device *dev)
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int intel_enable_rc6(const struct drm_device *dev)
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{
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{
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- /*
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- * Respect the kernel parameter if it is set
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- */
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+ /* Respect the kernel parameter if it is set */
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if (i915_enable_rc6 >= 0)
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if (i915_enable_rc6 >= 0)
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return i915_enable_rc6;
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return i915_enable_rc6;
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- /*
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- * Disable RC6 on Ironlake
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- */
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- if (INTEL_INFO(dev)->gen == 5)
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- return 0;
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+ if (INTEL_INFO(dev)->gen == 5) {
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+ DRM_DEBUG_DRIVER("Ironlake: only RC6 available\n");
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+ return INTEL_RC6_ENABLE;
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+ }
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- /* On Haswell, only RC6 is available. So let's enable it by default to
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- * provide better testing and coverage since the beginning.
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- */
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- if (IS_HASWELL(dev))
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+ if (IS_HASWELL(dev)) {
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+ DRM_DEBUG_DRIVER("Haswell: only RC6 available\n");
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return INTEL_RC6_ENABLE;
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return INTEL_RC6_ENABLE;
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+ }
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- /*
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- * Disable rc6 on Sandybridge
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- */
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+ /* snb/ivb have more than one rc6 state. */
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if (INTEL_INFO(dev)->gen == 6) {
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if (INTEL_INFO(dev)->gen == 6) {
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DRM_DEBUG_DRIVER("Sandybridge: deep RC6 disabled\n");
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DRM_DEBUG_DRIVER("Sandybridge: deep RC6 disabled\n");
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return INTEL_RC6_ENABLE;
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return INTEL_RC6_ENABLE;
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}
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}
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+
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DRM_DEBUG_DRIVER("RC6 and deep RC6 enabled\n");
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DRM_DEBUG_DRIVER("RC6 and deep RC6 enabled\n");
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return (INTEL_RC6_ENABLE | INTEL_RC6p_ENABLE);
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return (INTEL_RC6_ENABLE | INTEL_RC6p_ENABLE);
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}
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}
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