Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6: (42 commits)
  Staging: usbip: fix build warning on 64bit kernels
  Staging: me4000: remove some compiler warnings
  Staging: wbusb: fix a bunch of compiler warnings
  Staging: w35und: module init cleanup
  Staging: w35und: use gotos for error handling
  Staging: w35und: remove spinlock wrappers
  Staging: sxg: fix compiler warnings.
  Staging: sxg: fix up unused function warnings
  Staging: sxg: clean up C99 comments
  Staging: Lindent the echo driver
  Staging: SLICOSS: Free multicast list at driver exit
  Staging: PCC-ACPI: Fix all checkpatch errors
  Staging: pcc-acpi: update to latest version
  Staging: Clean up sxg driver
  Staging: remove remaining uses of __FUNCTION__
  Staging: add poch driver
  Staging: wlan-ng: fix build error if wireless networking is not enabled
  Staging: echo: remove annoying "end of function" markers
  Staging: echo: remove __cplusplus macro magic
  Staging: echo: remove dead code
  ...

drivers/staging/Kconfig

@@ -43,4 +43,8 @@ source "drivers/staging/echo/Kconfig"
 
 source "drivers/staging/at76_usb/Kconfig"
 
+source "drivers/staging/pcc-acpi/Kconfig"
+
+source "drivers/staging/poch/Kconfig"
+
 endif # STAGING

drivers/staging/Makefile

@@ -13,3 +13,5 @@ obj-$(CONFIG_W35UND)		+= winbond/
 obj-$(CONFIG_PRISM2_USB)	+= wlan-ng/
 obj-$(CONFIG_ECHO)		+= echo/
 obj-$(CONFIG_USB_ATMEL)		+= at76_usb/
+obj-$(CONFIG_PCC_ACPI)		+= pcc-acpi/
+obj-$(CONFIG_POCH)		+= poch/

drivers/staging/at76_usb/at76_usb.c

@@ -2319,9 +2319,11 @@ static int at76_iw_handler_get_scan(struct net_device *netdev,
 	if (!iwe)
 		return -ENOMEM;
 
-	if (priv->scan_state != SCAN_COMPLETED)
+	if (priv->scan_state != SCAN_COMPLETED) {
 		/* scan not yet finished */
+		kfree(iwe);
 		return -EAGAIN;
+	}
 
 	spin_lock_irqsave(&priv->bss_list_spinlock, flags);
 

drivers/staging/echo/bit_operations.h

@@ -30,114 +30,98 @@
 #if !defined(_BIT_OPERATIONS_H_)
 #define _BIT_OPERATIONS_H_
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
 #if defined(__i386__)  ||  defined(__x86_64__)
 /*! \brief Find the bit position of the highest set bit in a word
     \param bits The word to be searched
     \return The bit number of the highest set bit, or -1 if the word is zero. */
 static __inline__ int top_bit(unsigned int bits)
 {
-    int res;
-
-    __asm__ (" xorl %[res],%[res];\n"
-             " decl %[res];\n"
-             " bsrl %[bits],%[res]\n"
-             : [res] "=&r" (res)
-             : [bits] "rm" (bits));
-    return res;
+	int res;
+
+	__asm__(" xorl %[res],%[res];\n"
+		" decl %[res];\n"
+		" bsrl %[bits],%[res]\n"
+		:[res] "=&r" (res)
+		:[bits] "rm"(bits)
+	);
+	return res;
 }
-/*- End of function --------------------------------------------------------*/
 
 /*! \brief Find the bit position of the lowest set bit in a word
     \param bits The word to be searched
     \return The bit number of the lowest set bit, or -1 if the word is zero. */
 static __inline__ int bottom_bit(unsigned int bits)
 {
-    int res;
-
-    __asm__ (" xorl %[res],%[res];\n"
-             " decl %[res];\n"
-             " bsfl %[bits],%[res]\n"
-             : [res] "=&r" (res)
-             : [bits] "rm" (bits));
-    return res;
+	int res;
+
+	__asm__(" xorl %[res],%[res];\n"
+		" decl %[res];\n"
+		" bsfl %[bits],%[res]\n"
+		:[res] "=&r" (res)
+		:[bits] "rm"(bits)
+	);
+	return res;
 }
-/*- End of function --------------------------------------------------------*/
 #else
 static __inline__ int top_bit(unsigned int bits)
 {
-    int i;
-
-    if (bits == 0)
-        return -1;
-    i = 0;
-    if (bits & 0xFFFF0000)
-    {
-        bits &= 0xFFFF0000;
-        i += 16;
-    }
-    if (bits & 0xFF00FF00)
-    {
-        bits &= 0xFF00FF00;
-        i += 8;
-    }
-    if (bits & 0xF0F0F0F0)
-    {
-        bits &= 0xF0F0F0F0;
-        i += 4;
-    }
-    if (bits & 0xCCCCCCCC)
-    {
-        bits &= 0xCCCCCCCC;
-        i += 2;
-    }
-    if (bits & 0xAAAAAAAA)
-    {
-        bits &= 0xAAAAAAAA;
-        i += 1;
-    }
-    return i;
+	int i;
+
+	if (bits == 0)
+		return -1;
+	i = 0;
+	if (bits & 0xFFFF0000) {
+		bits &= 0xFFFF0000;
+		i += 16;
+	}
+	if (bits & 0xFF00FF00) {
+		bits &= 0xFF00FF00;
+		i += 8;
+	}
+	if (bits & 0xF0F0F0F0) {
+		bits &= 0xF0F0F0F0;
+		i += 4;
+	}
+	if (bits & 0xCCCCCCCC) {
+		bits &= 0xCCCCCCCC;
+		i += 2;
+	}
+	if (bits & 0xAAAAAAAA) {
+		bits &= 0xAAAAAAAA;
+		i += 1;
+	}
+	return i;
 }
-/*- End of function --------------------------------------------------------*/
 
 static __inline__ int bottom_bit(unsigned int bits)
 {
-    int i;
-
-    if (bits == 0)
-        return -1;
-    i = 32;
-    if (bits & 0x0000FFFF)
-    {
-        bits &= 0x0000FFFF;
-        i -= 16;
-    }
-    if (bits & 0x00FF00FF)
-    {
-        bits &= 0x00FF00FF;
-        i -= 8;
-    }
-    if (bits & 0x0F0F0F0F)
-    {
-        bits &= 0x0F0F0F0F;
-        i -= 4;
-    }
-    if (bits & 0x33333333)
-    {
-        bits &= 0x33333333;
-        i -= 2;
-    }
-    if (bits & 0x55555555)
-    {
-        bits &= 0x55555555;
-        i -= 1;
-    }
-    return i;
+	int i;
+
+	if (bits == 0)
+		return -1;
+	i = 32;
+	if (bits & 0x0000FFFF) {
+		bits &= 0x0000FFFF;
+		i -= 16;
+	}
+	if (bits & 0x00FF00FF) {
+		bits &= 0x00FF00FF;
+		i -= 8;
+	}
+	if (bits & 0x0F0F0F0F) {
+		bits &= 0x0F0F0F0F;
+		i -= 4;
+	}
+	if (bits & 0x33333333) {
+		bits &= 0x33333333;
+		i -= 2;
+	}
+	if (bits & 0x55555555) {
+		bits &= 0x55555555;
+		i -= 1;
+	}
+	return i;
 }
-/*- End of function --------------------------------------------------------*/
 #endif
 
 /*! \brief Bit reverse a byte.
@@ -146,16 +130,16 @@ static __inline__ int bottom_bit(unsigned int bits)
 static __inline__ uint8_t bit_reverse8(uint8_t x)
 {
 #if defined(__i386__)  ||  defined(__x86_64__)
-    /* If multiply is fast */
-    return ((x*0x0802U & 0x22110U) | (x*0x8020U & 0x88440U))*0x10101U >> 16;
+	/* If multiply is fast */
+	return ((x * 0x0802U & 0x22110U) | (x * 0x8020U & 0x88440U)) *
+	    0x10101U >> 16;
 #else
-    /* If multiply is slow, but we have a barrel shifter */
-    x = (x >> 4) | (x << 4);
-    x = ((x & 0xCC) >> 2) | ((x & 0x33) << 2);
-    return ((x & 0xAA) >> 1) | ((x & 0x55) << 1);
+	/* If multiply is slow, but we have a barrel shifter */
+	x = (x >> 4) | (x << 4);
+	x = ((x & 0xCC) >> 2) | ((x & 0x33) << 2);
+	return ((x & 0xAA) >> 1) | ((x & 0x55) << 1);
 #endif
 }
-/*- End of function --------------------------------------------------------*/
 
 /*! \brief Bit reverse a 16 bit word.
     \param data The word to be reversed.
@@ -193,9 +177,8 @@ uint16_t make_mask16(uint16_t x);
     \return The word with the single set bit. */
 static __inline__ uint32_t least_significant_one32(uint32_t x)
 {
-    return (x & (-(int32_t) x));
+	return (x & (-(int32_t) x));
 }
-/*- End of function --------------------------------------------------------*/
 
 /*! \brief Find the most significant one in a word, and return a word
            with just that bit set.
@@ -204,50 +187,42 @@ static __inline__ uint32_t least_significant_one32(uint32_t x)
 static __inline__ uint32_t most_significant_one32(uint32_t x)
 {
 #if defined(__i386__)  ||  defined(__x86_64__)
-    return 1 << top_bit(x);
+	return 1 << top_bit(x);
 #else
-    x = make_mask32(x);
-    return (x ^ (x >> 1));
+	x = make_mask32(x);
+	return (x ^ (x >> 1));
 #endif
 }
-/*- End of function --------------------------------------------------------*/
 
 /*! \brief Find the parity of a byte.
     \param x The byte to be checked.
     \return 1 for odd, or 0 for even. */
 static __inline__ int parity8(uint8_t x)
 {
-    x = (x ^ (x >> 4)) & 0x0F;
-    return (0x6996 >> x) & 1;
+	x = (x ^ (x >> 4)) & 0x0F;
+	return (0x6996 >> x) & 1;
 }
-/*- End of function --------------------------------------------------------*/
 
 /*! \brief Find the parity of a 16 bit word.
     \param x The word to be checked.
     \return 1 for odd, or 0 for even. */
 static __inline__ int parity16(uint16_t x)
 {
-    x ^= (x >> 8);
-    x = (x ^ (x >> 4)) & 0x0F;
-    return (0x6996 >> x) & 1;
+	x ^= (x >> 8);
+	x = (x ^ (x >> 4)) & 0x0F;
+	return (0x6996 >> x) & 1;
 }
-/*- End of function --------------------------------------------------------*/
 
 /*! \brief Find the parity of a 32 bit word.
     \param x The word to be checked.
     \return 1 for odd, or 0 for even. */
 static __inline__ int parity32(uint32_t x)
 {
-    x ^= (x >> 16);
-    x ^= (x >> 8);
-    x = (x ^ (x >> 4)) & 0x0F;
-    return (0x6996 >> x) & 1;
+	x ^= (x >> 16);
+	x ^= (x >> 8);
+	x = (x ^ (x >> 4)) & 0x0F;
+	return (0x6996 >> x) & 1;
 }
-/*- End of function --------------------------------------------------------*/
-
-#ifdef __cplusplus
-}
-#endif
 
 #endif
 /*- End of file ------------------------------------------------------------*/

drivers/staging/echo/echo.c

@@ -74,7 +74,6 @@
 
    Steve also has some nice notes on echo cancellers in echo.h
 
-
    References:
 
    [1] Ochiai, Areseki, and Ogihara, "Echo Canceller with Two Echo
@@ -105,20 +104,18 @@
    Mark, Pawel, and Pavel.
 */
 
-#include <linux/kernel.h>       /* We're doing kernel work */
+#include <linux/kernel.h>	/* We're doing kernel work */
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/slab.h>
-#define malloc(a) kmalloc((a), GFP_KERNEL)
-#define free(a) kfree(a)
 
 #include "bit_operations.h"
 #include "echo.h"
 
 #define MIN_TX_POWER_FOR_ADAPTION   64
 #define MIN_RX_POWER_FOR_ADAPTION   64
-#define DTD_HANGOVER               600     /* 600 samples, or 75ms     */
-#define DC_LOG2BETA                  3     /* log2() of DC filter Beta */
+#define DTD_HANGOVER               600	/* 600 samples, or 75ms     */
+#define DC_LOG2BETA                  3	/* log2() of DC filter Beta */
 
 /*-----------------------------------------------------------------------*\
                                FUNCTIONS
@@ -126,59 +123,58 @@
 
 /* adapting coeffs using the traditional stochastic descent (N)LMS algorithm */
 
-
-#ifdef __BLACKFIN_ASM__
-static void __inline__ lms_adapt_bg(echo_can_state_t *ec, int clean, int shift)
+#ifdef __bfin__
+static void __inline__ lms_adapt_bg(struct oslec_state *ec, int clean,
+				    int shift)
 {
-    int i, j;
-    int offset1;
-    int offset2;
-    int factor;
-    int exp;
-    int16_t *phist;
-    int n;
-
-    if (shift > 0)
-	factor = clean << shift;
-    else
-	factor = clean >> -shift;
-
-    /* Update the FIR taps */
-
-    offset2 = ec->curr_pos;
-    offset1 = ec->taps - offset2;
-    phist = &ec->fir_state_bg.history[offset2];
-
-    /* st: and en: help us locate the assembler in echo.s */
-
-    //asm("st:");
-    n = ec->taps;
-    for (i = 0, j = offset2;  i < n;  i++, j++)
-    {
-       exp = *phist++ * factor;
-       ec->fir_taps16[1][i] += (int16_t) ((exp+(1<<14)) >> 15);
-    }
-    //asm("en:");
-
-    /* Note the asm for the inner loop above generated by Blackfin gcc
-       4.1.1 is pretty good (note even parallel instructions used):
-
-    	R0 = W [P0++] (X);
-	R0 *= R2;
-	R0 = R0 + R3 (NS) ||
-	R1 = W [P1] (X) ||
-	nop;
-	R0 >>>= 15;
-	R0 = R0 + R1;
-	W [P1++] = R0;
-
-	A block based update algorithm would be much faster but the
-	above can't be improved on much.  Every instruction saved in
-	the loop above is 2 MIPs/ch!  The for loop above is where the
-	Blackfin spends most of it's time - about 17 MIPs/ch measured
-	with speedtest.c with 256 taps (32ms).  Write-back and
-	Write-through cache gave about the same performance.
-    */
+	int i, j;
+	int offset1;
+	int offset2;
+	int factor;
+	int exp;
+	int16_t *phist;
+	int n;
+
+	if (shift > 0)
+		factor = clean << shift;
+	else
+		factor = clean >> -shift;
+
+	/* Update the FIR taps */
+
+	offset2 = ec->curr_pos;
+	offset1 = ec->taps - offset2;
+	phist = &ec->fir_state_bg.history[offset2];
+
+	/* st: and en: help us locate the assembler in echo.s */
+
+	//asm("st:");
+	n = ec->taps;
+	for (i = 0, j = offset2; i < n; i++, j++) {
+		exp = *phist++ * factor;
+		ec->fir_taps16[1][i] += (int16_t) ((exp + (1 << 14)) >> 15);
+	}
+	//asm("en:");
+
+	/* Note the asm for the inner loop above generated by Blackfin gcc
+	   4.1.1 is pretty good (note even parallel instructions used):
+
+	   R0 = W [P0++] (X);
+	   R0 *= R2;
+	   R0 = R0 + R3 (NS) ||
+	   R1 = W [P1] (X) ||
+	   nop;
+	   R0 >>>= 15;
+	   R0 = R0 + R1;
+	   W [P1++] = R0;
+
+	   A block based update algorithm would be much faster but the
+	   above can't be improved on much.  Every instruction saved in
+	   the loop above is 2 MIPs/ch!  The for loop above is where the
+	   Blackfin spends most of it's time - about 17 MIPs/ch measured
+	   with speedtest.c with 256 taps (32ms).  Write-back and
+	   Write-through cache gave about the same performance.
+	 */
 }
 
 /*
@@ -200,392 +196,393 @@ static void __inline__ lms_adapt_bg(echo_can_state_t *ec, int clean, int shift)
 */
 
 #else
-static __inline__ void lms_adapt_bg(echo_can_state_t *ec, int clean, int shift)
+static __inline__ void lms_adapt_bg(struct oslec_state *ec, int clean,
+				    int shift)
 {
-    int i;
-
-    int offset1;
-    int offset2;
-    int factor;
-    int exp;
-
-    if (shift > 0)
-	factor = clean << shift;
-    else
-	factor = clean >> -shift;
-
-    /* Update the FIR taps */
-
-    offset2 = ec->curr_pos;
-    offset1 = ec->taps - offset2;
-
-    for (i = ec->taps - 1;  i >= offset1;  i--)
-    {
-       exp = (ec->fir_state_bg.history[i - offset1]*factor);
-       ec->fir_taps16[1][i] += (int16_t) ((exp+(1<<14)) >> 15);
-    }
-    for (  ;  i >= 0;  i--)
-    {
-       exp = (ec->fir_state_bg.history[i + offset2]*factor);
-       ec->fir_taps16[1][i] += (int16_t) ((exp+(1<<14)) >> 15);
-    }
+	int i;
+
+	int offset1;
+	int offset2;
+	int factor;
+	int exp;
+
+	if (shift > 0)
+		factor = clean << shift;
+	else
+		factor = clean >> -shift;
+
+	/* Update the FIR taps */
+
+	offset2 = ec->curr_pos;
+	offset1 = ec->taps - offset2;
+
+	for (i = ec->taps - 1; i >= offset1; i--) {
+		exp = (ec->fir_state_bg.history[i - offset1] * factor);
+		ec->fir_taps16[1][i] += (int16_t) ((exp + (1 << 14)) >> 15);
+	}
+	for (; i >= 0; i--) {
+		exp = (ec->fir_state_bg.history[i + offset2] * factor);
+		ec->fir_taps16[1][i] += (int16_t) ((exp + (1 << 14)) >> 15);
+	}
 }
 #endif
 
-/*- End of function --------------------------------------------------------*/
-
-echo_can_state_t *echo_can_create(int len, int adaption_mode)
+struct oslec_state *oslec_create(int len, int adaption_mode)
 {
-    echo_can_state_t *ec;
-    int i;
-    int j;
-
-    ec = kmalloc(sizeof(*ec), GFP_KERNEL);
-    if (ec == NULL)
-        return  NULL;
-    memset(ec, 0, sizeof(*ec));
-
-    ec->taps = len;
-    ec->log2taps = top_bit(len);
-    ec->curr_pos = ec->taps - 1;
-
-    for (i = 0;  i < 2;  i++)
-    {
-        if ((ec->fir_taps16[i] = (int16_t *) malloc((ec->taps)*sizeof(int16_t))) == NULL)
-        {
-            for (j = 0;  j < i;  j++)
-                kfree(ec->fir_taps16[j]);
-            kfree(ec);
-            return  NULL;
-        }
-        memset(ec->fir_taps16[i], 0, (ec->taps)*sizeof(int16_t));
-    }
-
-    fir16_create(&ec->fir_state,
-                 ec->fir_taps16[0],
-                 ec->taps);
-    fir16_create(&ec->fir_state_bg,
-                 ec->fir_taps16[1],
-                 ec->taps);
-
-    for(i=0; i<5; i++) {
-      ec->xvtx[i] = ec->yvtx[i] = ec->xvrx[i] = ec->yvrx[i] = 0;
-    }
-
-    ec->cng_level = 1000;
-    echo_can_adaption_mode(ec, adaption_mode);
-
-    ec->snapshot = (int16_t*)malloc(ec->taps*sizeof(int16_t));
-    memset(ec->snapshot, 0, sizeof(int16_t)*ec->taps);
-
-    ec->cond_met = 0;
-    ec->Pstates = 0;
-    ec->Ltxacc = ec->Lrxacc = ec->Lcleanacc = ec->Lclean_bgacc = 0;
-    ec->Ltx = ec->Lrx = ec->Lclean = ec->Lclean_bg = 0;
-    ec->tx_1 = ec->tx_2 = ec->rx_1 = ec->rx_2 = 0;
-    ec->Lbgn = ec->Lbgn_acc = 0;
-    ec->Lbgn_upper = 200;
-    ec->Lbgn_upper_acc = ec->Lbgn_upper << 13;
-
-    return  ec;
+	struct oslec_state *ec;
+	int i;
+
+	ec = kzalloc(sizeof(*ec), GFP_KERNEL);
+	if (!ec)
+		return NULL;
+
+	ec->taps = len;
+	ec->log2taps = top_bit(len);
+	ec->curr_pos = ec->taps - 1;
+
+	for (i = 0; i < 2; i++) {
+		ec->fir_taps16[i] =
+		    kcalloc(ec->taps, sizeof(int16_t), GFP_KERNEL);
+		if (!ec->fir_taps16[i])
+			goto error_oom;
+	}
+
+	fir16_create(&ec->fir_state, ec->fir_taps16[0], ec->taps);
+	fir16_create(&ec->fir_state_bg, ec->fir_taps16[1], ec->taps);
+
+	for (i = 0; i < 5; i++) {
+		ec->xvtx[i] = ec->yvtx[i] = ec->xvrx[i] = ec->yvrx[i] = 0;
+	}
+
+	ec->cng_level = 1000;
+	oslec_adaption_mode(ec, adaption_mode);
+
+	ec->snapshot = kcalloc(ec->taps, sizeof(int16_t), GFP_KERNEL);
+	if (!ec->snapshot)
+		goto error_oom;
+
+	ec->cond_met = 0;
+	ec->Pstates = 0;
+	ec->Ltxacc = ec->Lrxacc = ec->Lcleanacc = ec->Lclean_bgacc = 0;
+	ec->Ltx = ec->Lrx = ec->Lclean = ec->Lclean_bg = 0;
+	ec->tx_1 = ec->tx_2 = ec->rx_1 = ec->rx_2 = 0;
+	ec->Lbgn = ec->Lbgn_acc = 0;
+	ec->Lbgn_upper = 200;
+	ec->Lbgn_upper_acc = ec->Lbgn_upper << 13;
+
+	return ec;
+
+      error_oom:
+	for (i = 0; i < 2; i++)
+		kfree(ec->fir_taps16[i]);
+
+	kfree(ec);
+	return NULL;
 }
-/*- End of function --------------------------------------------------------*/
 
-void echo_can_free(echo_can_state_t *ec)
+EXPORT_SYMBOL_GPL(oslec_create);
+
+void oslec_free(struct oslec_state *ec)
 {
 	int i;
 
 	fir16_free(&ec->fir_state);
 	fir16_free(&ec->fir_state_bg);
-	for (i = 0;  i < 2;  i++)
+	for (i = 0; i < 2; i++)
 		kfree(ec->fir_taps16[i]);
 	kfree(ec->snapshot);
 	kfree(ec);
 }
-/*- End of function --------------------------------------------------------*/
 
-void echo_can_adaption_mode(echo_can_state_t *ec, int adaption_mode)
+EXPORT_SYMBOL_GPL(oslec_free);
+
+void oslec_adaption_mode(struct oslec_state *ec, int adaption_mode)
 {
-    ec->adaption_mode = adaption_mode;
+	ec->adaption_mode = adaption_mode;
 }
-/*- End of function --------------------------------------------------------*/
 
-void echo_can_flush(echo_can_state_t *ec)
+EXPORT_SYMBOL_GPL(oslec_adaption_mode);
+
+void oslec_flush(struct oslec_state *ec)
 {
-    int i;
+	int i;
 
-    ec->Ltxacc = ec->Lrxacc = ec->Lcleanacc = ec->Lclean_bgacc = 0;
-    ec->Ltx = ec->Lrx = ec->Lclean = ec->Lclean_bg = 0;
-    ec->tx_1 = ec->tx_2 = ec->rx_1 = ec->rx_2 = 0;
+	ec->Ltxacc = ec->Lrxacc = ec->Lcleanacc = ec->Lclean_bgacc = 0;
+	ec->Ltx = ec->Lrx = ec->Lclean = ec->Lclean_bg = 0;
+	ec->tx_1 = ec->tx_2 = ec->rx_1 = ec->rx_2 = 0;
 
-    ec->Lbgn = ec->Lbgn_acc = 0;
-    ec->Lbgn_upper = 200;
-    ec->Lbgn_upper_acc = ec->Lbgn_upper << 13;
+	ec->Lbgn = ec->Lbgn_acc = 0;
+	ec->Lbgn_upper = 200;
+	ec->Lbgn_upper_acc = ec->Lbgn_upper << 13;
 
-    ec->nonupdate_dwell = 0;
+	ec->nonupdate_dwell = 0;
 
-    fir16_flush(&ec->fir_state);
-    fir16_flush(&ec->fir_state_bg);
-    ec->fir_state.curr_pos = ec->taps - 1;
-    ec->fir_state_bg.curr_pos = ec->taps - 1;
-    for (i = 0;  i < 2;  i++)
-        memset(ec->fir_taps16[i], 0, ec->taps*sizeof(int16_t));
+	fir16_flush(&ec->fir_state);
+	fir16_flush(&ec->fir_state_bg);
+	ec->fir_state.curr_pos = ec->taps - 1;
+	ec->fir_state_bg.curr_pos = ec->taps - 1;
+	for (i = 0; i < 2; i++)
+		memset(ec->fir_taps16[i], 0, ec->taps * sizeof(int16_t));
 
-    ec->curr_pos = ec->taps - 1;
-    ec->Pstates = 0;
+	ec->curr_pos = ec->taps - 1;
+	ec->Pstates = 0;
 }
-/*- End of function --------------------------------------------------------*/
 
-void echo_can_snapshot(echo_can_state_t *ec) {
-    memcpy(ec->snapshot, ec->fir_taps16[0], ec->taps*sizeof(int16_t));
+EXPORT_SYMBOL_GPL(oslec_flush);
+
+void oslec_snapshot(struct oslec_state *ec)
+{
+	memcpy(ec->snapshot, ec->fir_taps16[0], ec->taps * sizeof(int16_t));
 }
-/*- End of function --------------------------------------------------------*/
+
+EXPORT_SYMBOL_GPL(oslec_snapshot);
 
 /* Dual Path Echo Canceller ------------------------------------------------*/
 
-int16_t echo_can_update(echo_can_state_t *ec, int16_t tx, int16_t rx)
+int16_t oslec_update(struct oslec_state *ec, int16_t tx, int16_t rx)
 {
-    int32_t echo_value;
-    int clean_bg;
-    int tmp, tmp1;
-
-    /* Input scaling was found be required to prevent problems when tx
-       starts clipping.  Another possible way to handle this would be the
-       filter coefficent scaling. */
-
-    ec->tx = tx; ec->rx = rx;
-    tx >>=1;
-    rx >>=1;
-
-    /*
-       Filter DC, 3dB point is 160Hz (I think), note 32 bit precision required
-       otherwise values do not track down to 0. Zero at DC, Pole at (1-Beta)
-       only real axis.  Some chip sets (like Si labs) don't need
-       this, but something like a $10 X100P card does.  Any DC really slows
-       down convergence.
-
-       Note: removes some low frequency from the signal, this reduces
-       the speech quality when listening to samples through headphones
-       but may not be obvious through a telephone handset.
-
-       Note that the 3dB frequency in radians is approx Beta, e.g. for
-       Beta = 2^(-3) = 0.125, 3dB freq is 0.125 rads = 159Hz.
-    */
-
-    if (ec->adaption_mode & ECHO_CAN_USE_RX_HPF) {
-      tmp = rx << 15;
+	int32_t echo_value;
+	int clean_bg;
+	int tmp, tmp1;
+
+	/* Input scaling was found be required to prevent problems when tx
+	   starts clipping.  Another possible way to handle this would be the
+	   filter coefficent scaling. */
+
+	ec->tx = tx;
+	ec->rx = rx;
+	tx >>= 1;
+	rx >>= 1;
+
+	/*
+	   Filter DC, 3dB point is 160Hz (I think), note 32 bit precision required
+	   otherwise values do not track down to 0. Zero at DC, Pole at (1-Beta)
+	   only real axis.  Some chip sets (like Si labs) don't need
+	   this, but something like a $10 X100P card does.  Any DC really slows
+	   down convergence.
+
+	   Note: removes some low frequency from the signal, this reduces
+	   the speech quality when listening to samples through headphones
+	   but may not be obvious through a telephone handset.
+
+	   Note that the 3dB frequency in radians is approx Beta, e.g. for
+	   Beta = 2^(-3) = 0.125, 3dB freq is 0.125 rads = 159Hz.
+	 */
+
+	if (ec->adaption_mode & ECHO_CAN_USE_RX_HPF) {
+		tmp = rx << 15;
 #if 1
-        /* Make sure the gain of the HPF is 1.0. This can still saturate a little under
-           impulse conditions, and it might roll to 32768 and need clipping on sustained peak
-           level signals. However, the scale of such clipping is small, and the error due to
-           any saturation should not markedly affect the downstream processing. */
-        tmp -= (tmp >> 4);
+		/* Make sure the gain of the HPF is 1.0. This can still saturate a little under
+		   impulse conditions, and it might roll to 32768 and need clipping on sustained peak
+		   level signals. However, the scale of such clipping is small, and the error due to
+		   any saturation should not markedly affect the downstream processing. */
+		tmp -= (tmp >> 4);
 #endif
-      ec->rx_1 += -(ec->rx_1>>DC_LOG2BETA) + tmp - ec->rx_2;
+		ec->rx_1 += -(ec->rx_1 >> DC_LOG2BETA) + tmp - ec->rx_2;
+
+		/* hard limit filter to prevent clipping.  Note that at this stage
+		   rx should be limited to +/- 16383 due to right shift above */
+		tmp1 = ec->rx_1 >> 15;
+		if (tmp1 > 16383)
+			tmp1 = 16383;
+		if (tmp1 < -16383)
+			tmp1 = -16383;
+		rx = tmp1;
+		ec->rx_2 = tmp;
+	}
 
-      /* hard limit filter to prevent clipping.  Note that at this stage
-	 rx should be limited to +/- 16383 due to right shift above */
-      tmp1 = ec->rx_1 >> 15;
-      if (tmp1 > 16383) tmp1 = 16383;
-      if (tmp1 < -16383) tmp1 = -16383;
-      rx = tmp1;
-      ec->rx_2 = tmp;
-    }
+	/* Block average of power in the filter states.  Used for
+	   adaption power calculation. */
 
-    /* Block average of power in the filter states.  Used for
-       adaption power calculation. */
+	{
+		int new, old;
+
+		/* efficient "out with the old and in with the new" algorithm so
+		   we don't have to recalculate over the whole block of
+		   samples. */
+		new = (int)tx *(int)tx;
+		old = (int)ec->fir_state.history[ec->fir_state.curr_pos] *
+		    (int)ec->fir_state.history[ec->fir_state.curr_pos];
+		ec->Pstates +=
+		    ((new - old) + (1 << ec->log2taps)) >> ec->log2taps;
+		if (ec->Pstates < 0)
+			ec->Pstates = 0;
+	}
 
-    {
-	int new, old;
+	/* Calculate short term average levels using simple single pole IIRs */
 
-	/* efficient "out with the old and in with the new" algorithm so
-	   we don't have to recalculate over the whole block of
-	   samples. */
-	new = (int)tx * (int)tx;
-	old = (int)ec->fir_state.history[ec->fir_state.curr_pos] *
-              (int)ec->fir_state.history[ec->fir_state.curr_pos];
-	ec->Pstates += ((new - old) + (1<<ec->log2taps)) >> ec->log2taps;
-	if (ec->Pstates < 0) ec->Pstates = 0;
-    }
-
-    /* Calculate short term average levels using simple single pole IIRs */
-
-    ec->Ltxacc += abs(tx) - ec->Ltx;
-    ec->Ltx = (ec->Ltxacc + (1<<4)) >> 5;
-    ec->Lrxacc += abs(rx) - ec->Lrx;
-    ec->Lrx = (ec->Lrxacc + (1<<4)) >> 5;
-
-    /* Foreground filter ---------------------------------------------------*/
-
-    ec->fir_state.coeffs = ec->fir_taps16[0];
-    echo_value = fir16(&ec->fir_state, tx);
-    ec->clean = rx - echo_value;
-    ec->Lcleanacc += abs(ec->clean) - ec->Lclean;
-    ec->Lclean = (ec->Lcleanacc + (1<<4)) >> 5;
-
-    /* Background filter ---------------------------------------------------*/
-
-    echo_value = fir16(&ec->fir_state_bg, tx);
-    clean_bg = rx - echo_value;
-    ec->Lclean_bgacc += abs(clean_bg) - ec->Lclean_bg;
-    ec->Lclean_bg = (ec->Lclean_bgacc + (1<<4)) >> 5;
-
-    /* Background Filter adaption -----------------------------------------*/
-
-    /* Almost always adap bg filter, just simple DT and energy
-       detection to minimise adaption in cases of strong double talk.
-       However this is not critical for the dual path algorithm.
-    */
-    ec->factor = 0;
-    ec->shift = 0;
-    if ((ec->nonupdate_dwell == 0)) {
-	int   P, logP, shift;
-
-	/* Determine:
-
-	   f = Beta * clean_bg_rx/P ------ (1)
-
-	   where P is the total power in the filter states.
-
-	   The Boffins have shown that if we obey (1) we converge
-	   quickly and avoid instability.
-
-	   The correct factor f must be in Q30, as this is the fixed
-	   point format required by the lms_adapt_bg() function,
-	   therefore the scaled version of (1) is:
-
-	   (2^30) * f  = (2^30) * Beta * clean_bg_rx/P
-	       factor  = (2^30) * Beta * clean_bg_rx/P         ----- (2)
-
-	   We have chosen Beta = 0.25 by experiment, so:
-
-	       factor  = (2^30) * (2^-2) * clean_bg_rx/P
-
-                                       (30 - 2 - log2(P))
-	       factor  = clean_bg_rx 2                         ----- (3)
-
-	   To avoid a divide we approximate log2(P) as top_bit(P),
-	   which returns the position of the highest non-zero bit in
-	   P.  This approximation introduces an error as large as a
-	   factor of 2, but the algorithm seems to handle it OK.
-
-	   Come to think of it a divide may not be a big deal on a
-	   modern DSP, so its probably worth checking out the cycles
-	   for a divide versus a top_bit() implementation.
-	*/
-
-	P = MIN_TX_POWER_FOR_ADAPTION + ec->Pstates;
-	logP = top_bit(P) + ec->log2taps;
-	shift = 30 - 2 - logP;
-	ec->shift = shift;
-
-	lms_adapt_bg(ec, clean_bg, shift);
-    }
-
-    /* very simple DTD to make sure we dont try and adapt with strong
-       near end speech */
-
-    ec->adapt = 0;
-    if ((ec->Lrx > MIN_RX_POWER_FOR_ADAPTION) && (ec->Lrx > ec->Ltx))
-	ec->nonupdate_dwell = DTD_HANGOVER;
-    if (ec->nonupdate_dwell)
-	ec->nonupdate_dwell--;
+	ec->Ltxacc += abs(tx) - ec->Ltx;
+	ec->Ltx = (ec->Ltxacc + (1 << 4)) >> 5;
+	ec->Lrxacc += abs(rx) - ec->Lrx;
+	ec->Lrx = (ec->Lrxacc + (1 << 4)) >> 5;
 
-    /* Transfer logic ------------------------------------------------------*/
+	/* Foreground filter --------------------------------------------------- */
 
-    /* These conditions are from the dual path paper [1], I messed with
-       them a bit to improve performance. */
+	ec->fir_state.coeffs = ec->fir_taps16[0];
+	echo_value = fir16(&ec->fir_state, tx);
+	ec->clean = rx - echo_value;
+	ec->Lcleanacc += abs(ec->clean) - ec->Lclean;
+	ec->Lclean = (ec->Lcleanacc + (1 << 4)) >> 5;
 
-    if ((ec->adaption_mode & ECHO_CAN_USE_ADAPTION) &&
-	(ec->nonupdate_dwell == 0) &&
-	(8*ec->Lclean_bg < 7*ec->Lclean) /* (ec->Lclean_bg < 0.875*ec->Lclean) */ &&
-	(8*ec->Lclean_bg < ec->Ltx)      /* (ec->Lclean_bg < 0.125*ec->Ltx)    */ )
-    {
-	if (ec->cond_met == 6) {
-	    /* BG filter has had better results for 6 consecutive samples */
-	    ec->adapt = 1;
-	    memcpy(ec->fir_taps16[0], ec->fir_taps16[1], ec->taps*sizeof(int16_t));
-	}
-	else
-	    ec->cond_met++;
-    }
-    else
-	ec->cond_met = 0;
+	/* Background filter --------------------------------------------------- */
 
-    /* Non-Linear Processing ---------------------------------------------------*/
+	echo_value = fir16(&ec->fir_state_bg, tx);
+	clean_bg = rx - echo_value;
+	ec->Lclean_bgacc += abs(clean_bg) - ec->Lclean_bg;
+	ec->Lclean_bg = (ec->Lclean_bgacc + (1 << 4)) >> 5;
 
-    ec->clean_nlp = ec->clean;
-    if (ec->adaption_mode & ECHO_CAN_USE_NLP)
-    {
-        /* Non-linear processor - a fancy way to say "zap small signals, to avoid
-           residual echo due to (uLaw/ALaw) non-linearity in the channel.". */
+	/* Background Filter adaption ----------------------------------------- */
 
-      if ((16*ec->Lclean < ec->Ltx))
-      {
-	/* Our e/c has improved echo by at least 24 dB (each factor of 2 is 6dB,
-	   so 2*2*2*2=16 is the same as 6+6+6+6=24dB) */
-        if (ec->adaption_mode & ECHO_CAN_USE_CNG)
-	{
-	    ec->cng_level = ec->Lbgn;
-
-	    /* Very elementary comfort noise generation.  Just random
-	       numbers rolled off very vaguely Hoth-like.  DR: This
-	       noise doesn't sound quite right to me - I suspect there
-	       are some overlfow issues in the filtering as it's too
-	       "crackly".  TODO: debug this, maybe just play noise at
-	       high level or look at spectrum.
-	    */
-
-	    ec->cng_rndnum = 1664525U*ec->cng_rndnum + 1013904223U;
-	    ec->cng_filter = ((ec->cng_rndnum & 0xFFFF) - 32768 + 5*ec->cng_filter) >> 3;
-	    ec->clean_nlp = (ec->cng_filter*ec->cng_level*8) >> 14;
-
-        }
-        else if (ec->adaption_mode & ECHO_CAN_USE_CLIP)
-	{
-	    /* This sounds much better than CNG */
-	    if (ec->clean_nlp > ec->Lbgn)
-	      ec->clean_nlp = ec->Lbgn;
-	    if (ec->clean_nlp < -ec->Lbgn)
-	      ec->clean_nlp = -ec->Lbgn;
+	/* Almost always adap bg filter, just simple DT and energy
+	   detection to minimise adaption in cases of strong double talk.
+	   However this is not critical for the dual path algorithm.
+	 */
+	ec->factor = 0;
+	ec->shift = 0;
+	if ((ec->nonupdate_dwell == 0)) {
+		int P, logP, shift;
+
+		/* Determine:
+
+		   f = Beta * clean_bg_rx/P ------ (1)
+
+		   where P is the total power in the filter states.
+
+		   The Boffins have shown that if we obey (1) we converge
+		   quickly and avoid instability.
+
+		   The correct factor f must be in Q30, as this is the fixed
+		   point format required by the lms_adapt_bg() function,
+		   therefore the scaled version of (1) is:
+
+		   (2^30) * f  = (2^30) * Beta * clean_bg_rx/P
+		   factor  = (2^30) * Beta * clean_bg_rx/P         ----- (2)
+
+		   We have chosen Beta = 0.25 by experiment, so:
+
+		   factor  = (2^30) * (2^-2) * clean_bg_rx/P
+
+		   (30 - 2 - log2(P))
+		   factor  = clean_bg_rx 2                         ----- (3)
+
+		   To avoid a divide we approximate log2(P) as top_bit(P),
+		   which returns the position of the highest non-zero bit in
+		   P.  This approximation introduces an error as large as a
+		   factor of 2, but the algorithm seems to handle it OK.
+
+		   Come to think of it a divide may not be a big deal on a
+		   modern DSP, so its probably worth checking out the cycles
+		   for a divide versus a top_bit() implementation.
+		 */
+
+		P = MIN_TX_POWER_FOR_ADAPTION + ec->Pstates;
+		logP = top_bit(P) + ec->log2taps;
+		shift = 30 - 2 - logP;
+		ec->shift = shift;
+
+		lms_adapt_bg(ec, clean_bg, shift);
 	}
-	else
-        {
-	  /* just mute the residual, doesn't sound very good, used mainly
-	     in G168 tests */
-          ec->clean_nlp = 0;
-        }
-      }
-      else {
-	  /* Background noise estimator.  I tried a few algorithms
-	     here without much luck.  This very simple one seems to
-	     work best, we just average the level using a slow (1 sec
-	     time const) filter if the current level is less than a
-	     (experimentally derived) constant.  This means we dont
-	     include high level signals like near end speech.  When
-	     combined with CNG or especially CLIP seems to work OK.
-	  */
-	  if (ec->Lclean < 40) {
-	      ec->Lbgn_acc += abs(ec->clean) - ec->Lbgn;
-	      ec->Lbgn = (ec->Lbgn_acc + (1<<11)) >> 12;
-	  }
-       }
-    }
-
-    /* Roll around the taps buffer */
-    if (ec->curr_pos <= 0)
-        ec->curr_pos = ec->taps;
-    ec->curr_pos--;
-
-    if (ec->adaption_mode & ECHO_CAN_DISABLE)
-      ec->clean_nlp = rx;
-
-    /* Output scaled back up again to match input scaling */
-
-    return (int16_t) ec->clean_nlp << 1;
+
+	/* very simple DTD to make sure we dont try and adapt with strong
+	   near end speech */
+
+	ec->adapt = 0;
+	if ((ec->Lrx > MIN_RX_POWER_FOR_ADAPTION) && (ec->Lrx > ec->Ltx))
+		ec->nonupdate_dwell = DTD_HANGOVER;
+	if (ec->nonupdate_dwell)
+		ec->nonupdate_dwell--;
+
+	/* Transfer logic ------------------------------------------------------ */
+
+	/* These conditions are from the dual path paper [1], I messed with
+	   them a bit to improve performance. */
+
+	if ((ec->adaption_mode & ECHO_CAN_USE_ADAPTION) &&
+	    (ec->nonupdate_dwell == 0) &&
+	    (8 * ec->Lclean_bg <
+	     7 * ec->Lclean) /* (ec->Lclean_bg < 0.875*ec->Lclean) */ &&
+	    (8 * ec->Lclean_bg <
+	     ec->Ltx) /* (ec->Lclean_bg < 0.125*ec->Ltx)    */ ) {
+		if (ec->cond_met == 6) {
+			/* BG filter has had better results for 6 consecutive samples */
+			ec->adapt = 1;
+			memcpy(ec->fir_taps16[0], ec->fir_taps16[1],
+			       ec->taps * sizeof(int16_t));
+		} else
+			ec->cond_met++;
+	} else
+		ec->cond_met = 0;
+
+	/* Non-Linear Processing --------------------------------------------------- */
+
+	ec->clean_nlp = ec->clean;
+	if (ec->adaption_mode & ECHO_CAN_USE_NLP) {
+		/* Non-linear processor - a fancy way to say "zap small signals, to avoid
+		   residual echo due to (uLaw/ALaw) non-linearity in the channel.". */
+
+		if ((16 * ec->Lclean < ec->Ltx)) {
+			/* Our e/c has improved echo by at least 24 dB (each factor of 2 is 6dB,
+			   so 2*2*2*2=16 is the same as 6+6+6+6=24dB) */
+			if (ec->adaption_mode & ECHO_CAN_USE_CNG) {
+				ec->cng_level = ec->Lbgn;
+
+				/* Very elementary comfort noise generation.  Just random
+				   numbers rolled off very vaguely Hoth-like.  DR: This
+				   noise doesn't sound quite right to me - I suspect there
+				   are some overlfow issues in the filtering as it's too
+				   "crackly".  TODO: debug this, maybe just play noise at
+				   high level or look at spectrum.
+				 */
+
+				ec->cng_rndnum =
+				    1664525U * ec->cng_rndnum + 1013904223U;
+				ec->cng_filter =
+				    ((ec->cng_rndnum & 0xFFFF) - 32768 +
+				     5 * ec->cng_filter) >> 3;
+				ec->clean_nlp =
+				    (ec->cng_filter * ec->cng_level * 8) >> 14;
+
+			} else if (ec->adaption_mode & ECHO_CAN_USE_CLIP) {
+				/* This sounds much better than CNG */
+				if (ec->clean_nlp > ec->Lbgn)
+					ec->clean_nlp = ec->Lbgn;
+				if (ec->clean_nlp < -ec->Lbgn)
+					ec->clean_nlp = -ec->Lbgn;
+			} else {
+				/* just mute the residual, doesn't sound very good, used mainly
+				   in G168 tests */
+				ec->clean_nlp = 0;
+			}
+		} else {
+			/* Background noise estimator.  I tried a few algorithms
+			   here without much luck.  This very simple one seems to
+			   work best, we just average the level using a slow (1 sec
+			   time const) filter if the current level is less than a
+			   (experimentally derived) constant.  This means we dont
+			   include high level signals like near end speech.  When
+			   combined with CNG or especially CLIP seems to work OK.
+			 */
+			if (ec->Lclean < 40) {
+				ec->Lbgn_acc += abs(ec->clean) - ec->Lbgn;
+				ec->Lbgn = (ec->Lbgn_acc + (1 << 11)) >> 12;
+			}
+		}
+	}
+
+	/* Roll around the taps buffer */
+	if (ec->curr_pos <= 0)
+		ec->curr_pos = ec->taps;
+	ec->curr_pos--;
+
+	if (ec->adaption_mode & ECHO_CAN_DISABLE)
+		ec->clean_nlp = rx;
+
+	/* Output scaled back up again to match input scaling */
+
+	return (int16_t) ec->clean_nlp << 1;
 }
 
-/*- End of function --------------------------------------------------------*/
+EXPORT_SYMBOL_GPL(oslec_update);
 
 /* This function is seperated from the echo canceller is it is usually called
    as part of the tx process.  See rx HP (DC blocking) filter above, it's
@@ -608,25 +605,35 @@ int16_t echo_can_update(echo_can_state_t *ec, int16_t tx, int16_t rx)
    precision, which noise shapes things, giving very clean DC removal.
 */
 
-int16_t echo_can_hpf_tx(echo_can_state_t *ec, int16_t tx) {
-    int tmp, tmp1;
+int16_t oslec_hpf_tx(struct oslec_state * ec, int16_t tx)
+{
+	int tmp, tmp1;
 
-    if (ec->adaption_mode & ECHO_CAN_USE_TX_HPF) {
-        tmp = tx << 15;
+	if (ec->adaption_mode & ECHO_CAN_USE_TX_HPF) {
+		tmp = tx << 15;
 #if 1
-        /* Make sure the gain of the HPF is 1.0. The first can still saturate a little under
-           impulse conditions, and it might roll to 32768 and need clipping on sustained peak
-           level signals. However, the scale of such clipping is small, and the error due to
-           any saturation should not markedly affect the downstream processing. */
-        tmp -= (tmp >> 4);
+		/* Make sure the gain of the HPF is 1.0. The first can still saturate a little under
+		   impulse conditions, and it might roll to 32768 and need clipping on sustained peak
+		   level signals. However, the scale of such clipping is small, and the error due to
+		   any saturation should not markedly affect the downstream processing. */
+		tmp -= (tmp >> 4);
 #endif
-        ec->tx_1 += -(ec->tx_1>>DC_LOG2BETA) + tmp - ec->tx_2;
-        tmp1 = ec->tx_1 >> 15;
-	if (tmp1 > 32767) tmp1 = 32767;
-	if (tmp1 < -32767) tmp1 = -32767;
-	tx = tmp1;
-        ec->tx_2 = tmp;
-    }
-
-    return tx;
+		ec->tx_1 += -(ec->tx_1 >> DC_LOG2BETA) + tmp - ec->tx_2;
+		tmp1 = ec->tx_1 >> 15;
+		if (tmp1 > 32767)
+			tmp1 = 32767;
+		if (tmp1 < -32767)
+			tmp1 = -32767;
+		tx = tmp1;
+		ec->tx_2 = tmp;
+	}
+
+	return tx;
 }
+
+EXPORT_SYMBOL_GPL(oslec_hpf_tx);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("David Rowe");
+MODULE_DESCRIPTION("Open Source Line Echo Canceller");
+MODULE_VERSION("0.3.0");

drivers/staging/echo/echo.h

@@ -118,23 +118,14 @@ a minor burden.
 */
 
 #include "fir.h"
-
-/* Mask bits for the adaption mode */
-#define ECHO_CAN_USE_ADAPTION	0x01
-#define ECHO_CAN_USE_NLP	0x02
-#define ECHO_CAN_USE_CNG	0x04
-#define ECHO_CAN_USE_CLIP	0x08
-#define ECHO_CAN_USE_TX_HPF	0x10
-#define ECHO_CAN_USE_RX_HPF	0x20
-#define ECHO_CAN_DISABLE	0x40
+#include "oslec.h"
 
 /*!
     G.168 echo canceller descriptor. This defines the working state for a line
     echo canceller.
 */
-typedef struct
-{
-	int16_t tx,rx;
+struct oslec_state {
+	int16_t tx, rx;
 	int16_t clean;
 	int16_t clean_nlp;
 
@@ -176,45 +167,6 @@ typedef struct
 
 	/* snapshot sample of coeffs used for development */
 	int16_t *snapshot;
-} echo_can_state_t;
-
-/*! Create a voice echo canceller context.
-    \param len The length of the canceller, in samples.
-    \return The new canceller context, or NULL if the canceller could not be created.
-*/
-echo_can_state_t *echo_can_create(int len, int adaption_mode);
-
-/*! Free a voice echo canceller context.
-    \param ec The echo canceller context.
-*/
-void echo_can_free(echo_can_state_t *ec);
-
-/*! Flush (reinitialise) a voice echo canceller context.
-    \param ec The echo canceller context.
-*/
-void echo_can_flush(echo_can_state_t *ec);
-
-/*! Set the adaption mode of a voice echo canceller context.
-    \param ec The echo canceller context.
-    \param adapt The mode.
-*/
-void echo_can_adaption_mode(echo_can_state_t *ec, int adaption_mode);
-
-void echo_can_snapshot(echo_can_state_t *ec);
-
-/*! Process a sample through a voice echo canceller.
-    \param ec The echo canceller context.
-    \param tx The transmitted audio sample.
-    \param rx The received audio sample.
-    \return The clean (echo cancelled) received sample.
-*/
-int16_t echo_can_update(echo_can_state_t *ec, int16_t tx, int16_t rx);
-
-/*! Process to high pass filter the tx signal.
-    \param ec The echo canceller context.
-    \param tx The transmitted auio sample.
-    \return The HP filtered transmit sample, send this to your D/A.
-*/
-int16_t echo_can_hpf_tx(echo_can_state_t *ec, int16_t tx);
+};
 
-#endif	/* __ECHO_H */
+#endif /* __ECHO_H */

drivers/staging/echo/fir.h

@@ -72,8 +72,7 @@
     16 bit integer FIR descriptor. This defines the working state for a single
     instance of an FIR filter using 16 bit integer coefficients.
 */
-typedef struct
-{
+typedef struct {
 	int taps;
 	int curr_pos;
 	const int16_t *coeffs;
@@ -85,8 +84,7 @@ typedef struct
     instance of an FIR filter using 32 bit integer coefficients, and filtering
     16 bit integer data.
 */
-typedef struct
-{
+typedef struct {
 	int taps;
 	int curr_pos;
 	const int32_t *coeffs;
@@ -97,273 +95,201 @@ typedef struct
     Floating point FIR descriptor. This defines the working state for a single
     instance of an FIR filter using floating point coefficients and data.
 */
-typedef struct
-{
+typedef struct {
 	int taps;
 	int curr_pos;
 	const float *coeffs;
 	float *history;
 } fir_float_state_t;
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-static __inline__ const int16_t *fir16_create(fir16_state_t *fir,
-                                              const int16_t *coeffs,
-                                              int taps)
+static __inline__ const int16_t *fir16_create(fir16_state_t * fir,
+					      const int16_t * coeffs, int taps)
 {
 	fir->taps = taps;
 	fir->curr_pos = taps - 1;
 	fir->coeffs = coeffs;
-#if defined(USE_MMX)  ||  defined(USE_SSE2) || defined(__BLACKFIN_ASM__)
-	if ((fir->history = malloc(2*taps*sizeof(int16_t))))
-		memset(fir->history, 0, 2*taps*sizeof(int16_t));
+#if defined(USE_MMX)  ||  defined(USE_SSE2) || defined(__bfin__)
+	fir->history = kcalloc(2 * taps, sizeof(int16_t), GFP_KERNEL);
 #else
-	if ((fir->history = (int16_t *) malloc(taps*sizeof(int16_t))))
-		memset(fir->history, 0, taps*sizeof(int16_t));
+	fir->history = kcalloc(taps, sizeof(int16_t), GFP_KERNEL);
 #endif
 	return fir->history;
 }
-/*- End of function --------------------------------------------------------*/
 
-static __inline__ void fir16_flush(fir16_state_t *fir)
+static __inline__ void fir16_flush(fir16_state_t * fir)
 {
-#if defined(USE_MMX)  ||  defined(USE_SSE2) || defined(__BLACKFIN_ASM__)
-    memset(fir->history, 0, 2*fir->taps*sizeof(int16_t));
+#if defined(USE_MMX)  ||  defined(USE_SSE2) || defined(__bfin__)
+	memset(fir->history, 0, 2 * fir->taps * sizeof(int16_t));
 #else
-    memset(fir->history, 0, fir->taps*sizeof(int16_t));
+	memset(fir->history, 0, fir->taps * sizeof(int16_t));
 #endif
 }
-/*- End of function --------------------------------------------------------*/
 
-static __inline__ void fir16_free(fir16_state_t *fir)
+static __inline__ void fir16_free(fir16_state_t * fir)
 {
-	free(fir->history);
+	kfree(fir->history);
 }
-/*- End of function --------------------------------------------------------*/
 
-#ifdef __BLACKFIN_ASM__
+#ifdef __bfin__
 static inline int32_t dot_asm(short *x, short *y, int len)
 {
-   int dot;
-
-   len--;
-
-   __asm__
-   (
-   "I0 = %1;\n\t"
-   "I1 = %2;\n\t"
-   "A0 = 0;\n\t"
-   "R0.L = W[I0++] || R1.L = W[I1++];\n\t"
-   "LOOP dot%= LC0 = %3;\n\t"
-   "LOOP_BEGIN dot%=;\n\t"
-      "A0 += R0.L * R1.L (IS) || R0.L = W[I0++] || R1.L = W[I1++];\n\t"
-   "LOOP_END dot%=;\n\t"
-   "A0 += R0.L*R1.L (IS);\n\t"
-   "R0 = A0;\n\t"
-   "%0 = R0;\n\t"
-   : "=&d" (dot)
-   : "a" (x), "a" (y), "a" (len)
-   : "I0", "I1", "A1", "A0", "R0", "R1"
-   );
-
-   return dot;
+	int dot;
+
+	len--;
+
+	__asm__("I0 = %1;\n\t"
+		"I1 = %2;\n\t"
+		"A0 = 0;\n\t"
+		"R0.L = W[I0++] || R1.L = W[I1++];\n\t"
+		"LOOP dot%= LC0 = %3;\n\t"
+		"LOOP_BEGIN dot%=;\n\t"
+		"A0 += R0.L * R1.L (IS) || R0.L = W[I0++] || R1.L = W[I1++];\n\t"
+		"LOOP_END dot%=;\n\t"
+		"A0 += R0.L*R1.L (IS);\n\t"
+		"R0 = A0;\n\t"
+		"%0 = R0;\n\t"
+		:"=&d"(dot)
+		:"a"(x), "a"(y), "a"(len)
+		:"I0", "I1", "A1", "A0", "R0", "R1"
+	);
+
+	return dot;
 }
 #endif
-/*- End of function --------------------------------------------------------*/
 
-static __inline__ int16_t fir16(fir16_state_t *fir, int16_t sample)
+static __inline__ int16_t fir16(fir16_state_t * fir, int16_t sample)
 {
-    int32_t y;
+	int32_t y;
 #if defined(USE_MMX)
-    int i;
-    mmx_t *mmx_coeffs;
-    mmx_t *mmx_hist;
-
-    fir->history[fir->curr_pos] = sample;
-    fir->history[fir->curr_pos + fir->taps] = sample;
-
-    mmx_coeffs = (mmx_t *) fir->coeffs;
-    mmx_hist = (mmx_t *) &fir->history[fir->curr_pos];
-    i = fir->taps;
-    pxor_r2r(mm4, mm4);
-    /* 8 samples per iteration, so the filter must be a multiple of 8 long. */
-    while (i > 0)
-    {
-        movq_m2r(mmx_coeffs[0], mm0);
-        movq_m2r(mmx_coeffs[1], mm2);
-        movq_m2r(mmx_hist[0], mm1);
-        movq_m2r(mmx_hist[1], mm3);
-        mmx_coeffs += 2;
-        mmx_hist += 2;
-        pmaddwd_r2r(mm1, mm0);
-        pmaddwd_r2r(mm3, mm2);
-        paddd_r2r(mm0, mm4);
-        paddd_r2r(mm2, mm4);
-        i -= 8;
-    }
-    movq_r2r(mm4, mm0);
-    psrlq_i2r(32, mm0);
-    paddd_r2r(mm0, mm4);
-    movd_r2m(mm4, y);
-    emms();
+	int i;
+	mmx_t *mmx_coeffs;
+	mmx_t *mmx_hist;
+
+	fir->history[fir->curr_pos] = sample;
+	fir->history[fir->curr_pos + fir->taps] = sample;
+
+	mmx_coeffs = (mmx_t *) fir->coeffs;
+	mmx_hist = (mmx_t *) & fir->history[fir->curr_pos];
+	i = fir->taps;
+	pxor_r2r(mm4, mm4);
+	/* 8 samples per iteration, so the filter must be a multiple of 8 long. */
+	while (i > 0) {
+		movq_m2r(mmx_coeffs[0], mm0);
+		movq_m2r(mmx_coeffs[1], mm2);
+		movq_m2r(mmx_hist[0], mm1);
+		movq_m2r(mmx_hist[1], mm3);
+		mmx_coeffs += 2;
+		mmx_hist += 2;
+		pmaddwd_r2r(mm1, mm0);
+		pmaddwd_r2r(mm3, mm2);
+		paddd_r2r(mm0, mm4);
+		paddd_r2r(mm2, mm4);
+		i -= 8;
+	}
+	movq_r2r(mm4, mm0);
+	psrlq_i2r(32, mm0);
+	paddd_r2r(mm0, mm4);
+	movd_r2m(mm4, y);
+	emms();
 #elif defined(USE_SSE2)
-    int i;
-    xmm_t *xmm_coeffs;
-    xmm_t *xmm_hist;
-
-    fir->history[fir->curr_pos] = sample;
-    fir->history[fir->curr_pos + fir->taps] = sample;
-
-    xmm_coeffs = (xmm_t *) fir->coeffs;
-    xmm_hist = (xmm_t *) &fir->history[fir->curr_pos];
-    i = fir->taps;
-    pxor_r2r(xmm4, xmm4);
-    /* 16 samples per iteration, so the filter must be a multiple of 16 long. */
-    while (i > 0)
-    {
-        movdqu_m2r(xmm_coeffs[0], xmm0);
-        movdqu_m2r(xmm_coeffs[1], xmm2);
-        movdqu_m2r(xmm_hist[0], xmm1);
-        movdqu_m2r(xmm_hist[1], xmm3);
-        xmm_coeffs += 2;
-        xmm_hist += 2;
-        pmaddwd_r2r(xmm1, xmm0);
-        pmaddwd_r2r(xmm3, xmm2);
-        paddd_r2r(xmm0, xmm4);
-        paddd_r2r(xmm2, xmm4);
-        i -= 16;
-    }
-    movdqa_r2r(xmm4, xmm0);
-    psrldq_i2r(8, xmm0);
-    paddd_r2r(xmm0, xmm4);
-    movdqa_r2r(xmm4, xmm0);
-    psrldq_i2r(4, xmm0);
-    paddd_r2r(xmm0, xmm4);
-    movd_r2m(xmm4, y);
-#elif defined(__BLACKFIN_ASM__)
-    fir->history[fir->curr_pos] = sample;
-    fir->history[fir->curr_pos + fir->taps] = sample;
-    y = dot_asm((int16_t*)fir->coeffs, &fir->history[fir->curr_pos], fir->taps);
+	int i;
+	xmm_t *xmm_coeffs;
+	xmm_t *xmm_hist;
+
+	fir->history[fir->curr_pos] = sample;
+	fir->history[fir->curr_pos + fir->taps] = sample;
+
+	xmm_coeffs = (xmm_t *) fir->coeffs;
+	xmm_hist = (xmm_t *) & fir->history[fir->curr_pos];
+	i = fir->taps;
+	pxor_r2r(xmm4, xmm4);
+	/* 16 samples per iteration, so the filter must be a multiple of 16 long. */
+	while (i > 0) {
+		movdqu_m2r(xmm_coeffs[0], xmm0);
+		movdqu_m2r(xmm_coeffs[1], xmm2);
+		movdqu_m2r(xmm_hist[0], xmm1);
+		movdqu_m2r(xmm_hist[1], xmm3);
+		xmm_coeffs += 2;
+		xmm_hist += 2;
+		pmaddwd_r2r(xmm1, xmm0);
+		pmaddwd_r2r(xmm3, xmm2);
+		paddd_r2r(xmm0, xmm4);
+		paddd_r2r(xmm2, xmm4);
+		i -= 16;
+	}
+	movdqa_r2r(xmm4, xmm0);
+	psrldq_i2r(8, xmm0);
+	paddd_r2r(xmm0, xmm4);
+	movdqa_r2r(xmm4, xmm0);
+	psrldq_i2r(4, xmm0);
+	paddd_r2r(xmm0, xmm4);
+	movd_r2m(xmm4, y);
+#elif defined(__bfin__)
+	fir->history[fir->curr_pos] = sample;
+	fir->history[fir->curr_pos + fir->taps] = sample;
+	y = dot_asm((int16_t *) fir->coeffs, &fir->history[fir->curr_pos],
+		    fir->taps);
 #else
-    int i;
-    int offset1;
-    int offset2;
-
-    fir->history[fir->curr_pos] = sample;
-
-    offset2 = fir->curr_pos;
-    offset1 = fir->taps - offset2;
-    y = 0;
-    for (i = fir->taps - 1;  i >= offset1;  i--)
-        y += fir->coeffs[i]*fir->history[i - offset1];
-    for (  ;  i >= 0;  i--)
-        y += fir->coeffs[i]*fir->history[i + offset2];
+	int i;
+	int offset1;
+	int offset2;
+
+	fir->history[fir->curr_pos] = sample;
+
+	offset2 = fir->curr_pos;
+	offset1 = fir->taps - offset2;
+	y = 0;
+	for (i = fir->taps - 1; i >= offset1; i--)
+		y += fir->coeffs[i] * fir->history[i - offset1];
+	for (; i >= 0; i--)
+		y += fir->coeffs[i] * fir->history[i + offset2];
 #endif
-    if (fir->curr_pos <= 0)
-    	fir->curr_pos = fir->taps;
-    fir->curr_pos--;
-    return (int16_t) (y >> 15);
-}
-/*- End of function --------------------------------------------------------*/
-
-static __inline__ const int16_t *fir32_create(fir32_state_t *fir,
-                                              const int32_t *coeffs,
-                                              int taps)
-{
-    fir->taps = taps;
-    fir->curr_pos = taps - 1;
-    fir->coeffs = coeffs;
-    fir->history = (int16_t *) malloc(taps*sizeof(int16_t));
-    if (fir->history)
-    	memset(fir->history, '\0', taps*sizeof(int16_t));
-    return fir->history;
-}
-/*- End of function --------------------------------------------------------*/
-
-static __inline__ void fir32_flush(fir32_state_t *fir)
-{
-    memset(fir->history, 0, fir->taps*sizeof(int16_t));
+	if (fir->curr_pos <= 0)
+		fir->curr_pos = fir->taps;
+	fir->curr_pos--;
+	return (int16_t) (y >> 15);
 }
-/*- End of function --------------------------------------------------------*/
 
-static __inline__ void fir32_free(fir32_state_t *fir)
+static __inline__ const int16_t *fir32_create(fir32_state_t * fir,
+					      const int32_t * coeffs, int taps)
 {
-    free(fir->history);
-}
-/*- End of function --------------------------------------------------------*/
-
-static __inline__ int16_t fir32(fir32_state_t *fir, int16_t sample)
-{
-    int i;
-    int32_t y;
-    int offset1;
-    int offset2;
-
-    fir->history[fir->curr_pos] = sample;
-    offset2 = fir->curr_pos;
-    offset1 = fir->taps - offset2;
-    y = 0;
-    for (i = fir->taps - 1;  i >= offset1;  i--)
-        y += fir->coeffs[i]*fir->history[i - offset1];
-    for (  ;  i >= 0;  i--)
-        y += fir->coeffs[i]*fir->history[i + offset2];
-    if (fir->curr_pos <= 0)
-    	fir->curr_pos = fir->taps;
-    fir->curr_pos--;
-    return (int16_t) (y >> 15);
+	fir->taps = taps;
+	fir->curr_pos = taps - 1;
+	fir->coeffs = coeffs;
+	fir->history = kcalloc(taps, sizeof(int16_t), GFP_KERNEL);
+	return fir->history;
 }
-/*- End of function --------------------------------------------------------*/
 
-#ifndef __KERNEL__
-static __inline__ const float *fir_float_create(fir_float_state_t *fir,
-                                                const float *coeffs,
-    	    	    	                        int taps)
+static __inline__ void fir32_flush(fir32_state_t * fir)
 {
-    fir->taps = taps;
-    fir->curr_pos = taps - 1;
-    fir->coeffs = coeffs;
-    fir->history = (float *) malloc(taps*sizeof(float));
-    if (fir->history)
-        memset(fir->history, '\0', taps*sizeof(float));
-    return fir->history;
+	memset(fir->history, 0, fir->taps * sizeof(int16_t));
 }
-/*- End of function --------------------------------------------------------*/
 
-static __inline__ void fir_float_free(fir_float_state_t *fir)
+static __inline__ void fir32_free(fir32_state_t * fir)
 {
-    free(fir->history);
+	kfree(fir->history);
 }
-/*- End of function --------------------------------------------------------*/
 
-static __inline__ int16_t fir_float(fir_float_state_t *fir, int16_t sample)
+static __inline__ int16_t fir32(fir32_state_t * fir, int16_t sample)
 {
-    int i;
-    float y;
-    int offset1;
-    int offset2;
-
-    fir->history[fir->curr_pos] = sample;
-
-    offset2 = fir->curr_pos;
-    offset1 = fir->taps - offset2;
-    y = 0;
-    for (i = fir->taps - 1;  i >= offset1;  i--)
-        y += fir->coeffs[i]*fir->history[i - offset1];
-    for (  ;  i >= 0;  i--)
-        y += fir->coeffs[i]*fir->history[i + offset2];
-    if (fir->curr_pos <= 0)
-    	fir->curr_pos = fir->taps;
-    fir->curr_pos--;
-    return  (int16_t) y;
+	int i;
+	int32_t y;
+	int offset1;
+	int offset2;
+
+	fir->history[fir->curr_pos] = sample;
+	offset2 = fir->curr_pos;
+	offset1 = fir->taps - offset2;
+	y = 0;
+	for (i = fir->taps - 1; i >= offset1; i--)
+		y += fir->coeffs[i] * fir->history[i - offset1];
+	for (; i >= 0; i--)
+		y += fir->coeffs[i] * fir->history[i + offset2];
+	if (fir->curr_pos <= 0)
+		fir->curr_pos = fir->taps;
+	fir->curr_pos--;
+	return (int16_t) (y >> 15);
 }
-/*- End of function --------------------------------------------------------*/
-#endif
-
-#ifdef __cplusplus
-}
-#endif
 
 #endif
 /*- End of file ------------------------------------------------------------*/

drivers/staging/echo/mmx.h

@@ -27,24 +27,23 @@
  * values by ULL, lest they be truncated by the compiler)
  */
 
-typedef        union {
-        long long               q;      /* Quadword (64-bit) value */
-        unsigned long long      uq;     /* Unsigned Quadword */
-        int                     d[2];   /* 2 Doubleword (32-bit) values */
-        unsigned int            ud[2];  /* 2 Unsigned Doubleword */
-        short                   w[4];   /* 4 Word (16-bit) values */
-        unsigned short          uw[4];  /* 4 Unsigned Word */
-        char                    b[8];   /* 8 Byte (8-bit) values */
-        unsigned char           ub[8];  /* 8 Unsigned Byte */
-        float                   s[2];   /* Single-precision (32-bit) value */
-} mmx_t;        /* On an 8-byte (64-bit) boundary */
+typedef union {
+	long long q;		/* Quadword (64-bit) value */
+	unsigned long long uq;	/* Unsigned Quadword */
+	int d[2];		/* 2 Doubleword (32-bit) values */
+	unsigned int ud[2];	/* 2 Unsigned Doubleword */
+	short w[4];		/* 4 Word (16-bit) values */
+	unsigned short uw[4];	/* 4 Unsigned Word */
+	char b[8];		/* 8 Byte (8-bit) values */
+	unsigned char ub[8];	/* 8 Unsigned Byte */
+	float s[2];		/* Single-precision (32-bit) value */
+} mmx_t;			/* On an 8-byte (64-bit) boundary */
 
 /* SSE registers */
 typedef union {
 	char b[16];
 } xmm_t;
 
-
 #define         mmx_i2r(op,imm,reg) \
         __asm__ __volatile__ (#op " %0, %%" #reg \
                               : /* nothing */ \
@@ -63,7 +62,6 @@ typedef union {
 #define         mmx_r2r(op,regs,regd) \
         __asm__ __volatile__ (#op " %" #regs ", %" #regd)
 
-
 #define         emms() __asm__ __volatile__ ("emms")
 
 #define         movd_m2r(var,reg)           mmx_m2r (movd, var, reg)
@@ -192,16 +190,13 @@ typedef union {
 #define         pxor_m2r(var,reg)           mmx_m2r (pxor, var, reg)
 #define         pxor_r2r(regs,regd)         mmx_r2r (pxor, regs, regd)
 
-
 /* 3DNOW extensions */
 
 #define         pavgusb_m2r(var,reg)        mmx_m2r (pavgusb, var, reg)
 #define         pavgusb_r2r(regs,regd)      mmx_r2r (pavgusb, regs, regd)
 
-
 /* AMD MMX extensions - also available in intel SSE */
 
-
 #define         mmx_m2ri(op,mem,reg,imm) \
         __asm__ __volatile__ (#op " %1, %0, %%" #reg \
                               : /* nothing */ \
@@ -216,7 +211,6 @@ typedef union {
                               : /* nothing */ \
                               : "m" (mem))
 
-
 #define         maskmovq(regs,maskreg)      mmx_r2ri (maskmovq, regs, maskreg)
 
 #define         movntq_r2m(mmreg,var)       mmx_r2m (movntq, mmreg, var)
@@ -284,5 +278,4 @@ typedef union {
 #define         punpcklqdq_r2r(regs,regd)   mmx_r2r (punpcklqdq, regs, regd)
 #define         punpckhqdq_r2r(regs,regd)   mmx_r2r (punpckhqdq, regs, regd)
 
-
 #endif /* AVCODEC_I386MMX_H */

drivers/staging/echo/oslec.h

@@ -0,0 +1,86 @@
+/*
+ *  OSLEC - A line echo canceller.  This code is being developed
+ *          against and partially complies with G168. Using code from SpanDSP
+ *
+ * Written by Steve Underwood <steveu@coppice.org>
+ *         and David Rowe <david_at_rowetel_dot_com>
+ *
+ * Copyright (C) 2001 Steve Underwood and 2007-2008 David Rowe
+ *
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#ifndef __OSLEC_H
+#define __OSLEC_H
+
+/* TODO: document interface */
+
+/* Mask bits for the adaption mode */
+#define ECHO_CAN_USE_ADAPTION	0x01
+#define ECHO_CAN_USE_NLP	0x02
+#define ECHO_CAN_USE_CNG	0x04
+#define ECHO_CAN_USE_CLIP	0x08
+#define ECHO_CAN_USE_TX_HPF	0x10
+#define ECHO_CAN_USE_RX_HPF	0x20
+#define ECHO_CAN_DISABLE	0x40
+
+/*!
+    G.168 echo canceller descriptor. This defines the working state for a line
+    echo canceller.
+*/
+struct oslec_state;
+
+/*! Create a voice echo canceller context.
+    \param len The length of the canceller, in samples.
+    \return The new canceller context, or NULL if the canceller could not be created.
+*/
+struct oslec_state *oslec_create(int len, int adaption_mode);
+
+/*! Free a voice echo canceller context.
+    \param ec The echo canceller context.
+*/
+void oslec_free(struct oslec_state *ec);
+
+/*! Flush (reinitialise) a voice echo canceller context.
+    \param ec The echo canceller context.
+*/
+void oslec_flush(struct oslec_state *ec);
+
+/*! Set the adaption mode of a voice echo canceller context.
+    \param ec The echo canceller context.
+    \param adapt The mode.
+*/
+void oslec_adaption_mode(struct oslec_state *ec, int adaption_mode);
+
+void oslec_snapshot(struct oslec_state *ec);
+
+/*! Process a sample through a voice echo canceller.
+    \param ec The echo canceller context.
+    \param tx The transmitted audio sample.
+    \param rx The received audio sample.
+    \return The clean (echo cancelled) received sample.
+*/
+int16_t oslec_update(struct oslec_state *ec, int16_t tx, int16_t rx);
+
+/*! Process to high pass filter the tx signal.
+    \param ec The echo canceller context.
+    \param tx The transmitted auio sample.
+    \return The HP filtered transmit sample, send this to your D/A.
+*/
+int16_t oslec_hpf_tx(struct oslec_state *ec, int16_t tx);
+
+#endif /* __OSLEC_H */

drivers/staging/et131x/et1310_phy.c

@@ -84,7 +84,6 @@
 #include <linux/if_arp.h>
 #include <linux/ioport.h>
 #include <linux/random.h>
-#include <linux/delay.h>
 
 #include "et1310_phy.h"
 #include "et1310_pm.h"
@@ -95,7 +94,6 @@
 #include "et131x_initpci.h"
 
 #include "et1310_address_map.h"
-#include "et1310_jagcore.h"
 #include "et1310_tx.h"
 #include "et1310_rx.h"
 #include "et1310_mac.h"

drivers/staging/et131x/et131x_debug.c

@@ -97,7 +97,6 @@
 #include "et131x_isr.h"
 
 #include "et1310_address_map.h"
-#include "et1310_jagcore.h"
 #include "et1310_tx.h"
 #include "et1310_rx.h"
 #include "et1310_mac.h"

drivers/staging/et131x/et131x_initpci.c

@@ -97,7 +97,6 @@
 #include "et131x_isr.h"
 
 #include "et1310_address_map.h"
-#include "et1310_jagcore.h"
 #include "et1310_tx.h"
 #include "et1310_rx.h"
 #include "et1310_mac.h"

drivers/staging/go7007/go7007-driver.c

@@ -16,7 +16,6 @@
  */
 
 #include <linux/module.h>
-#include <linux/version.h>
 #include <linux/init.h>
 #include <linux/delay.h>
 #include <linux/sched.h>

drivers/staging/go7007/go7007-fw.c

@@ -26,7 +26,6 @@
 
 #include <linux/module.h>
 #include <linux/init.h>
-#include <linux/version.h>
 #include <linux/time.h>
 #include <linux/mm.h>
 #include <linux/device.h>

drivers/staging/go7007/go7007-i2c.c

@@ -15,7 +15,6 @@
  * Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  */
 
-#include <linux/version.h>
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/delay.h>

drivers/staging/go7007/go7007-usb.c

@@ -16,7 +16,6 @@
  */
 
 #include <linux/module.h>
-#include <linux/version.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/wait.h>

drivers/staging/go7007/snd-go7007.c

@@ -17,7 +17,6 @@
 
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/version.h>
 #include <linux/moduleparam.h>
 #include <linux/init.h>
 #include <linux/spinlock.h>

drivers/staging/go7007/wis-ov7640.c

@@ -17,7 +17,6 @@
 
 #include <linux/module.h>
 #include <linux/init.h>
-#include <linux/version.h>
 #include <linux/i2c.h>
 #include <linux/videodev2.h>
 

drivers/staging/go7007/wis-saa7113.c

@@ -17,7 +17,6 @@
 
 #include <linux/module.h>
 #include <linux/init.h>
-#include <linux/version.h>
 #include <linux/i2c.h>
 #include <linux/videodev2.h>
 #include <linux/ioctl.h>

drivers/staging/go7007/wis-saa7115.c

@@ -17,7 +17,6 @@
 
 #include <linux/module.h>
 #include <linux/init.h>
-#include <linux/version.h>
 #include <linux/i2c.h>
 #include <linux/videodev2.h>
 #include <linux/ioctl.h>

drivers/staging/go7007/wis-sony-tuner.c

@@ -17,7 +17,6 @@
 
 #include <linux/module.h>
 #include <linux/init.h>
-#include <linux/version.h>
 #include <linux/i2c.h>
 #include <linux/videodev2.h>
 #include <media/tuner.h>

drivers/staging/go7007/wis-tw2804.c

@@ -17,7 +17,6 @@
 
 #include <linux/module.h>
 #include <linux/init.h>
-#include <linux/version.h>
 #include <linux/i2c.h>
 #include <linux/videodev2.h>
 #include <linux/ioctl.h>

drivers/staging/go7007/wis-tw9903.c

@@ -17,7 +17,6 @@
 
 #include <linux/module.h>
 #include <linux/init.h>
-#include <linux/version.h>
 #include <linux/i2c.h>
 #include <linux/videodev2.h>
 #include <linux/ioctl.h>

drivers/staging/go7007/wis-uda1342.c

@@ -17,7 +17,6 @@
 
 #include <linux/module.h>
 #include <linux/init.h>
-#include <linux/version.h>
 #include <linux/i2c.h>
 #include <linux/videodev2.h>
 #include <media/tvaudio.h>

drivers/staging/me4000/me4000.h

@@ -329,46 +329,46 @@
   Circular buffer used for analog input/output reads/writes.
   ===========================================================================*/
 
-typedef struct me4000_circ_buf {
+struct me4000_circ_buf {
 	s16 *buf;
 	int volatile head;
 	int volatile tail;
-} me4000_circ_buf_t;
+};
 
 /*=============================================================================
   Information about the hardware capabilities
   ===========================================================================*/
 
-typedef struct me4000_ao_info {
+struct me4000_ao_info {
 	int count;
 	int fifo_count;
-} me4000_ao_info_t;
+};
 
-typedef struct me4000_ai_info {
+struct me4000_ai_info {
 	int count;
 	int sh_count;
 	int diff_count;
 	int ex_trig_analog;
-} me4000_ai_info_t;
+};
 
-typedef struct me4000_dio_info {
+struct me4000_dio_info {
 	int count;
-} me4000_dio_info_t;
+};
 
-typedef struct me4000_cnt_info {
+struct me4000_cnt_info {
 	int count;
-} me4000_cnt_info_t;
+};
 
-typedef struct me4000_board {
+struct me4000_board {
 	u16 vendor_id;
 	u16 device_id;
-	me4000_ao_info_t ao;
-	me4000_ai_info_t ai;
-	me4000_dio_info_t dio;
-	me4000_cnt_info_t cnt;
-} me4000_board_t;
+	struct me4000_ao_info ao;
+	struct me4000_ai_info ai;
+	struct me4000_dio_info dio;
+	struct me4000_cnt_info cnt;
+};
 
-static me4000_board_t me4000_boards[] = {
+static struct me4000_board me4000_boards[] = {
 	{PCI_VENDOR_ID_MEILHAUS, 0x4610, {0, 0}, {16, 0, 0, 0}, {4}, {3}},
 
 	{PCI_VENDOR_ID_MEILHAUS, 0x4650, {0, 0}, {16, 0, 0, 0}, {4}, {0}},
@@ -391,8 +391,6 @@ static me4000_board_t me4000_boards[] = {
 	{0},
 };
 
-#define ME4000_BOARD_VERSIONS (sizeof(me4000_boards) / sizeof(me4000_board_t) - 1)
-
 /*=============================================================================
   PCI device table.
   This is used by modprobe to translate PCI IDs to drivers.
@@ -427,19 +425,19 @@ MODULE_DEVICE_TABLE(pci, me4000_pci_table);
   Global board and subdevice information structures
   ===========================================================================*/
 
-typedef struct me4000_info {
+struct me4000_info {
 	struct list_head list;	// List of all detected boards
 	int board_count;	// Index of the board after detection
 
 	unsigned long plx_regbase;	// PLX configuration space base address
-	unsigned long me4000_regbase;	// Base address of the ME4000
-	unsigned long timer_regbase;	// Base address of the timer circuit
-	unsigned long program_regbase;	// Base address to set the program pin for the xilinx
+	resource_size_t me4000_regbase;	// Base address of the ME4000
+	resource_size_t timer_regbase;	// Base address of the timer circuit
+	resource_size_t program_regbase;	// Base address to set the program pin for the xilinx
 
 	unsigned long plx_regbase_size;	// PLX register set space
-	unsigned long me4000_regbase_size;	// ME4000 register set space
-	unsigned long timer_regbase_size;	// Timer circuit register set space
-	unsigned long program_regbase_size;	// Size of program base address of the ME4000
+	resource_size_t me4000_regbase_size;	// ME4000 register set space
+	resource_size_t timer_regbase_size;	// Timer circuit register set space
+	resource_size_t program_regbase_size;	// Size of program base address of the ME4000
 
 	unsigned int serial_no;	// Serial number of the board
 	unsigned char hw_revision;	// Hardware revision of the board
@@ -451,7 +449,7 @@ typedef struct me4000_info {
 	int pci_func_no;	// PCI function number
 	struct pci_dev *pci_dev_p;	// General PCI information
 
-	me4000_board_t *board_p;	// Holds the board capabilities
+	struct me4000_board *board_p;	// Holds the board capabilities
 
 	unsigned int irq;	// IRQ assigned from the PCI BIOS
 	unsigned int irq_count;	// Count of external interrupts
@@ -464,18 +462,18 @@ typedef struct me4000_info {
 	struct me4000_dio_context *dio_context;	// Digital I/O specific context
 	struct me4000_cnt_context *cnt_context;	// Counter specific context
 	struct me4000_ext_int_context *ext_int_context;	// External interrupt specific context
-} me4000_info_t;
+};
 
-typedef struct me4000_ao_context {
+struct me4000_ao_context {
 	struct list_head list;	// linked list of me4000_ao_context_t
 	int index;		// Index in the list
 	int mode;		// Indicates mode (0 = single, 1 = wraparound, 2 = continous)
 	int dac_in_use;		// Indicates if already opend
 	spinlock_t use_lock;	// Guards in_use
 	spinlock_t int_lock;	// Used when locking out interrupts
-	me4000_circ_buf_t circ_buf;	// Circular buffer
+	struct me4000_circ_buf circ_buf;	// Circular buffer
 	wait_queue_head_t wait_queue;	// Wait queue to sleep while blocking write
-	me4000_info_t *board_info;
+	struct me4000_info *board_info;
 	unsigned int irq;	// The irq associated with this ADC
 	int volatile pipe_flag;	// Indicates broken pipe set from me4000_ao_isr()
 	unsigned long ctrl_reg;
@@ -486,9 +484,9 @@ typedef struct me4000_ao_context {
 	unsigned long irq_status_reg;
 	unsigned long preload_reg;
 	struct fasync_struct *fasync_p;	// Queue for asynchronous notification
-} me4000_ao_context_t;
+};
 
-typedef struct me4000_ai_context {
+struct me4000_ai_context {
 	struct list_head list;	// linked list of me4000_ai_info_t
 	int mode;		// Indicates mode
 	int in_use;		// Indicates if already opend
@@ -496,9 +494,9 @@ typedef struct me4000_ai_context {
 	spinlock_t int_lock;	// Used when locking out interrupts
 	int number;		// Number of the DAC
 	unsigned int irq;	// The irq associated with this ADC
-	me4000_circ_buf_t circ_buf;	// Circular buffer
+	struct me4000_circ_buf circ_buf;	// Circular buffer
 	wait_queue_head_t wait_queue;	// Wait queue to sleep while blocking read
-	me4000_info_t *board_info;
+	struct me4000_info *board_info;
 
 	struct fasync_struct *fasync_p;	// Queue for asynchronous notification
 
@@ -523,48 +521,48 @@ typedef struct me4000_ai_context {
 	unsigned long channel_list_count;
 	unsigned long sample_counter;
 	int sample_counter_reload;
-} me4000_ai_context_t;
+};
 
-typedef struct me4000_dio_context {
+struct me4000_dio_context {
 	struct list_head list;	// linked list of me4000_dio_context_t
 	int in_use;		// Indicates if already opend
 	spinlock_t use_lock;	// Guards in_use
 	int number;
 	int dio_count;
-	me4000_info_t *board_info;
+	struct me4000_info *board_info;
 	unsigned long dir_reg;
 	unsigned long ctrl_reg;
 	unsigned long port_0_reg;
 	unsigned long port_1_reg;
 	unsigned long port_2_reg;
 	unsigned long port_3_reg;
-} me4000_dio_context_t;
+};
 
-typedef struct me4000_cnt_context {
+struct me4000_cnt_context {
 	struct list_head list;	// linked list of me4000_dio_context_t
 	int in_use;		// Indicates if already opend
 	spinlock_t use_lock;	// Guards in_use
 	int number;
 	int cnt_count;
-	me4000_info_t *board_info;
+	struct me4000_info *board_info;
 	unsigned long ctrl_reg;
 	unsigned long counter_0_reg;
 	unsigned long counter_1_reg;
 	unsigned long counter_2_reg;
-} me4000_cnt_context_t;
+};
 
-typedef struct me4000_ext_int_context {
+struct me4000_ext_int_context {
 	struct list_head list;	// linked list of me4000_dio_context_t
 	int in_use;		// Indicates if already opend
 	spinlock_t use_lock;	// Guards in_use
 	int number;
-	me4000_info_t *board_info;
+	struct me4000_info *board_info;
 	unsigned int irq;
 	unsigned long int_count;
 	struct fasync_struct *fasync_ptr;
 	unsigned long ctrl_reg;
 	unsigned long irq_status_reg;
-} me4000_ext_int_context_t;
+};
 
 #endif
 
@@ -745,12 +743,12 @@ typedef struct me4000_ext_int_context {
   General type definitions
   ----------------------------------------------------------------------------*/
 
-typedef struct me4000_user_info {
+struct me4000_user_info {
 	int board_count;	// Index of the board after detection
 	unsigned long plx_regbase;	// PLX configuration space base address
-	unsigned long me4000_regbase;	// Base address of the ME4000
+	resource_size_t me4000_regbase;	// Base address of the ME4000
 	unsigned long plx_regbase_size;	// PLX register set space
-	unsigned long me4000_regbase_size;	// ME4000 register set space
+	resource_size_t me4000_regbase_size;	// ME4000 register set space
 	unsigned long serial_no;	// Serial number of the board
 	unsigned char hw_revision;	// Hardware revision of the board
 	unsigned short vendor_id;	// Meilhaus vendor id (0x1402)
@@ -773,62 +771,62 @@ typedef struct me4000_user_info {
 	int dio_count;		// Count of digital I/O ports
 
 	int cnt_count;		// Count of counters
-} me4000_user_info_t;
+};
 
 /*-----------------------------------------------------------------------------
   Type definitions for analog output
   ----------------------------------------------------------------------------*/
 
-typedef struct me4000_ao_channel_list {
+struct me4000_ao_channel_list {
 	unsigned long count;
 	unsigned long *list;
-} me4000_ao_channel_list_t;
+};
 
 /*-----------------------------------------------------------------------------
   Type definitions for analog input
   ----------------------------------------------------------------------------*/
 
-typedef struct me4000_ai_channel_list {
+struct me4000_ai_channel_list {
 	unsigned long count;
 	unsigned long *list;
-} me4000_ai_channel_list_t;
+};
 
-typedef struct me4000_ai_timer {
+struct me4000_ai_timer {
 	unsigned long pre_chan;
 	unsigned long chan;
 	unsigned long scan_low;
 	unsigned long scan_high;
-} me4000_ai_timer_t;
+};
 
-typedef struct me4000_ai_config {
-	me4000_ai_timer_t timer;
-	me4000_ai_channel_list_t channel_list;
+struct me4000_ai_config {
+	struct me4000_ai_timer timer;
+	struct me4000_ai_channel_list channel_list;
 	int sh;
-} me4000_ai_config_t;
+};
 
-typedef struct me4000_ai_single {
+struct me4000_ai_single {
 	int channel;
 	int range;
 	int mode;
 	short value;
 	unsigned long timeout;
-} me4000_ai_single_t;
+};
 
-typedef struct me4000_ai_trigger {
+struct me4000_ai_trigger {
 	int mode;
 	int edge;
-} me4000_ai_trigger_t;
+};
 
-typedef struct me4000_ai_sc {
+struct me4000_ai_sc {
 	unsigned long value;
 	int reload;
-} me4000_ai_sc_t;
+};
 
 /*-----------------------------------------------------------------------------
   Type definitions for eeprom
   ----------------------------------------------------------------------------*/
 
-typedef struct me4000_eeprom {
+struct me4000_eeprom {
 	unsigned long date;
 	short uni_10_offset;
 	short uni_10_fullscale;
@@ -842,45 +840,45 @@ typedef struct me4000_eeprom {
 	short diff_10_fullscale;
 	short diff_2_5_offset;
 	short diff_2_5_fullscale;
-} me4000_eeprom_t;
+};
 
 /*-----------------------------------------------------------------------------
   Type definitions for digital I/O
   ----------------------------------------------------------------------------*/
 
-typedef struct me4000_dio_config {
+struct me4000_dio_config {
 	int port;
 	int mode;
 	int function;
-} me4000_dio_config_t;
+};
 
-typedef struct me4000_dio_byte {
+struct me4000_dio_byte {
 	int port;
 	unsigned char byte;
-} me4000_dio_byte_t;
+};
 
 /*-----------------------------------------------------------------------------
   Type definitions for counters
   ----------------------------------------------------------------------------*/
 
-typedef struct me4000_cnt {
+struct me4000_cnt {
 	int counter;
 	unsigned short value;
-} me4000_cnt_t;
+};
 
-typedef struct me4000_cnt_config {
+struct me4000_cnt_config {
 	int counter;
 	int mode;
-} me4000_cnt_config_t;
+};
 
 /*-----------------------------------------------------------------------------
   Type definitions for external interrupt
   ----------------------------------------------------------------------------*/
 
-typedef struct {
+struct me4000_int {
 	int int1_count;
 	int int2_count;
-} me4000_int_type;
+};
 
 /*-----------------------------------------------------------------------------
   The ioctls of the board
@@ -888,7 +886,8 @@ typedef struct {
 
 #define ME4000_IOCTL_MAXNR 50
 #define ME4000_MAGIC 'y'
-#define ME4000_GET_USER_INFO          _IOR (ME4000_MAGIC, 0, me4000_user_info_t)
+#define ME4000_GET_USER_INFO          _IOR (ME4000_MAGIC, 0, \
+					    struct me4000_user_info)
 
 #define ME4000_AO_START               _IOW (ME4000_MAGIC, 1, unsigned long)
 #define ME4000_AO_STOP                _IO  (ME4000_MAGIC, 2)
@@ -904,25 +903,35 @@ typedef struct {
 #define ME4000_AO_DISABLE_DO          _IO  (ME4000_MAGIC, 12)
 #define ME4000_AO_FSM_STATE           _IOR (ME4000_MAGIC, 13, int)
 
-#define ME4000_AI_SINGLE              _IOR (ME4000_MAGIC, 14, me4000_ai_single_t)
+#define ME4000_AI_SINGLE              _IOR (ME4000_MAGIC, 14, \
+					    struct me4000_ai_single)
 #define ME4000_AI_START               _IOW (ME4000_MAGIC, 15, unsigned long)
 #define ME4000_AI_STOP                _IO  (ME4000_MAGIC, 16)
 #define ME4000_AI_IMMEDIATE_STOP      _IO  (ME4000_MAGIC, 17)
 #define ME4000_AI_EX_TRIG_ENABLE      _IO  (ME4000_MAGIC, 18)
 #define ME4000_AI_EX_TRIG_DISABLE     _IO  (ME4000_MAGIC, 19)
-#define ME4000_AI_EX_TRIG_SETUP       _IOW (ME4000_MAGIC, 20, me4000_ai_trigger_t)
-#define ME4000_AI_CONFIG              _IOW (ME4000_MAGIC, 21, me4000_ai_config_t)
-#define ME4000_AI_SC_SETUP            _IOW (ME4000_MAGIC, 22, me4000_ai_sc_t)
+#define ME4000_AI_EX_TRIG_SETUP       _IOW (ME4000_MAGIC, 20, \
+					    struct me4000_ai_trigger)
+#define ME4000_AI_CONFIG              _IOW (ME4000_MAGIC, 21, \
+					    struct me4000_ai_config)
+#define ME4000_AI_SC_SETUP            _IOW (ME4000_MAGIC, 22, \
+					    struct me4000_ai_sc)
 #define ME4000_AI_FSM_STATE           _IOR (ME4000_MAGIC, 23, int)
 
-#define ME4000_DIO_CONFIG             _IOW (ME4000_MAGIC, 24, me4000_dio_config_t)
-#define ME4000_DIO_GET_BYTE           _IOR (ME4000_MAGIC, 25, me4000_dio_byte_t)
-#define ME4000_DIO_SET_BYTE           _IOW (ME4000_MAGIC, 26, me4000_dio_byte_t)
+#define ME4000_DIO_CONFIG             _IOW (ME4000_MAGIC, 24, \
+					    struct me4000_dio_config)
+#define ME4000_DIO_GET_BYTE           _IOR (ME4000_MAGIC, 25, \
+					    struct me4000_dio_byte)
+#define ME4000_DIO_SET_BYTE           _IOW (ME4000_MAGIC, 26, \
+					    struct me4000_dio_byte)
 #define ME4000_DIO_RESET              _IO  (ME4000_MAGIC, 27)
 
-#define ME4000_CNT_READ               _IOR (ME4000_MAGIC, 28, me4000_cnt_t)
-#define ME4000_CNT_WRITE              _IOW (ME4000_MAGIC, 29, me4000_cnt_t)
-#define ME4000_CNT_CONFIG             _IOW (ME4000_MAGIC, 30, me4000_cnt_config_t)
+#define ME4000_CNT_READ               _IOR (ME4000_MAGIC, 28, \
+					    struct me4000_cnt)
+#define ME4000_CNT_WRITE              _IOW (ME4000_MAGIC, 29, \
+					    struct me4000_cnt)
+#define ME4000_CNT_CONFIG             _IOW (ME4000_MAGIC, 30, \
+					    struct me4000_cnt_config)
 #define ME4000_CNT_RESET              _IO  (ME4000_MAGIC, 31)
 
 #define ME4000_EXT_INT_DISABLE        _IO  (ME4000_MAGIC, 32)
@@ -934,13 +943,16 @@ typedef struct {
 #define ME4000_AI_FULLSCALE_ENABLE    _IO  (ME4000_MAGIC, 37)
 #define ME4000_AI_FULLSCALE_DISABLE   _IO  (ME4000_MAGIC, 38)
 
-#define ME4000_AI_EEPROM_READ         _IOR (ME4000_MAGIC, 39, me4000_eeprom_t)
-#define ME4000_AI_EEPROM_WRITE        _IOW (ME4000_MAGIC, 40, me4000_eeprom_t)
+#define ME4000_AI_EEPROM_READ         _IOR (ME4000_MAGIC, 39, \
+					    struct me4000_eeprom)
+#define ME4000_AI_EEPROM_WRITE        _IOW (ME4000_MAGIC, 40, \
+					    struct me4000_eeprom)
 
 #define ME4000_AO_SIMULTANEOUS_EX_TRIG _IO  (ME4000_MAGIC, 41)
 #define ME4000_AO_SIMULTANEOUS_SW      _IO  (ME4000_MAGIC, 42)
 #define ME4000_AO_SIMULTANEOUS_DISABLE _IO  (ME4000_MAGIC, 43)
-#define ME4000_AO_SIMULTANEOUS_UPDATE  _IOW (ME4000_MAGIC, 44, me4000_ao_channel_list_t)
+#define ME4000_AO_SIMULTANEOUS_UPDATE  _IOW (ME4000_MAGIC, 44, \
+					     struct me4000_ao_channel_list)
 
 #define ME4000_AO_SYNCHRONOUS_EX_TRIG  _IO  (ME4000_MAGIC, 45)
 #define ME4000_AO_SYNCHRONOUS_SW       _IO  (ME4000_MAGIC, 46)

drivers/staging/pcc-acpi/Kconfig

@@ -0,0 +1,11 @@
+config PCC_ACPI
+	tristate "Panasonic ACPI Hotkey support"
+	depends on ACPI
+	default n
+	---help---
+	  This driver provides support for Panasonic hotkeys through the
+	  ACPI interface.  This works for the Panasonic R1 (N variant),
+	  R2, R3, T2, W2, and Y2 laptops.
+
+	  To compile this driver as a module, choose M here. The module
+	  will be called pcc-acpi.

drivers/staging/pcc-acpi/Makefile

@@ -0,0 +1 @@
+obj-$(CONFIG_PCC_ACPI)		+= pcc-acpi.o

drivers/staging/pcc-acpi/TODO

@@ -0,0 +1,7 @@
+TODO:
+	- Lindent fixes
+	- checkpatch.pl fixes
+	- verify that the acpi interface is correct
+	- remove /proc dependancy if needed (not sure yet.)
+
+Please send any patches for this driver to Greg Kroah-Hartman <greg@kroah.com>

drivers/staging/pcc-acpi/pcc-acpi.c

@@ -0,0 +1,1111 @@
+/*
+ *  Panasonic HotKey and lcd brightness control Extra driver
+ *  (C) 2004 Hiroshi Miura <miura@da-cha.org>
+ *  (C) 2004 NTT DATA Intellilink Co. http://www.intellilink.co.jp/
+ *  (C) YOKOTA Hiroshi <yokota (at) netlab. is. tsukuba. ac. jp>
+ *  (C) 2004 David Bronaugh <dbronaugh>
+ *
+ *  derived from toshiba_acpi.c, Copyright (C) 2002-2004 John Belmonte
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  publicshed by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ *---------------------------------------------------------------------------
+ *
+ * ChangeLog:
+ *
+ * 	Nov.04, 2006	Hiroshi Miura <miura@da-cha.org>
+ * 		-v0.9	remove warning about section reference.
+ * 			remove acpi_os_free
+ * 			add /proc/acpi/pcc/brightness interface to
+ * 			allow HAL to access.
+ * 			merge dbronaugh's enhancement
+ * 			Aug.17, 2004 David Bronaugh (dbronaugh)
+ *  				- Added screen brightness setting interface
+ *				  Thanks to the FreeBSD crew
+ *				  (acpi_panasonic.c authors)
+ * 				  for the ideas I needed to accomplish it
+ *
+ *	May.29, 2006	Hiroshi Miura <miura@da-cha.org>
+ *		-v0.8.4 follow to change keyinput structure
+ *			thanks Fabian Yamaguchi <fabs@cs.tu-berlin.de>,
+ *			Jacob Bower <jacob.bower@ic.ac.uk> and
+ *			Hiroshi Yokota for providing solutions.
+ *
+ *	Oct.02, 2004	Hiroshi Miura <miura@da-cha.org>
+ *		-v0.8.2	merge code of YOKOTA Hiroshi
+ *			<yokota@netlab.is.tsukuba.ac.jp>.
+ *			Add sticky key mode interface.
+ *			Refactoring acpi_pcc_generete_keyinput().
+ *
+ *	Sep.15, 2004	Hiroshi Miura <miura@da-cha.org>
+ *		-v0.8	Generate key input event on input subsystem.
+ *			This is based on yet another driver
+ *			written by Ryuta Nakanishi.
+ *
+ *	Sep.10, 2004	Hiroshi Miura <miura@da-cha.org>
+ *		-v0.7	Change proc interface functions using seq_file
+ *			facility as same as other ACPI drivers.
+ *
+ *	Aug.28, 2004	Hiroshi Miura <miura@da-cha.org>
+ *		-v0.6.4 Fix a silly error with status checking
+ *
+ *	Aug.25, 2004	Hiroshi Miura <miura@da-cha.org>
+ *		-v0.6.3 replace read_acpi_int by standard
+ *			function acpi_evaluate_integer
+ *			some clean up and make smart copyright notice.
+ *			fix return value of pcc_acpi_get_key()
+ *			fix checking return value of acpi_bus_register_driver()
+ *
+ *      Aug.22, 2004    David Bronaugh <dbronaugh@linuxboxen.org>
+ *              -v0.6.2 Add check on ACPI data (num_sifr)
+ *                      Coding style cleanups, better error messages/handling
+ *			Fixed an off-by-one error in memory allocation
+ *
+ *      Aug.21, 2004    David Bronaugh <dbronaugh@linuxboxen.org>
+ *              -v0.6.1 Fix a silly error with status checking
+ *
+ *      Aug.20, 2004    David Bronaugh <dbronaugh@linuxboxen.org>
+ *              - v0.6  Correct brightness controls to reflect reality
+ *                      based on information gleaned by Hiroshi Miura
+ *                      and discussions with Hiroshi Miura
+ *
+ *	Aug.10, 2004	Hiroshi Miura <miura@da-cha.org>
+ *		- v0.5  support LCD brightness control
+ *			based on the disclosed information by MEI.
+ *
+ *	Jul.25, 2004	Hiroshi Miura <miura@da-cha.org>
+ *		- v0.4  first post version
+ *		        add function to retrive SIFR
+ *
+ *	Jul.24, 2004	Hiroshi Miura <miura@da-cha.org>
+ *		- v0.3  get proper status of hotkey
+ *
+ *      Jul.22, 2004	Hiroshi Miura <miura@da-cha.org>
+ *		- v0.2  add HotKey handler
+ *
+ *      Jul.17, 2004	Hiroshi Miura <miura@da-cha.org>
+ *		- v0.1  start from toshiba_acpi driver written by John Belmonte
+ *
+ */
+
+#define ACPI_PCC_VERSION	"0.9+hy"
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/ctype.h>
+#include <linux/init.h>
+#include <linux/input.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <acpi/acpi_bus.h>
+#include <acpi/acpi_drivers.h>
+
+
+/*************************************************************************
+ * "seq" file template definition.
+ */
+/* "seq" initializer */
+#define SEQ_OPEN_FS(_open_func_name_, _show_func_name_) \
+static int _open_func_name_(struct inode *inode, struct file *file) \
+{								      \
+	return single_open(file, _show_func_name_, PDE(inode)->data);  \
+}
+
+/*-------------------------------------------------------------------------
+ * "seq" fops template for read-only files.
+ */
+#define SEQ_FILEOPS_R(_open_func_name_) \
+{ \
+	.open	 = _open_func_name_,		  \
+	.read	 = seq_read,			  \
+	.llseek	 = seq_lseek,			  \
+	.release = single_release,		  \
+}
+
+/*------------------------------------------------------------------------
+ * "seq" fops template for read-write files.
+ */
+#define SEQ_FILEOPS_RW(_open_func_name_, _write_func_name_) \
+{ \
+	.open	 = _open_func_name_ ,		  \
+	.read	 = seq_read,			  \
+	.write	 = _write_func_name_,		  \
+	.llseek	 = seq_lseek,			  \
+	.release = single_release,		  \
+}
+
+/*
+ * "seq" file template definition ended.
+ ***************************************************************************
+ */
+#ifndef ACPI_HOTKEY_COMPONENT
+#define ACPI_HOTKEY_COMPONENT	0x10000000
+#endif
+
+#define _COMPONENT		ACPI_HOTKEY_COMPONENT
+ACPI_MODULE_NAME("pcc_acpi");
+
+MODULE_AUTHOR("Hiroshi Miura, Hiroshi Yokota");
+MODULE_DESCRIPTION("ACPI HotKey driver for Panasonic Let's Note laptops");
+MODULE_LICENSE("GPL");
+
+#define LOGPREFIX "pcc_acpi: "
+
+/****************************************************
+ * Define ACPI PATHs
+ ****************************************************/
+/* Lets note hotkeys */
+#define METHOD_HKEY_QUERY	"HINF"
+#define METHOD_HKEY_SQTY	"SQTY"
+#define METHOD_HKEY_SINF	"SINF"
+#define METHOD_HKEY_SSET	"SSET"
+#define HKEY_NOTIFY		 0x80
+
+/* for brightness control */
+#define LCD_MAX_BRIGHTNESS 255
+/* This may be magical -- beware */
+#define LCD_BRIGHTNESS_INCREMENT 17
+/* Registers of SINF */
+#define SINF_LCD_BRIGHTNESS 4
+
+/*******************************************************************
+ *
+ * definitions for /proc/ interface
+ *
+ *******************************************************************/
+#define ACPI_PCC_DRIVER_NAME	"pcc_acpi"
+#define ACPI_PCC_DEVICE_NAME	"PCCExtra"
+#define ACPI_PCC_CLASS		"pcc"
+#define PROC_PCC		ACPI_PCC_CLASS
+
+#define ACPI_PCC_INPUT_PHYS	"panasonic/hkey0"
+
+/* This is transitional definition */
+#ifndef KEY_BATT
+# define KEY_BATT 227
+#endif
+
+#define PROC_STR_MAX_LEN  8
+
+#define BUS_PCC_HOTKEY BUS_I8042 /*0x1a*/ /* FIXME: BUS_I8042? */
+
+/* Fn+F4/F5 confricts with Shift+F1/F2  */
+/* This hack avoids key number confrict */
+#define PCC_KEYINPUT_MODE (0)
+
+/* LCD_TYPEs: 0 = Normal, 1 = Semi-transparent
+   ENV_STATEs: Normal temp=0x01, High temp=0x81, N/A=0x00
+*/
+enum SINF_BITS { SINF_NUM_BATTERIES = 0,
+		 SINF_LCD_TYPE,
+		 SINF_AC_MAX_BRIGHT,
+		 SINF_AC_MIN_BRIGHT,
+		 SINF_AC_CUR_BRIGHT,
+			     /* 4 = R1 only handle SINF_AC_CUR_BRIGHT
+			      * as SINF_CUR_BRIGHT and don't know AC state */
+		 SINF_DC_MAX_BRIGHT,
+		 SINF_DC_MIN_BRIGHT,
+		 SINF_DC_CUR_BRIGHT,
+		 SINF_MUTE,
+		 SINF_RESERVED,
+		 SINF_ENV_STATE, /* 10 */
+		 SINF_STICKY_KEY = 0x80,
+};
+
+static struct acpi_device_id pcc_device_ids[] = {
+	{"MAT0012", 0},
+	{"MAT0013", 0},
+	{"MAT0018", 0},
+	{"MAT0019", 0},
+	{"",	    0},
+};
+MODULE_DEVICE_TABLE(acpi, pcc_device_ids);
+
+
+static int __devinit acpi_pcc_hotkey_add(struct acpi_device *device);
+static int __devexit acpi_pcc_hotkey_remove(struct acpi_device *device,
+					    int type);
+static int acpi_pcc_hotkey_resume(struct acpi_device *device);
+
+
+static struct acpi_driver acpi_pcc_driver = {
+	.name =		ACPI_PCC_DRIVER_NAME,
+	.class =	ACPI_PCC_CLASS,
+	.ids =		pcc_device_ids,
+	.ops =		{
+				.add = acpi_pcc_hotkey_add,
+				.remove = __devexit_p(acpi_pcc_hotkey_remove),
+#ifdef CONFIG_PM
+				/*.suspend = acpi_pcc_hotkey_suspend,*/
+				.resume = acpi_pcc_hotkey_resume,
+#endif
+			},
+};
+
+struct acpi_hotkey {
+	acpi_handle		handle;
+	struct acpi_device	*device;
+	struct proc_dir_entry   *proc_dir_entry;
+	unsigned long		num_sifr;
+	unsigned long		status;
+	struct input_dev	*input_dev;
+	int			sticky_mode;
+};
+
+struct pcc_keyinput {
+	struct acpi_hotkey      *hotkey;
+	int key_mode;
+};
+
+/* *************************************************************************
+   Hotkey driver core
+   ************************************************************************* */
+/* -------------------------------------------------------------------------
+   method access functions
+   ------------------------------------------------------------------------- */
+static int acpi_pcc_write_sset(struct acpi_hotkey *hotkey, int func, int val)
+{
+	union acpi_object in_objs[] = {
+		{ .integer.type  = ACPI_TYPE_INTEGER,
+		  .integer.value = func, },
+		{ .integer.type  = ACPI_TYPE_INTEGER,
+		  .integer.value = val, },
+	};
+	struct acpi_object_list params = {
+		.count   = ARRAY_SIZE(in_objs),
+		.pointer = in_objs,
+	};
+	acpi_status status;
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_write_sset");
+
+	status = acpi_evaluate_object(hotkey->handle, METHOD_HKEY_SSET,
+								&params, NULL);
+
+	return_VALUE(status == AE_OK ? AE_OK : AE_ERROR);
+}
+
+static inline int acpi_pcc_get_sqty(struct acpi_device *device)
+{
+	unsigned long s;
+	acpi_status status;
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_get_sqty");
+
+	status = acpi_evaluate_integer(device->handle, METHOD_HKEY_SQTY,
+								NULL, &s);
+	if (ACPI_SUCCESS(status)) {
+		return_VALUE(s);
+	} else {
+		ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
+				  "evaluation error HKEY.SQTY\n"));
+		return_VALUE(-EINVAL);
+	}
+}
+
+static int acpi_pcc_retrieve_biosdata(struct acpi_hotkey *hotkey, u32 *sinf)
+{
+	acpi_status status;
+	struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL};
+	union acpi_object *hkey = NULL;
+	int i;
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_retrieve_biosdata");
+
+	status = acpi_evaluate_object(hotkey->handle, METHOD_HKEY_SINF, 0,
+				      &buffer);
+	if (ACPI_FAILURE(status)) {
+		ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
+				 "evaluation error HKEY.SINF\n"));
+		status = AE_ERROR;
+		return_VALUE(status);
+	}
+
+	hkey = buffer.pointer;
+	if (!hkey || (hkey->type != ACPI_TYPE_PACKAGE)) {
+		ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "Invalid HKEY.SINF\n"));
+		goto free_buffer;
+	}
+
+	if (hotkey->num_sifr < hkey->package.count) {
+		ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
+				 "SQTY reports bad SINF length\n"));
+		status = AE_ERROR;
+		goto free_buffer;
+	}
+
+	for (i = 0; i < hkey->package.count; i++) {
+		union acpi_object *element = &(hkey->package.elements[i]);
+		if (likely(element->type == ACPI_TYPE_INTEGER)) {
+			sinf[i] = element->integer.value;
+		} else {
+			ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
+					 "Invalid HKEY.SINF data\n"));
+			status = AE_ERROR;
+			break;
+		}
+	}
+	sinf[hkey->package.count] = -1;
+
+ free_buffer:
+	kfree(buffer.pointer);
+	return_VALUE(status == AE_OK ? AE_OK : AE_ERROR);
+}
+
+static int acpi_pcc_read_sinf_field(struct seq_file *seq, int field)
+{
+	struct acpi_hotkey *hotkey = (struct acpi_hotkey *) seq->private;
+	u32 sinf[hotkey->num_sifr + 1];
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_read_sinf_field");
+
+	if (ACPI_SUCCESS(acpi_pcc_retrieve_biosdata(hotkey, sinf)))
+		seq_printf(seq, "%u\n",	sinf[field]);
+	else
+		ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
+				 "Couldn't retrieve BIOS data\n"));
+
+	return_VALUE(AE_OK);
+}
+
+/* -------------------------------------------------------------------------
+   user interface functions
+   ------------------------------------------------------------------------- */
+/* read methods */
+/* Sinf read methods */
+#define PCC_SINF_READ_F(_name_, FUNC) \
+static int _name_(struct seq_file *seq, void *offset) \
+{ \
+	return_VALUE(ACPI_SUCCESS(acpi_pcc_read_sinf_field(seq,	\
+							  (FUNC))) \
+							  ? 0 : -EINVAL); \
+}
+
+PCC_SINF_READ_F(acpi_pcc_numbatteries_show,	 SINF_NUM_BATTERIES);
+PCC_SINF_READ_F(acpi_pcc_lcdtype_show,		 SINF_LCD_TYPE);
+PCC_SINF_READ_F(acpi_pcc_ac_brightness_max_show, SINF_AC_MAX_BRIGHT);
+PCC_SINF_READ_F(acpi_pcc_ac_brightness_min_show, SINF_AC_MIN_BRIGHT);
+PCC_SINF_READ_F(acpi_pcc_ac_brightness_show,	 SINF_AC_CUR_BRIGHT);
+PCC_SINF_READ_F(acpi_pcc_dc_brightness_max_show, SINF_DC_MAX_BRIGHT);
+PCC_SINF_READ_F(acpi_pcc_dc_brightness_min_show, SINF_DC_MIN_BRIGHT);
+PCC_SINF_READ_F(acpi_pcc_dc_brightness_show,	 SINF_DC_CUR_BRIGHT);
+PCC_SINF_READ_F(acpi_pcc_brightness_show,	 SINF_AC_CUR_BRIGHT);
+PCC_SINF_READ_F(acpi_pcc_mute_show,		 SINF_MUTE);
+
+static int acpi_pcc_sticky_key_show(struct seq_file *seq, void *offset)
+{
+	struct acpi_hotkey *hotkey = seq->private;
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_sticky_key_show");
+
+	if (!hotkey || !hotkey->device)
+		return_VALUE(-EINVAL);
+
+	seq_printf(seq, "%d\n", hotkey->sticky_mode);
+
+	return_VALUE(0);
+}
+
+static int acpi_pcc_keyinput_show(struct seq_file *seq, void *offset)
+{
+	struct acpi_hotkey 	*hotkey = seq->private;
+	struct input_dev 	*hotk_input_dev = hotkey->input_dev;
+	struct pcc_keyinput 	*keyinput = input_get_drvdata(hotk_input_dev);
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_keyinput_show");
+
+	seq_printf(seq, "%d\n", keyinput->key_mode);
+
+	return_VALUE(0);
+}
+
+static int acpi_pcc_version_show(struct seq_file *seq, void *offset)
+{
+	struct acpi_hotkey *hotkey = seq->private;
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_version_show");
+
+	if (!hotkey || !hotkey->device)
+		return_VALUE(-EINVAL);
+
+	seq_printf(seq, "%s version %s\n", ACPI_PCC_DRIVER_NAME,
+		   ACPI_PCC_VERSION);
+	seq_printf(seq, "%li functions\n", hotkey->num_sifr);
+
+	return_VALUE(0);
+}
+
+/* write methods */
+static ssize_t acpi_pcc_write_single_flag(struct file *file,
+					  const char __user *buffer,
+					  size_t count,
+					  int sinf_func)
+{
+	struct seq_file		*seq = file->private_data;
+	struct acpi_hotkey	*hotkey = seq->private;
+	char			write_string[PROC_STR_MAX_LEN];
+	u32			val;
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_write_single_flag");
+
+	if (!hotkey || (count > sizeof(write_string) - 1))
+		return_VALUE(-EINVAL);
+
+	if (copy_from_user(write_string, buffer, count))
+		return_VALUE(-EFAULT);
+
+	write_string[count] = '\0';
+
+	if ((sscanf(write_string, "%3i", &val) == 1) &&
+	    (val == 0 || val == 1))
+		acpi_pcc_write_sset(hotkey, sinf_func, val);
+
+	return_VALUE(count);
+}
+
+static unsigned long acpi_pcc_write_brightness(struct file *file,
+					       const char __user *buffer,
+					       size_t count,
+					       int min_index, int max_index,
+					       int cur_index)
+{
+	struct seq_file		*seq = (struct seq_file *)file->private_data;
+	struct acpi_hotkey	*hotkey = (struct acpi_hotkey *)seq->private;
+	char			write_string[PROC_STR_MAX_LEN];
+	u32 bright;
+	u32 sinf[hotkey->num_sifr + 1];
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_write_brightness");
+
+	if (!hotkey || (count > sizeof(write_string) - 1))
+		return_VALUE(-EINVAL);
+
+	if (copy_from_user(write_string, buffer, count))
+		return_VALUE(-EFAULT);
+
+	write_string[count] = '\0';
+
+	if (ACPI_FAILURE(acpi_pcc_retrieve_biosdata(hotkey, sinf))) {
+		ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
+				 "Couldn't retrieve BIOS data\n"));
+		goto end;
+	}
+
+	if ((sscanf(write_string, "%4i", &bright) == 1) &&
+	    (bright >= sinf[min_index]) &&
+	    (bright <= sinf[max_index]))
+		acpi_pcc_write_sset(hotkey, cur_index, bright);
+
+end:
+	return_VALUE(count);
+}
+
+static ssize_t acpi_pcc_write_ac_brightness(struct file *file,
+					    const char __user *buffer,
+					    size_t count, loff_t *ppos)
+{
+	return_VALUE(acpi_pcc_write_brightness(file, buffer, count,
+					       SINF_AC_MIN_BRIGHT,
+					       SINF_AC_MAX_BRIGHT,
+					       SINF_AC_CUR_BRIGHT));
+}
+
+static ssize_t acpi_pcc_write_dc_brightness(struct file *file,
+					    const char __user *buffer,
+					    size_t count, loff_t *ppos)
+{
+	return_VALUE(acpi_pcc_write_brightness(file, buffer, count,
+					       SINF_DC_MIN_BRIGHT,
+					       SINF_DC_MAX_BRIGHT,
+					       SINF_DC_CUR_BRIGHT));
+}
+
+static ssize_t acpi_pcc_write_no_brightness(struct file *file,
+					    const char __user *buffer,
+					    size_t count, loff_t *ppos)
+{
+	return acpi_pcc_write_brightness(file, buffer, count,
+					 SINF_AC_MIN_BRIGHT,
+					 SINF_AC_MAX_BRIGHT,
+					 SINF_AC_CUR_BRIGHT);
+}
+
+static ssize_t acpi_pcc_write_mute(struct file *file,
+				   const char __user *buffer,
+				   size_t count, loff_t *ppos)
+{
+	return_VALUE(acpi_pcc_write_single_flag(file, buffer, count,
+						SINF_MUTE));
+}
+
+static ssize_t acpi_pcc_write_sticky_key(struct file *file,
+					 const char __user *buffer,
+					 size_t count, loff_t *ppos)
+{
+	struct seq_file     *seq = (struct seq_file *)file->private_data;
+	struct acpi_hotkey  *hotkey = (struct acpi_hotkey *)seq->private;
+	char                 write_string[PROC_STR_MAX_LEN];
+	int                  mode;
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_write_sticky_key");
+
+	if (!hotkey || (count > sizeof(write_string) - 1))
+		return_VALUE(-EINVAL);
+
+	if (copy_from_user(write_string, buffer, count))
+		return_VALUE(-EFAULT);
+
+	write_string[count] = '\0';
+
+	if ((sscanf(write_string, "%3i", &mode) == 1) &&
+	    (mode == 0 || mode == 1)) {
+		acpi_pcc_write_sset(hotkey, SINF_STICKY_KEY, mode);
+		hotkey->sticky_mode = mode;
+	}
+
+	return_VALUE(count);
+}
+
+static ssize_t acpi_pcc_write_keyinput(struct file *file,
+				       const char __user *buffer,
+				       size_t count, loff_t *ppos)
+{
+	struct seq_file		*seq = (struct seq_file *)file->private_data;
+	struct acpi_hotkey	*hotkey = (struct acpi_hotkey *)seq->private;
+	struct pcc_keyinput 	*keyinput;
+	char			write_string[PROC_STR_MAX_LEN];
+	int			key_mode;
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_write_keyinput");
+
+	if (!hotkey || (count > (sizeof(write_string) - 1)))
+		return_VALUE(-EINVAL);
+
+	if (copy_from_user(write_string, buffer, count))
+		return_VALUE(-EFAULT);
+
+	write_string[count] = '\0';
+
+	if ((sscanf(write_string, "%4i", &key_mode) == 1) &&
+	    (key_mode == 0 || key_mode == 1)) {
+		keyinput = input_get_drvdata(hotkey->input_dev);
+		keyinput->key_mode = key_mode;
+	}
+
+	return_VALUE(count);
+}
+
+/* -------------------------------------------------------------------------
+   hotkey driver
+   ------------------------------------------------------------------------- */
+static void acpi_pcc_generete_keyinput(struct acpi_hotkey *hotkey)
+{
+	struct input_dev    *hotk_input_dev = hotkey->input_dev;
+	struct pcc_keyinput *keyinput = input_get_drvdata(hotk_input_dev);
+	int hinf = hotkey->status;
+	int key_code, hkey_num;
+	const int key_map[] = {
+		/*  0 */ -1,
+		/*  1 */ KEY_BRIGHTNESSDOWN,
+		/*  2 */ KEY_BRIGHTNESSUP,
+		/*  3 */ -1, /* vga/lcd switch event is not occur on
+				hotkey driver. */
+		/*  4 */ KEY_MUTE,
+		/*  5 */ KEY_VOLUMEDOWN,
+		/*  6 */ KEY_VOLUMEUP,
+		/*  7 */ KEY_SLEEP,
+		/*  8 */ -1, /* Change CPU boost: do nothing */
+		/*  9 */ KEY_BATT,
+		/* 10 */ KEY_SUSPEND,
+	};
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_generete_keyinput");
+
+	if (keyinput->key_mode == 0)
+		return_VOID;
+
+	hkey_num = hinf & 0xf;
+
+	if ((0 > hkey_num) ||
+	    (hkey_num > ARRAY_SIZE(key_map))) {
+		ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
+				  "hotkey number out of range: %d\n",
+				  hkey_num));
+		return_VOID;
+	}
+
+	key_code = key_map[hkey_num];
+
+	if (key_code != -1) {
+		int pushed = (hinf & 0x80) ? TRUE : FALSE;
+
+		input_report_key(hotk_input_dev, key_code, pushed);
+		input_sync(hotk_input_dev);
+	}
+}
+
+static int acpi_pcc_hotkey_get_key(struct acpi_hotkey *hotkey)
+{
+	unsigned long result;
+	acpi_status status = AE_OK;
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_hotkey_get_key");
+
+	status = acpi_evaluate_integer(hotkey->handle, METHOD_HKEY_QUERY,
+								NULL, &result);
+	if (likely(ACPI_SUCCESS(status)))
+		hotkey->status = result;
+	else
+		ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
+			"error getting hotkey status\n"));
+
+	return_VALUE(status == AE_OK);
+}
+
+void acpi_pcc_hotkey_notify(acpi_handle handle, u32 event, void *data)
+{
+	struct acpi_hotkey *hotkey = (struct acpi_hotkey *) data;
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_hotkey_notify");
+
+	switch (event) {
+	case HKEY_NOTIFY:
+		if (acpi_pcc_hotkey_get_key(hotkey)) {
+			/* generate event like '"pcc HKEY 00000080 00000084"'
+			 * when Fn+F4 pressed */
+			acpi_bus_generate_proc_event(hotkey->device, event,
+								hotkey->status);
+		}
+		acpi_pcc_generete_keyinput(hotkey);
+		break;
+	default:
+		/* nothing to do */
+		break;
+	}
+	return_VOID;
+}
+
+/* *************************************************************************
+   FS Interface (/proc)
+   ************************************************************************* */
+/* oepn proc file fs*/
+SEQ_OPEN_FS(acpi_pcc_dc_brightness_open_fs, acpi_pcc_dc_brightness_show);
+SEQ_OPEN_FS(acpi_pcc_numbatteries_open_fs, acpi_pcc_numbatteries_show);
+SEQ_OPEN_FS(acpi_pcc_lcdtype_open_fs, acpi_pcc_lcdtype_show);
+SEQ_OPEN_FS(acpi_pcc_ac_brightness_max_open_fs,
+	    acpi_pcc_ac_brightness_max_show);
+SEQ_OPEN_FS(acpi_pcc_ac_brightness_min_open_fs,
+	    acpi_pcc_ac_brightness_min_show);
+SEQ_OPEN_FS(acpi_pcc_ac_brightness_open_fs, acpi_pcc_ac_brightness_show);
+SEQ_OPEN_FS(acpi_pcc_dc_brightness_max_open_fs,
+	    acpi_pcc_dc_brightness_max_show);
+SEQ_OPEN_FS(acpi_pcc_dc_brightness_min_open_fs,
+	    acpi_pcc_dc_brightness_min_show);
+SEQ_OPEN_FS(acpi_pcc_brightness_open_fs, acpi_pcc_brightness_show);
+SEQ_OPEN_FS(acpi_pcc_mute_open_fs, acpi_pcc_mute_show);
+SEQ_OPEN_FS(acpi_pcc_version_open_fs, acpi_pcc_version_show);
+SEQ_OPEN_FS(acpi_pcc_keyinput_open_fs, acpi_pcc_keyinput_show);
+SEQ_OPEN_FS(acpi_pcc_sticky_key_open_fs, acpi_pcc_sticky_key_show);
+
+static struct file_operations acpi_pcc_numbatteries_fops =
+	SEQ_FILEOPS_R(acpi_pcc_numbatteries_open_fs);
+static struct file_operations acpi_pcc_lcdtype_fops =
+	SEQ_FILEOPS_R(acpi_pcc_lcdtype_open_fs);
+static struct file_operations acpi_pcc_mute_fops =
+	SEQ_FILEOPS_RW(acpi_pcc_mute_open_fs, acpi_pcc_write_mute);
+static struct file_operations acpi_pcc_ac_brightness_fops =
+	SEQ_FILEOPS_RW(acpi_pcc_ac_brightness_open_fs,
+		       acpi_pcc_write_ac_brightness);
+static struct file_operations acpi_pcc_ac_brightness_max_fops =
+	SEQ_FILEOPS_R(acpi_pcc_ac_brightness_max_open_fs);
+static struct file_operations acpi_pcc_ac_brightness_min_fops =
+	SEQ_FILEOPS_R(acpi_pcc_ac_brightness_min_open_fs);
+static struct file_operations acpi_pcc_dc_brightness_fops =
+	SEQ_FILEOPS_RW(acpi_pcc_dc_brightness_open_fs,
+		       acpi_pcc_write_dc_brightness);
+static struct file_operations acpi_pcc_dc_brightness_max_fops =
+	SEQ_FILEOPS_R(acpi_pcc_dc_brightness_max_open_fs);
+static struct file_operations acpi_pcc_dc_brightness_min_fops =
+	SEQ_FILEOPS_R(acpi_pcc_dc_brightness_min_open_fs);
+static struct file_operations acpi_pcc_brightness_fops =
+	SEQ_FILEOPS_RW(acpi_pcc_brightness_open_fs,
+		       acpi_pcc_write_no_brightness);
+static struct file_operations acpi_pcc_sticky_key_fops =
+	SEQ_FILEOPS_RW(acpi_pcc_sticky_key_open_fs, acpi_pcc_write_sticky_key);
+static struct file_operations acpi_pcc_keyinput_fops =
+	SEQ_FILEOPS_RW(acpi_pcc_keyinput_open_fs, acpi_pcc_write_keyinput);
+static struct file_operations acpi_pcc_version_fops =
+	SEQ_FILEOPS_R(acpi_pcc_version_open_fs);
+
+struct proc_item {
+	const char *name;
+	struct file_operations *fops;
+	mode_t flag;
+};
+
+/* Note: These functions map *exactly* to the SINF/SSET functions */
+struct proc_item acpi_pcc_proc_items_sifr[] = {
+	{ "num_batteries", &acpi_pcc_numbatteries_fops, S_IRUGO },
+	{ "lcd_type", &acpi_pcc_lcdtype_fops, S_IRUGO },
+	{ "ac_brightness_max", &acpi_pcc_ac_brightness_max_fops, S_IRUGO },
+	{ "ac_brightness_min", &acpi_pcc_ac_brightness_min_fops, S_IRUGO },
+	{ "ac_brightness", &acpi_pcc_ac_brightness_fops,
+		S_IFREG | S_IRUGO | S_IWUSR },
+	{ "dc_brightness_max", &acpi_pcc_dc_brightness_max_fops, S_IRUGO },
+	{ "dc_brightness_min", &acpi_pcc_dc_brightness_min_fops, S_IRUGO },
+	{ "dc_brightness", &acpi_pcc_dc_brightness_fops,
+		S_IFREG | S_IRUGO | S_IWUSR },
+	{ "brightness", &acpi_pcc_brightness_fops, S_IFREG | S_IRUGO | S_IWUSR},
+	{ "mute", &acpi_pcc_mute_fops, S_IFREG | S_IRUGO | S_IWUSR },
+	{ NULL, NULL, 0 },
+};
+
+struct proc_item acpi_pcc_proc_items[] = {
+	{ "sticky_key", &acpi_pcc_sticky_key_fops, S_IFREG | S_IRUGO | S_IWUSR},
+	{ "keyinput", &acpi_pcc_keyinput_fops, S_IFREG | S_IRUGO | S_IWUSR },
+	{ "version", &acpi_pcc_version_fops, S_IRUGO },
+	{ NULL, NULL, 0 },
+};
+
+static int __devinit acpi_pcc_add_device(struct acpi_device *device,
+					 struct proc_item *proc_items,
+					 int num)
+{
+	struct acpi_hotkey *hotkey = acpi_driver_data(device);
+	struct proc_dir_entry *proc;
+	struct proc_item *item;
+	int i;
+
+	for (item = proc_items, i = 0; item->name && i < num; ++item, ++i) {
+		proc = create_proc_entry(item->name, item->flag,
+					 hotkey->proc_dir_entry);
+		if (likely(proc)) {
+			proc->proc_fops = item->fops;
+			proc->data = hotkey;
+			proc->owner = THIS_MODULE;
+		} else {
+			while (i-- > 0) {
+				item--;
+				remove_proc_entry(item->name,
+					hotkey->proc_dir_entry);
+			}
+			return_VALUE(-ENODEV);
+		}
+	}
+	return_VALUE(0);
+}
+
+static int __devinit acpi_pcc_proc_init(struct acpi_device *device)
+{
+	struct proc_dir_entry *acpi_pcc_dir;
+	struct acpi_hotkey    *hotkey = acpi_driver_data(device);
+	acpi_status status;
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_proc_init");
+
+	acpi_pcc_dir = proc_mkdir(PROC_PCC, acpi_root_dir);
+
+	if (unlikely(!acpi_pcc_dir)) {
+		ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
+				 "Couldn't create dir in /proc\n"));
+		return_VALUE(-ENODEV);
+	}
+
+	acpi_pcc_dir->owner = THIS_MODULE;
+	hotkey->proc_dir_entry = acpi_pcc_dir;
+
+	status =  acpi_pcc_add_device(device, acpi_pcc_proc_items_sifr,
+				      hotkey->num_sifr);
+	status |= acpi_pcc_add_device(device, acpi_pcc_proc_items,
+				      ARRAY_SIZE(acpi_pcc_proc_items));
+	if (unlikely(status)) {
+		remove_proc_entry(PROC_PCC, acpi_root_dir);
+		hotkey->proc_dir_entry = NULL;
+		return_VALUE(-ENODEV);
+	}
+
+	return_VALUE(status);
+}
+
+static void __devexit acpi_pcc_remove_device(struct acpi_device *device,
+					     struct proc_item *proc_items,
+					     int num)
+{
+	struct acpi_hotkey *hotkey = acpi_driver_data(device);
+	struct proc_item *item;
+	int i;
+
+	for (item = proc_items, i = 0;
+	     item->name != NULL && i < num;
+	     ++item, ++i) {
+		remove_proc_entry(item->name, hotkey->proc_dir_entry);
+	}
+
+	return_VOID;
+}
+
+/* *************************************************************************
+   Power Management
+   ************************************************************************* */
+#ifdef CONFIG_PM
+static int acpi_pcc_hotkey_resume(struct acpi_device *device)
+{
+	struct acpi_hotkey *hotkey = acpi_driver_data(device);
+	acpi_status	    status = AE_OK;
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_hotkey_resume");
+
+	if (device == NULL || hotkey == NULL)
+		return_VALUE(-EINVAL);
+
+	if (hotkey->num_sifr != 0) {
+		ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Sticky mode restore: %d\n",
+				 hotkey->sticky_mode));
+
+		status = acpi_pcc_write_sset(hotkey, SINF_STICKY_KEY,
+					     hotkey->sticky_mode);
+	}
+	if (status != AE_OK)
+		return_VALUE(-EINVAL);
+
+	return_VALUE(0);
+}
+#endif
+
+/* *************************************************************************
+   Module init/remove
+   ************************************************************************* */
+/* -------------------------------------------------------------------------
+   input
+   ------------------------------------------------------------------------- */
+static int __devinit acpi_pcc_init_input(struct acpi_hotkey *hotkey)
+{
+	struct input_dev    *hotk_input_dev;
+	struct pcc_keyinput *pcc_keyinput;
+	int error;
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_init_input");
+
+	hotk_input_dev = input_allocate_device();
+	if (hotk_input_dev == NULL) {
+		ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
+				 "Couldn't allocate input device for hotkey"));
+		goto err_input;
+	}
+
+	pcc_keyinput = kcalloc(1, sizeof(struct pcc_keyinput), GFP_KERNEL);
+
+	if (pcc_keyinput == NULL) {
+		ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
+				 "Couldn't allocate mem for private data"));
+		goto err_pcc;
+	}
+
+	hotk_input_dev->evbit[0] = BIT(EV_KEY);
+
+	set_bit(KEY_BRIGHTNESSDOWN, hotk_input_dev->keybit);
+	set_bit(KEY_BRIGHTNESSUP,   hotk_input_dev->keybit);
+	set_bit(KEY_MUTE,	    hotk_input_dev->keybit);
+	set_bit(KEY_VOLUMEDOWN,	    hotk_input_dev->keybit);
+	set_bit(KEY_VOLUMEUP,	    hotk_input_dev->keybit);
+	set_bit(KEY_SLEEP,	    hotk_input_dev->keybit);
+	set_bit(KEY_BATT,	    hotk_input_dev->keybit);
+	set_bit(KEY_SUSPEND,	    hotk_input_dev->keybit);
+
+	hotk_input_dev->name       = ACPI_PCC_DRIVER_NAME;
+	hotk_input_dev->phys       = ACPI_PCC_INPUT_PHYS;
+	hotk_input_dev->id.bustype = BUS_PCC_HOTKEY;
+	hotk_input_dev->id.vendor  = 0x0001;
+	hotk_input_dev->id.product = 0x0001;
+	hotk_input_dev->id.version = 0x0100;
+
+	pcc_keyinput->key_mode = PCC_KEYINPUT_MODE;
+	pcc_keyinput->hotkey   = hotkey;
+
+	input_set_drvdata(hotk_input_dev, pcc_keyinput);
+
+	hotkey->input_dev = hotk_input_dev;
+
+	error = input_register_device(hotk_input_dev);
+
+	if (error)
+		goto err_pcc;
+
+	return_VALUE(0);
+
+ err_pcc:
+	input_unregister_device(hotk_input_dev);
+ err_input:
+	return_VALUE(-ENOMEM);
+}
+
+static void __devexit acpi_pcc_remove_input(struct acpi_hotkey *hotkey)
+{
+	struct input_dev    *hotk_input_dev;
+	struct pcc_keyinput *pcc_keyinput;
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_remove_input");
+
+	if (hotkey == NULL) {
+		ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "Can't free memory"));
+		return_VOID;
+	}
+
+	hotk_input_dev = hotkey->input_dev;
+	pcc_keyinput   = input_get_drvdata(hotk_input_dev);
+
+	input_unregister_device(hotk_input_dev);
+
+	kfree(pcc_keyinput);
+}
+
+/* -------------------------------------------------------------------------
+   ACPI
+   ------------------------------------------------------------------------- */
+static int __devinit acpi_pcc_hotkey_add(struct acpi_device *device)
+{
+	acpi_status		status = AE_OK;
+	struct acpi_hotkey	*hotkey = NULL;
+	int sifr_status, num_sifr, result;
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_hotkey_add");
+
+	if (device == NULL)
+		return_VALUE(-EINVAL);
+
+	sifr_status = acpi_pcc_get_sqty(device);
+
+	if (sifr_status > 255) {
+		ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "num_sifr too large"));
+		return_VALUE(-ENODEV);
+	}
+
+	if (sifr_status < 0) {
+		ACPI_DEBUG_PRINT((ACPI_DB_INFO, "not support SQTY"));
+		num_sifr = 0;
+	} else {
+		num_sifr = sifr_status;
+	}
+
+	hotkey = kcalloc(1, sizeof(struct acpi_hotkey), GFP_KERNEL);
+	if (hotkey == NULL) {
+		ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
+				 "Couldn't allocate mem for hotkey"));
+		return_VALUE(-ENOMEM);
+	}
+
+	hotkey->device   = device;
+	hotkey->handle   = device->handle;
+	hotkey->num_sifr = num_sifr;
+	acpi_driver_data(device) = hotkey;
+	strcpy(acpi_device_name(device),  ACPI_PCC_DEVICE_NAME);
+	strcpy(acpi_device_class(device), ACPI_PCC_CLASS);
+
+	status = acpi_install_notify_handler(hotkey->handle,
+					     ACPI_DEVICE_NOTIFY,
+					     acpi_pcc_hotkey_notify,
+					     hotkey);
+
+	if (ACPI_FAILURE(status)) {
+		ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
+				 "Error installing notify handler\n"));
+		kfree(hotkey);
+		return_VALUE(-ENODEV);
+	}
+
+	result = acpi_pcc_init_input(hotkey);
+	if (result != 0) {
+		ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
+				 "Error installing keyinput handler\n"));
+		kfree(hotkey);
+		return_VALUE(result);
+	}
+
+	return_VALUE(acpi_pcc_proc_init(device));
+}
+
+static int __devexit acpi_pcc_hotkey_remove(struct acpi_device *device,
+					    int type)
+{
+	acpi_status		status = AE_OK;
+	struct acpi_hotkey	*hotkey = acpi_driver_data(device);
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_hotkey_remove");
+
+	if (!device || !hotkey)
+		return_VALUE(-EINVAL);
+
+	if (hotkey->proc_dir_entry) {
+		acpi_pcc_remove_device(device, acpi_pcc_proc_items_sifr,
+				       hotkey->num_sifr);
+		acpi_pcc_remove_device(device, acpi_pcc_proc_items,
+				       ARRAY_SIZE(acpi_pcc_proc_items));
+		remove_proc_entry(PROC_PCC, acpi_root_dir);
+	}
+
+	status = acpi_remove_notify_handler(hotkey->handle,
+		    ACPI_DEVICE_NOTIFY, acpi_pcc_hotkey_notify);
+
+	if (ACPI_FAILURE(status)) {
+		ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
+				 "Error removing notify handler\n"));
+	}
+
+	acpi_pcc_remove_input(hotkey);
+	kfree(hotkey);
+	return_VALUE(status == AE_OK);
+}
+
+/* *********************************************************************
+   Module entry point
+   ********************************************************************* */
+static int __init acpi_pcc_init(void)
+{
+	int result;
+
+	ACPI_FUNCTION_TRACE("acpi_pcc_init");
+
+	printk(KERN_INFO LOGPREFIX "loading...\n");
+
+	if (acpi_disabled) {
+		printk(KERN_INFO LOGPREFIX "ACPI disabled.\n");
+		return_VALUE(-ENODEV);
+	}
+
+	result = acpi_bus_register_driver(&acpi_pcc_driver);
+	if (result < 0) {
+		ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
+				 "Error registering hotkey driver\n"));
+		return_VALUE(-ENODEV);
+	}
+
+	return_VALUE(result);
+}
+
+static void __exit acpi_pcc_exit(void)
+{
+	ACPI_FUNCTION_TRACE("acpi_pcc_exit");
+
+	printk(KERN_INFO LOGPREFIX "unloading...\n");
+
+	acpi_bus_unregister_driver(&acpi_pcc_driver);
+
+	return_VOID;
+}
+
+module_init(acpi_pcc_init);
+module_exit(acpi_pcc_exit);

drivers/staging/poch/Kconfig

@@ -0,0 +1,6 @@
+config POCH
+	tristate "Redrapids Pocket Change CardBus support"
+	depends on PCI && UIO
+	default N
+	---help---
+	  Enable support for Redrapids Pocket Change CardBus devices.

drivers/staging/poch/Makefile

@@ -0,0 +1 @@
+obj-$(CONFIG_POCH)		+= poch.o

drivers/staging/poch/README

@@ -0,0 +1,7 @@
+TODO:
+	- fix transmit overflows
+	- audit userspace interfaces
+	- get reserved major/minor if needed
+
+Please send patches to Greg Kroah-Hartman <greg@kroah.com> and
+Vijay Kumar <vijaykumar@bravegnu.org> and Jaya Kumar <jayakumar.lkml@gmail.com>

drivers/staging/poch/poch.c

@@ -0,0 +1,1425 @@
+/*
+ * User-space DMA and UIO based Redrapids Pocket Change CardBus driver
+ *
+ * Copyright 2008 Vijay Kumar <vijaykumar@bravegnu.org>
+ *
+ * Licensed under GPL version 2 only.
+ */
+
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/uio_driver.h>
+#include <linux/spinlock.h>
+#include <linux/cdev.h>
+#include <linux/delay.h>
+#include <linux/sysfs.h>
+#include <linux/poll.h>
+#include <linux/idr.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/ioctl.h>
+#include <linux/io.h>
+
+#include "poch.h"
+
+#include <asm/cacheflush.h>
+
+#ifndef PCI_VENDOR_ID_RRAPIDS
+#define PCI_VENDOR_ID_RRAPIDS 0x17D2
+#endif
+
+#ifndef PCI_DEVICE_ID_RRAPIDS_POCKET_CHANGE
+#define PCI_DEVICE_ID_RRAPIDS_POCKET_CHANGE 0x0351
+#endif
+
+#define POCH_NCHANNELS 2
+
+#define MAX_POCH_CARDS 8
+#define MAX_POCH_DEVICES (MAX_POCH_CARDS * POCH_NCHANNELS)
+
+#define DRV_NAME "poch"
+#define PFX      DRV_NAME ": "
+
+/*
+ * BAR0 Bridge Register Definitions
+ */
+
+#define BRIDGE_REV_REG			0x0
+#define BRIDGE_INT_MASK_REG		0x4
+#define BRIDGE_INT_STAT_REG		0x8
+
+#define BRIDGE_INT_ACTIVE		(0x1 << 31)
+#define BRIDGE_INT_FPGA		        (0x1 << 2)
+#define BRIDGE_INT_TEMP_FAIL		(0x1 << 1)
+#define	BRIDGE_INT_TEMP_WARN		(0x1 << 0)
+
+#define BRIDGE_FPGA_RESET_REG		0xC
+
+#define BRIDGE_CARD_POWER_REG		0x10
+#define BRIDGE_CARD_POWER_EN            (0x1 << 0)
+#define BRIDGE_CARD_POWER_PROG_DONE     (0x1 << 31)
+
+#define BRIDGE_JTAG_REG			0x14
+#define BRIDGE_DMA_GO_REG		0x18
+#define BRIDGE_STAT_0_REG		0x1C
+#define BRIDGE_STAT_1_REG		0x20
+#define BRIDGE_STAT_2_REG		0x24
+#define BRIDGE_STAT_3_REG		0x28
+#define BRIDGE_TEMP_STAT_REG		0x2C
+#define BRIDGE_TEMP_THRESH_REG		0x30
+#define BRIDGE_EEPROM_REVSEL_REG	0x34
+#define BRIDGE_CIS_STRUCT_REG		0x100
+#define BRIDGE_BOARDREV_REG		0x124
+
+/*
+ * BAR1 FPGA Register Definitions
+ */
+
+#define FPGA_IFACE_REV_REG		0x0
+#define FPGA_RX_BLOCK_SIZE_REG		0x8
+#define FPGA_TX_BLOCK_SIZE_REG		0xC
+#define FPGA_RX_BLOCK_COUNT_REG		0x10
+#define FPGA_TX_BLOCK_COUNT_REG		0x14
+#define FPGA_RX_CURR_DMA_BLOCK_REG	0x18
+#define FPGA_TX_CURR_DMA_BLOCK_REG	0x1C
+#define FPGA_RX_GROUP_COUNT_REG		0x20
+#define FPGA_TX_GROUP_COUNT_REG		0x24
+#define FPGA_RX_CURR_GROUP_REG		0x28
+#define FPGA_TX_CURR_GROUP_REG		0x2C
+#define FPGA_RX_CURR_PCI_REG		0x38
+#define FPGA_TX_CURR_PCI_REG		0x3C
+#define FPGA_RX_GROUP0_START_REG	0x40
+#define FPGA_TX_GROUP0_START_REG	0xC0
+#define FPGA_DMA_DESC_1_REG		0x140
+#define FPGA_DMA_DESC_2_REG		0x144
+#define FPGA_DMA_DESC_3_REG		0x148
+#define FPGA_DMA_DESC_4_REG		0x14C
+
+#define FPGA_DMA_INT_STAT_REG		0x150
+#define FPGA_DMA_INT_MASK_REG		0x154
+#define FPGA_DMA_INT_RX		(1 << 0)
+#define FPGA_DMA_INT_TX		(1 << 1)
+
+#define FPGA_RX_GROUPS_PER_INT_REG	0x158
+#define FPGA_TX_GROUPS_PER_INT_REG	0x15C
+#define FPGA_DMA_ADR_PAGE_REG		0x160
+#define FPGA_FPGA_REV_REG		0x200
+
+#define FPGA_ADC_CLOCK_CTL_REG		0x204
+#define FPGA_ADC_CLOCK_CTL_OSC_EN	(0x1 << 3)
+#define FPGA_ADC_CLOCK_LOCAL_CLK	(0x1 | FPGA_ADC_CLOCK_CTL_OSC_EN)
+#define FPGA_ADC_CLOCK_EXT_SAMP_CLK	0X0
+
+#define FPGA_ADC_DAC_EN_REG		0x208
+#define FPGA_ADC_DAC_EN_DAC_OFF         (0x1 << 1)
+#define FPGA_ADC_DAC_EN_ADC_OFF         (0x1 << 0)
+
+#define FPGA_INT_STAT_REG		0x20C
+#define FPGA_INT_MASK_REG		0x210
+#define FPGA_INT_PLL_UNLOCKED		(0x1 << 9)
+#define FPGA_INT_DMA_CORE		(0x1 << 8)
+#define FPGA_INT_TX_FF_EMPTY		(0x1 << 7)
+#define FPGA_INT_RX_FF_EMPTY		(0x1 << 6)
+#define FPGA_INT_TX_FF_OVRFLW		(0x1 << 3)
+#define FPGA_INT_RX_FF_OVRFLW		(0x1 << 2)
+#define FPGA_INT_TX_ACQ_DONE		(0x1 << 1)
+#define FPGA_INT_RX_ACQ_DONE		(0x1)
+
+#define FPGA_RX_ADC_CTL_REG		0x214
+#define FPGA_RX_ADC_CTL_CONT_CAP	(0x0)
+#define FPGA_RX_ADC_CTL_SNAP_CAP	(0x1)
+
+#define FPGA_RX_ARM_REG			0x21C
+
+#define FPGA_DOM_REG			0x224
+#define	FPGA_DOM_DCM_RESET		(0x1 << 5)
+#define FPGA_DOM_SOFT_RESET		(0x1 << 4)
+#define FPGA_DOM_DUAL_M_SG_DMA		(0x0)
+#define FPGA_DOM_TARGET_ACCESS		(0x1)
+
+#define FPGA_TX_CTL_REG			0x228
+#define FPGA_TX_CTL_FIFO_FLUSH          (0x1 << 9)
+#define FPGA_TX_CTL_OUTPUT_ZERO         (0x0 << 2)
+#define FPGA_TX_CTL_OUTPUT_CARDBUS      (0x1 << 2)
+#define FPGA_TX_CTL_OUTPUT_ADC          (0x2 << 2)
+#define FPGA_TX_CTL_OUTPUT_SNAPSHOT     (0x3 << 2)
+#define FPGA_TX_CTL_LOOPBACK            (0x1 << 0)
+
+#define FPGA_ENDIAN_MODE_REG		0x22C
+#define FPGA_RX_FIFO_COUNT_REG		0x28C
+#define FPGA_TX_ENABLE_REG		0x298
+#define FPGA_TX_TRIGGER_REG		0x29C
+#define FPGA_TX_DATAMEM_COUNT_REG	0x2A8
+#define FPGA_CAP_FIFO_REG		0x300
+#define FPGA_TX_SNAPSHOT_REG		0x8000
+
+/*
+ * Channel Index Definitions
+ */
+
+enum {
+	CHNO_RX_CHANNEL,
+	CHNO_TX_CHANNEL,
+};
+
+struct poch_dev;
+
+enum channel_dir {
+	CHANNEL_DIR_RX,
+	CHANNEL_DIR_TX,
+};
+
+struct poch_group_info {
+	struct page *pg;
+	dma_addr_t dma_addr;
+	unsigned long user_offset;
+};
+
+struct channel_info {
+	unsigned int chno;
+
+	atomic_t sys_block_size;
+	atomic_t sys_group_size;
+	atomic_t sys_group_count;
+
+	enum channel_dir dir;
+
+	unsigned long block_size;
+	unsigned long group_size;
+	unsigned long group_count;
+
+	/* Contains the DMA address and VM offset of each group. */
+	struct poch_group_info *groups;
+
+	/* Contains the header and circular buffer exported to userspace. */
+	spinlock_t group_offsets_lock;
+	struct poch_cbuf_header *header;
+	struct page *header_pg;
+	unsigned long header_size;
+
+	/* Last group indicated as 'complete' to user space. */
+	unsigned int transfer;
+
+	wait_queue_head_t wq;
+
+	union {
+		unsigned int data_available;
+		unsigned int space_available;
+	};
+
+	void __iomem *bridge_iomem;
+	void __iomem *fpga_iomem;
+	spinlock_t *iomem_lock;
+
+	atomic_t free;
+	atomic_t inited;
+
+	/* Error counters */
+	struct poch_counters counters;
+	spinlock_t counters_lock;
+
+	struct device *dev;
+};
+
+struct poch_dev {
+	struct uio_info uio;
+	struct pci_dev *pci_dev;
+	unsigned int nchannels;
+	struct channel_info channels[POCH_NCHANNELS];
+	struct cdev cdev;
+
+	/* Counts the no. of channels that have been opened. On first
+	 * open, the card is powered on. On last channel close, the
+	 * card is powered off.
+	 */
+	atomic_t usage;
+
+	void __iomem *bridge_iomem;
+	void __iomem *fpga_iomem;
+	spinlock_t iomem_lock;
+
+	struct device *dev;
+};
+
+static dev_t poch_first_dev;
+static struct class *poch_cls;
+static DEFINE_IDR(poch_ids);
+
+static ssize_t store_block_size(struct device *dev,
+				struct device_attribute *attr,
+				const char *buf, size_t count)
+{
+	struct channel_info *channel = dev_get_drvdata(dev);
+	unsigned long block_size;
+
+	sscanf(buf, "%lu", &block_size);
+	atomic_set(&channel->sys_block_size, block_size);
+
+	return count;
+}
+static DEVICE_ATTR(block_size, S_IWUSR|S_IWGRP, NULL, store_block_size);
+
+static ssize_t store_group_size(struct device *dev,
+				struct device_attribute *attr,
+				const char *buf, size_t count)
+{
+	struct channel_info *channel = dev_get_drvdata(dev);
+	unsigned long group_size;
+
+	sscanf(buf, "%lu", &group_size);
+	atomic_set(&channel->sys_group_size, group_size);
+
+	return count;
+}
+static DEVICE_ATTR(group_size, S_IWUSR|S_IWGRP, NULL, store_group_size);
+
+static ssize_t store_group_count(struct device *dev,
+				struct device_attribute *attr,
+				 const char *buf, size_t count)
+{
+	struct channel_info *channel = dev_get_drvdata(dev);
+	unsigned long group_count;
+
+	sscanf(buf, "%lu", &group_count);
+	atomic_set(&channel->sys_group_count, group_count);
+
+	return count;
+}
+static DEVICE_ATTR(group_count, S_IWUSR|S_IWGRP, NULL, store_group_count);
+
+static ssize_t show_direction(struct device *dev,
+			      struct device_attribute *attr, char *buf)
+{
+	struct channel_info *channel = dev_get_drvdata(dev);
+	int len;
+
+	len = sprintf(buf, "%s\n", (channel->dir ? "tx" : "rx"));
+	return len;
+}
+static DEVICE_ATTR(dir, S_IRUSR|S_IRGRP, show_direction, NULL);
+
+static ssize_t show_mmap_size(struct device *dev,
+			      struct device_attribute *attr, char *buf)
+{
+	struct channel_info *channel = dev_get_drvdata(dev);
+	int len;
+	unsigned long mmap_size;
+	unsigned long group_pages;
+	unsigned long header_pages;
+	unsigned long total_group_pages;
+
+	/* FIXME: We do not have to add 1, if group_size a multiple of
+	   PAGE_SIZE. */
+	group_pages = (channel->group_size / PAGE_SIZE) + 1;
+	header_pages = (channel->header_size / PAGE_SIZE) + 1;
+	total_group_pages = group_pages * channel->group_count;
+
+	mmap_size = (header_pages + total_group_pages) * PAGE_SIZE;
+	len = sprintf(buf, "%lu\n", mmap_size);
+	return len;
+}
+static DEVICE_ATTR(mmap_size, S_IRUSR|S_IRGRP, show_mmap_size, NULL);
+
+static struct device_attribute *poch_class_attrs[] = {
+	&dev_attr_block_size,
+	&dev_attr_group_size,
+	&dev_attr_group_count,
+	&dev_attr_dir,
+	&dev_attr_mmap_size,
+};
+
+static void poch_channel_free_groups(struct channel_info *channel)
+{
+	unsigned long i;
+
+	for (i = 0; i < channel->group_count; i++) {
+		struct poch_group_info *group;
+		unsigned int order;
+
+		group = &channel->groups[i];
+		order = get_order(channel->group_size);
+		if (group->pg)
+			__free_pages(group->pg, order);
+	}
+}
+
+static int poch_channel_alloc_groups(struct channel_info *channel)
+{
+	unsigned long i;
+	unsigned long group_pages;
+	unsigned long header_pages;
+
+	group_pages = (channel->group_size / PAGE_SIZE) + 1;
+	header_pages = (channel->header_size / PAGE_SIZE) + 1;
+
+	for (i = 0; i < channel->group_count; i++) {
+		struct poch_group_info *group;
+		unsigned int order;
+		gfp_t gfp_mask;
+
+		group = &channel->groups[i];
+		order = get_order(channel->group_size);
+
+		/*
+		 * __GFP_COMP is required here since we are going to
+		 * perform non-linear mapping to userspace. For more
+		 * information read the vm_insert_page() function
+		 * comments.
+		 */
+
+		gfp_mask = GFP_KERNEL | GFP_DMA32 | __GFP_ZERO;
+		group->pg = alloc_pages(gfp_mask, order);
+		if (!group->pg) {
+			poch_channel_free_groups(channel);
+			return -ENOMEM;
+		}
+
+		/* FIXME: This is the physical address not the bus
+		 * address!  This won't work in architectures that
+		 * have an IOMMU. Can we use pci_map_single() for
+		 * this?
+		 */
+		group->dma_addr = page_to_pfn(group->pg) * PAGE_SIZE;
+		group->user_offset =
+			(header_pages + (i * group_pages)) * PAGE_SIZE;
+
+		printk(KERN_INFO PFX "%ld: user_offset: 0x%lx dma: 0x%x\n", i,
+		       group->user_offset, group->dma_addr);
+	}
+
+	return 0;
+}
+
+static void channel_latch_attr(struct channel_info *channel)
+{
+	channel->group_count = atomic_read(&channel->sys_group_count);
+	channel->group_size = atomic_read(&channel->sys_group_size);
+	channel->block_size = atomic_read(&channel->sys_block_size);
+}
+
+/*
+ * Configure DMA group registers
+ */
+static void channel_dma_init(struct channel_info *channel)
+{
+	void __iomem *fpga = channel->fpga_iomem;
+	u32 group_regs_base;
+	u32 group_reg;
+	unsigned int page;
+	unsigned int group_in_page;
+	unsigned long i;
+	u32 block_size_reg;
+	u32 block_count_reg;
+	u32 group_count_reg;
+	u32 groups_per_int_reg;
+	u32 curr_pci_reg;
+
+	if (channel->chno == CHNO_RX_CHANNEL) {
+		group_regs_base = FPGA_RX_GROUP0_START_REG;
+		block_size_reg = FPGA_RX_BLOCK_SIZE_REG;
+		block_count_reg = FPGA_RX_BLOCK_COUNT_REG;
+		group_count_reg = FPGA_RX_GROUP_COUNT_REG;
+		groups_per_int_reg = FPGA_RX_GROUPS_PER_INT_REG;
+		curr_pci_reg = FPGA_RX_CURR_PCI_REG;
+	} else {
+		group_regs_base = FPGA_TX_GROUP0_START_REG;
+		block_size_reg = FPGA_TX_BLOCK_SIZE_REG;
+		block_count_reg = FPGA_TX_BLOCK_COUNT_REG;
+		group_count_reg = FPGA_TX_GROUP_COUNT_REG;
+		groups_per_int_reg = FPGA_TX_GROUPS_PER_INT_REG;
+		curr_pci_reg = FPGA_TX_CURR_PCI_REG;
+	}
+
+	printk(KERN_WARNING "block_size, group_size, group_count\n");
+	iowrite32(channel->block_size, fpga + block_size_reg);
+	iowrite32(channel->group_size / channel->block_size,
+		  fpga + block_count_reg);
+	iowrite32(channel->group_count, fpga + group_count_reg);
+	/* FIXME: Hardcoded groups per int. Get it from sysfs? */
+	iowrite32(1, fpga + groups_per_int_reg);
+
+	/* Unlock PCI address? Not defined in the data sheet, but used
+	 * in the reference code by Redrapids.
+	 */
+	iowrite32(0x1, fpga + curr_pci_reg);
+
+	/* The DMA address page register is shared between the RX and
+	 * TX channels, so acquire lock.
+	 */
+	spin_lock(channel->iomem_lock);
+	for (i = 0; i < channel->group_count; i++) {
+		page = i / 32;
+		group_in_page = i % 32;
+
+		group_reg = group_regs_base + (group_in_page * 4);
+
+		iowrite32(page, fpga + FPGA_DMA_ADR_PAGE_REG);
+		iowrite32(channel->groups[i].dma_addr, fpga + group_reg);
+	}
+	for (i = 0; i < channel->group_count; i++) {
+		page = i / 32;
+		group_in_page = i % 32;
+
+		group_reg = group_regs_base + (group_in_page * 4);
+
+		iowrite32(page, fpga + FPGA_DMA_ADR_PAGE_REG);
+		printk(KERN_INFO PFX "%ld: read dma_addr: 0x%x\n", i,
+		       ioread32(fpga + group_reg));
+	}
+	spin_unlock(channel->iomem_lock);
+
+}
+
+static int poch_channel_alloc_header(struct channel_info *channel)
+{
+	struct poch_cbuf_header *header = channel->header;
+	unsigned long group_offset_size;
+	unsigned long tot_group_offsets_size;
+
+	/* Allocate memory to hold header exported userspace */
+	group_offset_size = sizeof(header->group_offsets[0]);
+	tot_group_offsets_size = group_offset_size * channel->group_count;
+	channel->header_size = sizeof(*header) + tot_group_offsets_size;
+	channel->header_pg = alloc_pages(GFP_KERNEL | __GFP_ZERO,
+					 get_order(channel->header_size));
+	if (!channel->header_pg)
+		return -ENOMEM;
+
+	channel->header = page_address(channel->header_pg);
+
+	return 0;
+}
+
+static void poch_channel_free_header(struct channel_info *channel)
+{
+	unsigned int order;
+
+	order = get_order(channel->header_size);
+	__free_pages(channel->header_pg, order);
+}
+
+static void poch_channel_init_header(struct channel_info *channel)
+{
+	int i;
+	struct poch_group_info *groups;
+	s32 *group_offsets;
+
+	channel->header->group_size_bytes = channel->group_size;
+	channel->header->group_count = channel->group_count;
+
+	spin_lock_init(&channel->group_offsets_lock);
+
+	group_offsets = channel->header->group_offsets;
+	groups = channel->groups;
+
+	for (i = 0; i < channel->group_count; i++) {
+		if (channel->dir == CHANNEL_DIR_RX)
+			group_offsets[i] = -1;
+		else
+			group_offsets[i] = groups[i].user_offset;
+	}
+}
+
+static void __poch_channel_clear_counters(struct channel_info *channel)
+{
+	channel->counters.pll_unlock = 0;
+	channel->counters.fifo_empty = 0;
+	channel->counters.fifo_overflow = 0;
+}
+
+static int poch_channel_init(struct channel_info *channel,
+			     struct poch_dev *poch_dev)
+{
+	struct pci_dev *pdev = poch_dev->pci_dev;
+	struct device *dev = &pdev->dev;
+	unsigned long alloc_size;
+	int ret;
+
+	printk(KERN_WARNING "channel_latch_attr\n");
+
+	channel_latch_attr(channel);
+
+	channel->transfer = 0;
+
+	/* Allocate memory to hold group information. */
+	alloc_size = channel->group_count * sizeof(struct poch_group_info);
+	channel->groups = kzalloc(alloc_size, GFP_KERNEL);
+	if (!channel->groups) {
+		dev_err(dev, "error allocating memory for group info\n");
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	printk(KERN_WARNING "poch_channel_alloc_groups\n");
+
+	ret = poch_channel_alloc_groups(channel);
+	if (ret) {
+		dev_err(dev, "error allocating groups of order %d\n",
+			get_order(channel->group_size));
+		goto out_free_group_info;
+	}
+
+	ret = poch_channel_alloc_header(channel);
+	if (ret) {
+		dev_err(dev, "error allocating user space header\n");
+		goto out_free_groups;
+	}
+
+	channel->fpga_iomem = poch_dev->fpga_iomem;
+	channel->bridge_iomem = poch_dev->bridge_iomem;
+	channel->iomem_lock = &poch_dev->iomem_lock;
+	spin_lock_init(&channel->counters_lock);
+
+	__poch_channel_clear_counters(channel);
+
+	printk(KERN_WARNING "poch_channel_init_header\n");
+
+	poch_channel_init_header(channel);
+
+	return 0;
+
+ out_free_groups:
+	poch_channel_free_groups(channel);
+ out_free_group_info:
+	kfree(channel->groups);
+ out:
+	return ret;
+}
+
+static int poch_wait_fpga_prog(void __iomem *bridge)
+{
+	unsigned long total_wait;
+	const unsigned long wait_period = 100;
+	/* FIXME: Get the actual timeout */
+	const unsigned long prog_timeo = 10000; /* 10 Seconds */
+	u32 card_power;
+
+	printk(KERN_WARNING "poch_wait_fpg_prog\n");
+
+	printk(KERN_INFO PFX "programming fpga ...\n");
+	total_wait = 0;
+	while (1) {
+		msleep(wait_period);
+		total_wait += wait_period;
+
+		card_power = ioread32(bridge + BRIDGE_CARD_POWER_REG);
+		if (card_power & BRIDGE_CARD_POWER_PROG_DONE) {
+			printk(KERN_INFO PFX "programming done\n");
+			return 0;
+		}
+		if (total_wait > prog_timeo) {
+			printk(KERN_ERR PFX
+			       "timed out while programming FPGA\n");
+			return -EIO;
+		}
+	}
+}
+
+static void poch_card_power_off(struct poch_dev *poch_dev)
+{
+	void __iomem *bridge = poch_dev->bridge_iomem;
+	u32 card_power;
+
+	iowrite32(0, bridge + BRIDGE_INT_MASK_REG);
+	iowrite32(0, bridge + BRIDGE_DMA_GO_REG);
+
+	card_power = ioread32(bridge + BRIDGE_CARD_POWER_REG);
+	iowrite32(card_power & ~BRIDGE_CARD_POWER_EN,
+		  bridge + BRIDGE_CARD_POWER_REG);
+}
+
+enum clk_src {
+	CLK_SRC_ON_BOARD,
+	CLK_SRC_EXTERNAL
+};
+
+static void poch_card_clock_on(void __iomem *fpga)
+{
+	/* FIXME: Get this data through sysfs? */
+	enum clk_src clk_src = CLK_SRC_ON_BOARD;
+
+	if (clk_src == CLK_SRC_ON_BOARD) {
+		iowrite32(FPGA_ADC_CLOCK_LOCAL_CLK | FPGA_ADC_CLOCK_CTL_OSC_EN,
+			  fpga + FPGA_ADC_CLOCK_CTL_REG);
+	} else if (clk_src == CLK_SRC_EXTERNAL) {
+		iowrite32(FPGA_ADC_CLOCK_EXT_SAMP_CLK,
+			  fpga + FPGA_ADC_CLOCK_CTL_REG);
+	}
+}
+
+static int poch_card_power_on(struct poch_dev *poch_dev)
+{
+	void __iomem *bridge = poch_dev->bridge_iomem;
+	void __iomem *fpga = poch_dev->fpga_iomem;
+
+	iowrite32(BRIDGE_CARD_POWER_EN, bridge + BRIDGE_CARD_POWER_REG);
+
+	if (poch_wait_fpga_prog(bridge) != 0) {
+		poch_card_power_off(poch_dev);
+		return -EIO;
+	}
+
+	poch_card_clock_on(fpga);
+
+	/* Sync to new clock, reset state machines, set DMA mode. */
+	iowrite32(FPGA_DOM_DCM_RESET | FPGA_DOM_SOFT_RESET
+		  | FPGA_DOM_DUAL_M_SG_DMA, fpga + FPGA_DOM_REG);
+
+	/* FIXME: The time required for sync. needs to be tuned. */
+	msleep(1000);
+
+	return 0;
+}
+
+static void poch_channel_analog_on(struct channel_info *channel)
+{
+	void __iomem *fpga = channel->fpga_iomem;
+	u32 adc_dac_en;
+
+	spin_lock(channel->iomem_lock);
+	adc_dac_en = ioread32(fpga + FPGA_ADC_DAC_EN_REG);
+	switch (channel->chno) {
+	case CHNO_RX_CHANNEL:
+		iowrite32(adc_dac_en & ~FPGA_ADC_DAC_EN_ADC_OFF,
+			  fpga + FPGA_ADC_DAC_EN_REG);
+		break;
+	case CHNO_TX_CHANNEL:
+		iowrite32(adc_dac_en & ~FPGA_ADC_DAC_EN_DAC_OFF,
+			  fpga + FPGA_ADC_DAC_EN_REG);
+		break;
+	}
+	spin_unlock(channel->iomem_lock);
+}
+
+static int poch_open(struct inode *inode, struct file *filp)
+{
+	struct poch_dev *poch_dev;
+	struct channel_info *channel;
+	void __iomem *bridge;
+	void __iomem *fpga;
+	int chno;
+	int usage;
+	int ret;
+
+	poch_dev = container_of(inode->i_cdev, struct poch_dev, cdev);
+	bridge = poch_dev->bridge_iomem;
+	fpga = poch_dev->fpga_iomem;
+
+	chno = iminor(inode) % poch_dev->nchannels;
+	channel = &poch_dev->channels[chno];
+
+	if (!atomic_dec_and_test(&channel->free)) {
+		atomic_inc(&channel->free);
+		ret = -EBUSY;
+		goto out;
+	}
+
+	usage = atomic_inc_return(&poch_dev->usage);
+
+	printk(KERN_WARNING "poch_card_power_on\n");
+
+	if (usage == 1) {
+		ret = poch_card_power_on(poch_dev);
+		if (ret)
+			goto out_dec_usage;
+	}
+
+	printk(KERN_INFO "CardBus Bridge Revision: %x\n",
+	       ioread32(bridge + BRIDGE_REV_REG));
+	printk(KERN_INFO "CardBus Interface Revision: %x\n",
+	       ioread32(fpga + FPGA_IFACE_REV_REG));
+
+	channel->chno = chno;
+	filp->private_data = channel;
+
+	printk(KERN_WARNING "poch_channel_init\n");
+
+	ret = poch_channel_init(channel, poch_dev);
+	if (ret)
+		goto out_power_off;
+
+	poch_channel_analog_on(channel);
+
+	printk(KERN_WARNING "channel_dma_init\n");
+
+	channel_dma_init(channel);
+
+	printk(KERN_WARNING "poch_channel_analog_on\n");
+
+	if (usage == 1) {
+		printk(KERN_WARNING "setting up DMA\n");
+
+		/* Initialize DMA Controller. */
+		iowrite32(FPGA_CAP_FIFO_REG, bridge + BRIDGE_STAT_2_REG);
+		iowrite32(FPGA_DMA_DESC_1_REG, bridge + BRIDGE_STAT_3_REG);
+
+		ioread32(fpga + FPGA_DMA_INT_STAT_REG);
+		ioread32(fpga + FPGA_INT_STAT_REG);
+		ioread32(bridge + BRIDGE_INT_STAT_REG);
+
+		/* Initialize Interrupts. FIXME: Enable temperature
+		 * handling We are enabling both Tx and Rx channel
+		 * interrupts here. Do we need to enable interrupts
+		 * only for the current channel? Anyways we won't get
+		 * the interrupt unless the DMA is activated.
+		 */
+		iowrite32(BRIDGE_INT_FPGA, bridge + BRIDGE_INT_MASK_REG);
+		iowrite32(FPGA_INT_DMA_CORE
+			  | FPGA_INT_PLL_UNLOCKED
+			  | FPGA_INT_TX_FF_EMPTY
+			  | FPGA_INT_RX_FF_EMPTY
+			  | FPGA_INT_TX_FF_OVRFLW
+			  | FPGA_INT_RX_FF_OVRFLW,
+			  fpga + FPGA_INT_MASK_REG);
+		iowrite32(FPGA_DMA_INT_RX | FPGA_DMA_INT_TX,
+			  fpga + FPGA_DMA_INT_MASK_REG);
+	}
+
+	if (channel->dir == CHANNEL_DIR_TX) {
+		/* Flush TX FIFO and output data from cardbus. */
+		iowrite32(FPGA_TX_CTL_FIFO_FLUSH
+			  | FPGA_TX_CTL_OUTPUT_CARDBUS,
+			  fpga + FPGA_TX_CTL_REG);
+	}
+
+	atomic_inc(&channel->inited);
+
+	return 0;
+
+ out_power_off:
+	if (usage == 1)
+		poch_card_power_off(poch_dev);
+ out_dec_usage:
+	atomic_dec(&poch_dev->usage);
+	atomic_inc(&channel->free);
+ out:
+	return ret;
+}
+
+static int poch_release(struct inode *inode, struct file *filp)
+{
+	struct channel_info *channel = filp->private_data;
+	struct poch_dev *poch_dev;
+	int usage;
+
+	poch_dev = container_of(inode->i_cdev, struct poch_dev, cdev);
+
+	usage = atomic_dec_return(&poch_dev->usage);
+	if (usage == 0) {
+		printk(KERN_WARNING "poch_card_power_off\n");
+		poch_card_power_off(poch_dev);
+	}
+
+	atomic_dec(&channel->inited);
+	poch_channel_free_header(channel);
+	poch_channel_free_groups(channel);
+	kfree(channel->groups);
+	atomic_inc(&channel->free);
+
+	return 0;
+}
+
+/*
+ * Map the header and the group buffers, to user space.
+ */
+static int poch_mmap(struct file *filp, struct vm_area_struct *vma)
+{
+	struct channel_info *channel = filp->private_data;
+
+	unsigned long start;
+	unsigned long size;
+
+	unsigned long group_pages;
+	unsigned long header_pages;
+	unsigned long total_group_pages;
+
+	int pg_num;
+	struct page *pg;
+
+	int i;
+	int ret;
+
+	printk(KERN_WARNING "poch_mmap\n");
+
+	if (vma->vm_pgoff) {
+		printk(KERN_WARNING PFX "page offset: %lu\n", vma->vm_pgoff);
+		return -EINVAL;
+	}
+
+	group_pages = (channel->group_size / PAGE_SIZE) + 1;
+	header_pages = (channel->header_size / PAGE_SIZE) + 1;
+	total_group_pages = group_pages * channel->group_count;
+
+	size = vma->vm_end - vma->vm_start;
+	if (size != (header_pages + total_group_pages) * PAGE_SIZE) {
+		printk(KERN_WARNING PFX "required %lu bytes\n", size);
+		return -EINVAL;
+	}
+
+	start = vma->vm_start;
+
+	/* FIXME: Cleanup required on failure? */
+	pg = channel->header_pg;
+	for (pg_num = 0; pg_num < header_pages; pg_num++, pg++) {
+		printk(KERN_DEBUG PFX "page_count: %d\n", page_count(pg));
+		printk(KERN_DEBUG PFX "%d: header: 0x%lx\n", pg_num, start);
+		ret = vm_insert_page(vma, start, pg);
+		if (ret) {
+			printk(KERN_DEBUG "vm_insert 1 failed at %lx\n", start);
+			return ret;
+		}
+		start += PAGE_SIZE;
+	}
+
+	for (i = 0; i < channel->group_count; i++) {
+		pg = channel->groups[i].pg;
+		for (pg_num = 0; pg_num < group_pages; pg_num++, pg++) {
+			printk(KERN_DEBUG PFX "%d: group %d: 0x%lx\n",
+			       pg_num, i, start);
+			ret = vm_insert_page(vma, start, pg);
+			if (ret) {
+				printk(KERN_DEBUG PFX
+				       "vm_insert 2 failed at %d\n", pg_num);
+				return ret;
+			}
+			start += PAGE_SIZE;
+		}
+	}
+
+	return 0;
+}
+
+/*
+ * Check whether there is some group that the user space has not
+ * consumed yet. When the user space consumes a group, it sets it to
+ * -1. Cosuming could be reading data in case of RX and filling a
+ * buffer in case of TX.
+ */
+static int poch_channel_available(struct channel_info *channel)
+{
+	int i;
+
+	spin_lock_irq(&channel->group_offsets_lock);
+
+	for (i = 0; i < channel->group_count; i++) {
+		if (channel->dir == CHANNEL_DIR_RX
+		    && channel->header->group_offsets[i] == -1) {
+			spin_unlock_irq(&channel->group_offsets_lock);
+			return 1;
+		}
+
+		if (channel->dir == CHANNEL_DIR_TX
+		    && channel->header->group_offsets[i] != -1) {
+			spin_unlock_irq(&channel->group_offsets_lock);
+			return 1;
+		}
+	}
+
+	spin_unlock_irq(&channel->group_offsets_lock);
+
+	return 0;
+}
+
+static unsigned int poch_poll(struct file *filp, poll_table *pt)
+{
+	struct channel_info *channel = filp->private_data;
+	unsigned int ret = 0;
+
+	poll_wait(filp, &channel->wq, pt);
+
+	if (poch_channel_available(channel)) {
+		if (channel->dir == CHANNEL_DIR_RX)
+			ret = POLLIN | POLLRDNORM;
+		else
+			ret = POLLOUT | POLLWRNORM;
+	}
+
+	return ret;
+}
+
+static int poch_ioctl(struct inode *inode, struct file *filp,
+		      unsigned int cmd, unsigned long arg)
+{
+	struct channel_info *channel = filp->private_data;
+	void __iomem *fpga = channel->fpga_iomem;
+	void __iomem *bridge = channel->bridge_iomem;
+	void __user *argp = (void __user *)arg;
+	struct vm_area_struct *vms;
+	struct poch_counters counters;
+	int ret;
+
+	switch (cmd) {
+	case POCH_IOC_TRANSFER_START:
+		switch (channel->chno) {
+		case CHNO_TX_CHANNEL:
+			printk(KERN_INFO PFX "ioctl: Tx start\n");
+			iowrite32(0x1, fpga + FPGA_TX_TRIGGER_REG);
+			iowrite32(0x1, fpga + FPGA_TX_ENABLE_REG);
+
+			/* FIXME: Does it make sense to do a DMA GO
+			 * twice, once in Tx and once in Rx.
+			 */
+			iowrite32(0x1, bridge + BRIDGE_DMA_GO_REG);
+			break;
+		case CHNO_RX_CHANNEL:
+			printk(KERN_INFO PFX "ioctl: Rx start\n");
+			iowrite32(0x1, fpga + FPGA_RX_ARM_REG);
+			iowrite32(0x1, bridge + BRIDGE_DMA_GO_REG);
+			break;
+		}
+		break;
+	case POCH_IOC_TRANSFER_STOP:
+		switch (channel->chno) {
+		case CHNO_TX_CHANNEL:
+			printk(KERN_INFO PFX "ioctl: Tx stop\n");
+			iowrite32(0x0, fpga + FPGA_TX_ENABLE_REG);
+			iowrite32(0x0, fpga + FPGA_TX_TRIGGER_REG);
+			iowrite32(0x0, bridge + BRIDGE_DMA_GO_REG);
+			break;
+		case CHNO_RX_CHANNEL:
+			printk(KERN_INFO PFX "ioctl: Rx stop\n");
+			iowrite32(0x0, fpga + FPGA_RX_ARM_REG);
+			iowrite32(0x0, bridge + BRIDGE_DMA_GO_REG);
+			break;
+		}
+		break;
+	case POCH_IOC_GET_COUNTERS:
+		if (access_ok(VERIFY_WRITE, argp, sizeof(struct poch_counters)))
+			return -EFAULT;
+
+		spin_lock_irq(&channel->counters_lock);
+		counters = channel->counters;
+		__poch_channel_clear_counters(channel);
+		spin_unlock_irq(&channel->counters_lock);
+
+		ret = copy_to_user(argp, &counters,
+				   sizeof(struct poch_counters));
+		if (ret)
+			return ret;
+
+		break;
+	case POCH_IOC_SYNC_GROUP_FOR_USER:
+	case POCH_IOC_SYNC_GROUP_FOR_DEVICE:
+		vms = find_vma(current->mm, arg);
+		if (!vms)
+			/* Address not mapped. */
+			return -EINVAL;
+		if (vms->vm_file != filp)
+			/* Address mapped from different device/file. */
+			return -EINVAL;
+
+		flush_cache_range(vms, arg, arg + channel->group_size);
+		break;
+	}
+	return 0;
+}
+
+static struct file_operations poch_fops = {
+	.owner = THIS_MODULE,
+	.open = poch_open,
+	.release = poch_release,
+	.ioctl = poch_ioctl,
+	.poll = poch_poll,
+	.mmap = poch_mmap
+};
+
+static void poch_irq_dma(struct channel_info *channel)
+{
+	u32 prev_transfer;
+	u32 curr_transfer;
+	long groups_done;
+	unsigned long i, j;
+	struct poch_group_info *groups;
+	s32 *group_offsets;
+	u32 curr_group_reg;
+
+	if (!atomic_read(&channel->inited))
+		return;
+
+	prev_transfer = channel->transfer;
+
+	if (channel->chno == CHNO_RX_CHANNEL)
+		curr_group_reg = FPGA_RX_CURR_GROUP_REG;
+	else
+		curr_group_reg = FPGA_TX_CURR_GROUP_REG;
+
+	curr_transfer = ioread32(channel->fpga_iomem + curr_group_reg);
+
+	groups_done = curr_transfer - prev_transfer;
+	/* Check wrap over, and handle it. */
+	if (groups_done <= 0)
+		groups_done += channel->group_count;
+
+	group_offsets = channel->header->group_offsets;
+	groups = channel->groups;
+
+	spin_lock(&channel->group_offsets_lock);
+
+	for (i = 0; i < groups_done; i++) {
+		j = (prev_transfer + i) % channel->group_count;
+		if (channel->dir == CHANNEL_DIR_RX)
+			group_offsets[j] = -1;
+		else
+			group_offsets[j] = groups[j].user_offset;
+	}
+
+	spin_unlock(&channel->group_offsets_lock);
+
+	channel->transfer = curr_transfer;
+
+	wake_up_interruptible(&channel->wq);
+}
+
+static irqreturn_t poch_irq_handler(int irq, void *p)
+{
+	struct poch_dev *poch_dev = p;
+	void __iomem *bridge = poch_dev->bridge_iomem;
+	void __iomem *fpga = poch_dev->fpga_iomem;
+	struct channel_info *channel_rx = &poch_dev->channels[CHNO_RX_CHANNEL];
+	struct channel_info *channel_tx = &poch_dev->channels[CHNO_TX_CHANNEL];
+	u32 bridge_stat;
+	u32 fpga_stat;
+	u32 dma_stat;
+
+	bridge_stat = ioread32(bridge + BRIDGE_INT_STAT_REG);
+	fpga_stat = ioread32(fpga + FPGA_INT_STAT_REG);
+	dma_stat = ioread32(fpga + FPGA_DMA_INT_STAT_REG);
+
+	ioread32(fpga + FPGA_DMA_INT_STAT_REG);
+	ioread32(fpga + FPGA_INT_STAT_REG);
+	ioread32(bridge + BRIDGE_INT_STAT_REG);
+
+	if (bridge_stat & BRIDGE_INT_FPGA) {
+		if (fpga_stat & FPGA_INT_DMA_CORE) {
+			if (dma_stat & FPGA_DMA_INT_RX)
+				poch_irq_dma(channel_rx);
+			if (dma_stat & FPGA_DMA_INT_TX)
+				poch_irq_dma(channel_tx);
+		}
+		if (fpga_stat & FPGA_INT_PLL_UNLOCKED) {
+			channel_tx->counters.pll_unlock++;
+			channel_rx->counters.pll_unlock++;
+			if (printk_ratelimit())
+				printk(KERN_WARNING PFX "PLL unlocked\n");
+		}
+		if (fpga_stat & FPGA_INT_TX_FF_EMPTY)
+			channel_tx->counters.fifo_empty++;
+		if (fpga_stat & FPGA_INT_TX_FF_OVRFLW)
+			channel_tx->counters.fifo_overflow++;
+		if (fpga_stat & FPGA_INT_RX_FF_EMPTY)
+			channel_rx->counters.fifo_empty++;
+		if (fpga_stat & FPGA_INT_RX_FF_OVRFLW)
+			channel_rx->counters.fifo_overflow++;
+
+		/*
+		 * FIXME: These errors should be notified through the
+		 * poll interface as POLLERR.
+		 */
+
+		/* Re-enable interrupts. */
+		iowrite32(BRIDGE_INT_FPGA, bridge + BRIDGE_INT_MASK_REG);
+
+		return IRQ_HANDLED;
+	}
+
+	return IRQ_NONE;
+}
+
+static void poch_class_dev_unregister(struct poch_dev *poch_dev, int id)
+{
+	int i, j;
+	int nattrs;
+	struct channel_info *channel;
+	dev_t devno;
+
+	if (poch_dev->dev == NULL)
+		return;
+
+	for (i = 0; i < poch_dev->nchannels; i++) {
+		channel = &poch_dev->channels[i];
+		devno = poch_first_dev + (id * poch_dev->nchannels) + i;
+
+		if (!channel->dev)
+			continue;
+
+		nattrs = sizeof(poch_class_attrs)/sizeof(poch_class_attrs[0]);
+		for (j = 0; j < nattrs; j++)
+			device_remove_file(channel->dev, poch_class_attrs[j]);
+
+		device_unregister(channel->dev);
+	}
+
+	device_unregister(poch_dev->dev);
+}
+
+static int __devinit poch_class_dev_register(struct poch_dev *poch_dev,
+					     int id)
+{
+	struct device *dev = &poch_dev->pci_dev->dev;
+	int i, j;
+	int nattrs;
+	int ret;
+	struct channel_info *channel;
+	dev_t devno;
+
+	poch_dev->dev = device_create(poch_cls, &poch_dev->pci_dev->dev,
+				      MKDEV(0, 0), NULL, "poch%d", id);
+	if (IS_ERR(poch_dev->dev)) {
+		dev_err(dev, "error creating parent class device");
+		ret = PTR_ERR(poch_dev->dev);
+		poch_dev->dev = NULL;
+		return ret;
+	}
+
+	for (i = 0; i < poch_dev->nchannels; i++) {
+		channel = &poch_dev->channels[i];
+
+		devno = poch_first_dev + (id * poch_dev->nchannels) + i;
+		channel->dev = device_create(poch_cls, poch_dev->dev, devno,
+					     NULL, "ch%d", i);
+		if (IS_ERR(channel->dev)) {
+			dev_err(dev, "error creating channel class device");
+			ret = PTR_ERR(channel->dev);
+			channel->dev = NULL;
+			poch_class_dev_unregister(poch_dev, id);
+			return ret;
+		}
+
+		dev_set_drvdata(channel->dev, channel);
+		nattrs = sizeof(poch_class_attrs)/sizeof(poch_class_attrs[0]);
+		for (j = 0; j < nattrs; j++) {
+			ret = device_create_file(channel->dev,
+						 poch_class_attrs[j]);
+			if (ret) {
+				dev_err(dev, "error creating attribute file");
+				poch_class_dev_unregister(poch_dev, id);
+				return ret;
+			}
+		}
+	}
+
+	return 0;
+}
+
+static int __devinit poch_pci_probe(struct pci_dev *pdev,
+				    const struct pci_device_id *pci_id)
+{
+	struct device *dev = &pdev->dev;
+	struct poch_dev *poch_dev;
+	struct uio_info *uio;
+	int ret;
+	int id;
+	int i;
+
+	poch_dev = kzalloc(sizeof(struct poch_dev), GFP_KERNEL);
+	if (!poch_dev) {
+		dev_err(dev, "error allocating priv. data memory\n");
+		return -ENOMEM;
+	}
+
+	poch_dev->pci_dev = pdev;
+	uio = &poch_dev->uio;
+
+	pci_set_drvdata(pdev, poch_dev);
+
+	spin_lock_init(&poch_dev->iomem_lock);
+
+	poch_dev->nchannels = POCH_NCHANNELS;
+	poch_dev->channels[CHNO_RX_CHANNEL].dir = CHANNEL_DIR_RX;
+	poch_dev->channels[CHNO_TX_CHANNEL].dir = CHANNEL_DIR_TX;
+
+	for (i = 0; i < poch_dev->nchannels; i++) {
+		init_waitqueue_head(&poch_dev->channels[i].wq);
+		atomic_set(&poch_dev->channels[i].free, 1);
+		atomic_set(&poch_dev->channels[i].inited, 0);
+	}
+
+	ret = pci_enable_device(pdev);
+	if (ret) {
+		dev_err(dev, "error enabling device\n");
+		goto out_free;
+	}
+
+	ret = pci_request_regions(pdev, "poch");
+	if (ret) {
+		dev_err(dev, "error requesting resources\n");
+		goto out_disable;
+	}
+
+	uio->mem[0].addr = pci_resource_start(pdev, 1);
+	if (!uio->mem[0].addr) {
+		dev_err(dev, "invalid BAR1\n");
+		ret = -ENODEV;
+		goto out_release;
+	}
+
+	uio->mem[0].size = pci_resource_len(pdev, 1);
+	uio->mem[0].memtype = UIO_MEM_PHYS;
+
+	uio->name = "poch";
+	uio->version = "0.0.1";
+	uio->irq = -1;
+	ret = uio_register_device(dev, uio);
+	if (ret) {
+		dev_err(dev, "error register UIO device: %d\n", ret);
+		goto out_release;
+	}
+
+	poch_dev->bridge_iomem = ioremap(pci_resource_start(pdev, 0),
+					 pci_resource_len(pdev, 0));
+	if (poch_dev->bridge_iomem == NULL) {
+		dev_err(dev, "error mapping bridge (bar0) registers\n");
+		ret = -ENOMEM;
+		goto out_uio_unreg;
+	}
+
+	poch_dev->fpga_iomem = ioremap(pci_resource_start(pdev, 1),
+				       pci_resource_len(pdev, 1));
+	if (poch_dev->fpga_iomem == NULL) {
+		dev_err(dev, "error mapping fpga (bar1) registers\n");
+		ret = -ENOMEM;
+		goto out_bar0_unmap;
+	}
+
+	ret = request_irq(pdev->irq, poch_irq_handler, IRQF_SHARED,
+			  dev->bus_id, poch_dev);
+	if (ret) {
+		dev_err(dev, "error requesting IRQ %u\n", pdev->irq);
+		ret = -ENOMEM;
+		goto out_bar1_unmap;
+	}
+
+	if (!idr_pre_get(&poch_ids, GFP_KERNEL)) {
+		dev_err(dev, "error allocating memory ids\n");
+		ret = -ENOMEM;
+		goto out_free_irq;
+	}
+
+	idr_get_new(&poch_ids, poch_dev, &id);
+	if (id >= MAX_POCH_CARDS) {
+		dev_err(dev, "minors exhausted\n");
+		ret = -EBUSY;
+		goto out_free_irq;
+	}
+
+	cdev_init(&poch_dev->cdev, &poch_fops);
+	poch_dev->cdev.owner = THIS_MODULE;
+	ret = cdev_add(&poch_dev->cdev,
+		       poch_first_dev + (id * poch_dev->nchannels),
+		       poch_dev->nchannels);
+	if (ret) {
+		dev_err(dev, "error register character device\n");
+		goto out_idr_remove;
+	}
+
+	ret = poch_class_dev_register(poch_dev, id);
+	if (ret)
+		goto out_cdev_del;
+
+	return 0;
+
+ out_cdev_del:
+	cdev_del(&poch_dev->cdev);
+ out_idr_remove:
+	idr_remove(&poch_ids, id);
+ out_free_irq:
+	free_irq(pdev->irq, poch_dev);
+ out_bar1_unmap:
+	iounmap(poch_dev->fpga_iomem);
+ out_bar0_unmap:
+	iounmap(poch_dev->bridge_iomem);
+ out_uio_unreg:
+	uio_unregister_device(uio);
+ out_release:
+	pci_release_regions(pdev);
+ out_disable:
+	pci_disable_device(pdev);
+ out_free:
+	kfree(poch_dev);
+	return ret;
+}
+
+/*
+ * FIXME: We are yet to handle the hot unplug case.
+ */
+static void poch_pci_remove(struct pci_dev *pdev)
+{
+	struct poch_dev *poch_dev = pci_get_drvdata(pdev);
+	struct uio_info *uio = &poch_dev->uio;
+	unsigned int minor = MINOR(poch_dev->cdev.dev);
+	unsigned int id = minor / poch_dev->nchannels;
+
+	/* FIXME: unmap fpga_iomem and bridge_iomem */
+
+	poch_class_dev_unregister(poch_dev, id);
+	cdev_del(&poch_dev->cdev);
+	idr_remove(&poch_ids, id);
+	free_irq(pdev->irq, poch_dev);
+	uio_unregister_device(uio);
+	pci_release_regions(pdev);
+	pci_disable_device(pdev);
+	pci_set_drvdata(pdev, NULL);
+	iounmap(uio->mem[0].internal_addr);
+
+	kfree(poch_dev);
+}
+
+static const struct pci_device_id poch_pci_ids[] /* __devinitconst */ = {
+	{ PCI_DEVICE(PCI_VENDOR_ID_RRAPIDS,
+		     PCI_DEVICE_ID_RRAPIDS_POCKET_CHANGE) },
+	{ 0, }
+};
+
+static struct pci_driver poch_pci_driver = {
+	.name = DRV_NAME,
+	.id_table = poch_pci_ids,
+	.probe = poch_pci_probe,
+	.remove = poch_pci_remove,
+};
+
+static int __init poch_init_module(void)
+{
+	int ret = 0;
+
+	ret = alloc_chrdev_region(&poch_first_dev, 0,
+				  MAX_POCH_DEVICES, DRV_NAME);
+	if (ret) {
+		printk(KERN_ERR PFX "error allocating device no.");
+		return ret;
+	}
+
+	poch_cls = class_create(THIS_MODULE, "pocketchange");
+	if (IS_ERR(poch_cls)) {
+		ret = PTR_ERR(poch_cls);
+		goto out_unreg_chrdev;
+	}
+
+	ret = pci_register_driver(&poch_pci_driver);
+	if (ret) {
+		printk(KERN_ERR PFX "error register PCI device");
+		goto out_class_destroy;
+	}
+
+	return 0;
+
+ out_class_destroy:
+	class_destroy(poch_cls);
+
+ out_unreg_chrdev:
+	unregister_chrdev_region(poch_first_dev, MAX_POCH_DEVICES);
+
+	return ret;
+}
+
+static void __exit poch_exit_module(void)
+{
+	pci_unregister_driver(&poch_pci_driver);
+	class_destroy(poch_cls);
+	unregister_chrdev_region(poch_first_dev, MAX_POCH_DEVICES);
+}
+
+module_init(poch_init_module);
+module_exit(poch_exit_module);
+
+MODULE_LICENSE("GPL v2");

drivers/staging/poch/poch.h

@@ -0,0 +1,29 @@
+/*
+ * User-space DMA and UIO based Redrapids Pocket Change CardBus driver
+ *
+ * Copyright 2008 Vijay Kumar <vijaykumar@bravegnu.org>
+ *
+ * Part of userspace API. Should be moved to a header file in
+ * include/linux for final version.
+ *
+ */
+struct poch_cbuf_header {
+	__s32 group_size_bytes;
+	__s32 group_count;
+	__s32 group_offsets[0];
+};
+
+struct poch_counters {
+	__u32 fifo_empty;
+	__u32 fifo_overflow;
+	__u32 pll_unlock;
+};
+
+#define POCH_IOC_NUM			'9'
+
+#define POCH_IOC_TRANSFER_START		_IO(POCH_IOC_NUM, 0)
+#define POCH_IOC_TRANSFER_STOP		_IO(POCH_IOC_NUM, 1)
+#define POCH_IOC_GET_COUNTERS		_IOR(POCH_IOC_NUM, 2, \
+					     struct poch_counters)
+#define POCH_IOC_SYNC_GROUP_FOR_USER	_IO(POCH_IOC_NUM, 3)
+#define POCH_IOC_SYNC_GROUP_FOR_DEVICE	_IO(POCH_IOC_NUM, 4)

drivers/staging/slicoss/slicoss.c

@@ -54,7 +54,6 @@
  *       IS-NIC driver.
  */
 
-#include <linux/version.h>
 
 #define SLIC_DUMP_ENABLED               0
 #define KLUDGE_FOR_4GB_BOUNDARY         1
@@ -96,17 +95,9 @@
 #include <linux/moduleparam.h>
 
 #include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/pci.h>
 #include <linux/dma-mapping.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
 #include <linux/mii.h>
 #include <linux/if_vlan.h>
-#include <linux/skbuff.h>
-#include <linux/string.h>
 #include <asm/unaligned.h>
 
 #include <linux/ethtool.h>
@@ -275,7 +266,6 @@ static void slic_dbg_register_trace(struct adapter *adapter,
 			  card->reg_value[i], card->reg_valueh[i]);
 	}
 }
-}
 #endif
 
 static void slic_init_adapter(struct net_device *netdev,
@@ -606,6 +596,7 @@ static void __devexit slic_entry_remove(struct pci_dev *pcidev)
 	uint mmio_len = 0;
 	struct adapter *adapter = (struct adapter *) netdev_priv(dev);
 	struct sliccard *card;
+	struct mcast_address *mcaddr, *mlist;
 
 	ASSERT(adapter);
 	DBG_MSG("slicoss: %s ENTER dev[%p] adapter[%p]\n", __func__, dev,
@@ -625,6 +616,13 @@ static void __devexit slic_entry_remove(struct pci_dev *pcidev)
 	DBG_MSG("slicoss: %s iounmap dev->base_addr[%x]\n", __func__,
 		(uint) dev->base_addr);
 	iounmap((void __iomem *)dev->base_addr);
+	/* free multicast addresses */
+	mlist = adapter->mcastaddrs;
+	while (mlist) {
+		mcaddr = mlist;
+		mlist = mlist->next;
+		kfree(mcaddr);
+	}
 	ASSERT(adapter->card);
 	card = adapter->card;
 	ASSERT(card->adapters_allocated);

drivers/staging/sxg/README

@@ -7,6 +7,7 @@ TODO:
 	- remove wrappers
 	- checkpatch.pl cleanups
 	- new functionality that the card needs
+	- remove reliance on x86
 
 Please send patches to:
         Greg Kroah-Hartman <gregkh@suse.de>

drivers/staging/sxg/sxg_os.h

@@ -44,7 +44,6 @@
 #define FALSE	(0)
 #define TRUE	(1)
 
-
 typedef struct _LIST_ENTRY {
 	struct _LIST_ENTRY *nle_flink;
 	struct _LIST_ENTRY *nle_blink;
@@ -69,35 +68,32 @@ typedef struct _LIST_ENTRY {
 
 /* These two have to be inlined since they return things. */
 
-static __inline PLIST_ENTRY
-RemoveHeadList(list_entry *l)
+static __inline PLIST_ENTRY RemoveHeadList(list_entry * l)
 {
-        list_entry              *f;
-        list_entry              *e;
+	list_entry *f;
+	list_entry *e;
 
-        e = l->nle_flink;
-        f = e->nle_flink;
-        l->nle_flink = f;
-        f->nle_blink = l;
+	e = l->nle_flink;
+	f = e->nle_flink;
+	l->nle_flink = f;
+	f->nle_blink = l;
 
-        return (e);
+	return (e);
 }
 
-static __inline PLIST_ENTRY
-RemoveTailList(list_entry *l)
+static __inline PLIST_ENTRY RemoveTailList(list_entry * l)
 {
-        list_entry              *b;
-        list_entry              *e;
+	list_entry *b;
+	list_entry *e;
 
-        e = l->nle_blink;
-        b = e->nle_blink;
-        l->nle_blink = b;
-        b->nle_flink = l;
+	e = l->nle_blink;
+	b = e->nle_blink;
+	l->nle_blink = b;
+	b->nle_flink = l;
 
-        return (e);
+	return (e);
 }
 
-
 #define InsertTailList(l, e)                    \
         do {                                    \
                 list_entry              *b;     \
@@ -120,7 +116,6 @@ RemoveTailList(list_entry *l)
                 (l)->nle_flink = (e);           \
         } while (0)
 
-
 #define ATK_DEBUG  1
 
 #if ATK_DEBUG
@@ -133,7 +128,6 @@ RemoveTailList(list_entry *l)
 #define SLIC_TIMESTAMP(value)
 #endif
 
-
 /******************  SXG DEFINES  *****************************************/
 
 #ifdef  ATKDBG
@@ -150,5 +144,4 @@ RemoveTailList(list_entry *l)
 #define WRITE_REG64(a,reg,value,cpu)                sxg_reg64_write((a),(&reg),(value),(cpu))
 #define READ_REG(reg,value)   (value) = readl((void __iomem *)(&reg))
 
-#endif  /* _SLIC_OS_SPECIFIC_H_  */
-
+#endif /* _SLIC_OS_SPECIFIC_H_  */

drivers/staging/sxg/sxgdbg.h

@@ -58,7 +58,7 @@
     {                                                                             \
         if (!(a)) {                                                               \
             DBG_ERROR("ASSERT() Failure: file %s, function %s  line %d\n",\
-                __FILE__, __FUNCTION__, __LINE__);                                \
+                __FILE__, __func__, __LINE__);                                \
         }                                                                         \
     }
 #endif

drivers/staging/sxg/sxghif.h

@@ -14,119 +14,119 @@
  *******************************************************************************/
 typedef struct _SXG_UCODE_REGS {
 	// Address 0 - 0x3F = Command codes 0-15 for TCB 0.  Excode 0
-	u32		Icr;			// Code = 0 (extended), ExCode = 0 - Int control
-	u32		RsvdReg1;		// Code = 1 - TOE -NA
-	u32		RsvdReg2;		// Code = 2 - TOE -NA
-	u32		RsvdReg3;		// Code = 3 - TOE -NA
-	u32		RsvdReg4;		// Code = 4 - TOE -NA
-	u32		RsvdReg5;		// Code = 5 - TOE -NA
-	u32		CardUp;			// Code = 6 - Microcode initialized when 1
-	u32		RsvdReg7;		// Code = 7 - TOE -NA
-	u32		CodeNotUsed[8];		// Codes 8-15 not used.  ExCode = 0
+	u32 Icr;		// Code = 0 (extended), ExCode = 0 - Int control
+	u32 RsvdReg1;		// Code = 1 - TOE -NA
+	u32 RsvdReg2;		// Code = 2 - TOE -NA
+	u32 RsvdReg3;		// Code = 3 - TOE -NA
+	u32 RsvdReg4;		// Code = 4 - TOE -NA
+	u32 RsvdReg5;		// Code = 5 - TOE -NA
+	u32 CardUp;		// Code = 6 - Microcode initialized when 1
+	u32 RsvdReg7;		// Code = 7 - TOE -NA
+	u32 CodeNotUsed[8];	// Codes 8-15 not used.  ExCode = 0
 	// This brings us to ExCode 1 at address 0x40 = Interrupt status pointer
-	u32		Isp;			// Code = 0 (extended), ExCode = 1
-	u32		PadEx1[15];		// Codes 1-15 not used with extended codes
+	u32 Isp;		// Code = 0 (extended), ExCode = 1
+	u32 PadEx1[15];		// Codes 1-15 not used with extended codes
 	// ExCode 2 = Interrupt Status Register
-	u32		Isr;			// Code = 0 (extended), ExCode = 2
-	u32		PadEx2[15];
+	u32 Isr;		// Code = 0 (extended), ExCode = 2
+	u32 PadEx2[15];
 	// ExCode 3 = Event base register.  Location of event rings
-	u32		EventBase;		// Code = 0 (extended), ExCode = 3
-	u32		PadEx3[15];
+	u32 EventBase;		// Code = 0 (extended), ExCode = 3
+	u32 PadEx3[15];
 	// ExCode 4 = Event ring size
-	u32		EventSize;		// Code = 0 (extended), ExCode = 4
-	u32		PadEx4[15];
+	u32 EventSize;		// Code = 0 (extended), ExCode = 4
+	u32 PadEx4[15];
 	// ExCode 5 = TCB Buffers base address
-	u32		TcbBase;		// Code = 0 (extended), ExCode = 5
-	u32		PadEx5[15];
+	u32 TcbBase;		// Code = 0 (extended), ExCode = 5
+	u32 PadEx5[15];
 	// ExCode 6 = TCB Composite Buffers base address
-	u32		TcbCompBase;		// Code = 0 (extended), ExCode = 6
-	u32		PadEx6[15];
+	u32 TcbCompBase;	// Code = 0 (extended), ExCode = 6
+	u32 PadEx6[15];
 	// ExCode 7 = Transmit ring base address
-	u32		XmtBase;		// Code = 0 (extended), ExCode = 7
-	u32		PadEx7[15];
+	u32 XmtBase;		// Code = 0 (extended), ExCode = 7
+	u32 PadEx7[15];
 	// ExCode 8 = Transmit ring size
-	u32		XmtSize;		// Code = 0 (extended), ExCode = 8
-	u32		PadEx8[15];
+	u32 XmtSize;		// Code = 0 (extended), ExCode = 8
+	u32 PadEx8[15];
 	// ExCode 9 = Receive ring base address
-	u32		RcvBase;		// Code = 0 (extended), ExCode = 9
-	u32		PadEx9[15];
+	u32 RcvBase;		// Code = 0 (extended), ExCode = 9
+	u32 PadEx9[15];
 	// ExCode 10 = Receive ring size
-	u32		RcvSize;		// Code = 0 (extended), ExCode = 10
-	u32		PadEx10[15];
+	u32 RcvSize;		// Code = 0 (extended), ExCode = 10
+	u32 PadEx10[15];
 	// ExCode 11 = Read EEPROM Config
-	u32		Config;			// Code = 0 (extended), ExCode = 11
-	u32		PadEx11[15];
+	u32 Config;		// Code = 0 (extended), ExCode = 11
+	u32 PadEx11[15];
 	// ExCode 12 = Multicast bits 31:0
-	u32		McastLow;		// Code = 0 (extended), ExCode = 12
-	u32		PadEx12[15];
+	u32 McastLow;		// Code = 0 (extended), ExCode = 12
+	u32 PadEx12[15];
 	// ExCode 13 = Multicast bits 63:32
-	u32		McastHigh;		// Code = 0 (extended), ExCode = 13
-	u32		PadEx13[15];
+	u32 McastHigh;		// Code = 0 (extended), ExCode = 13
+	u32 PadEx13[15];
 	// ExCode 14 = Ping
-	u32		Ping;			// Code = 0 (extended), ExCode = 14
-	u32		PadEx14[15];
+	u32 Ping;		// Code = 0 (extended), ExCode = 14
+	u32 PadEx14[15];
 	// ExCode 15 = Link MTU
-	u32		LinkMtu;		// Code = 0 (extended), ExCode = 15
-	u32		PadEx15[15];
+	u32 LinkMtu;		// Code = 0 (extended), ExCode = 15
+	u32 PadEx15[15];
 	// ExCode 16 = Download synchronization
-	u32		LoadSync;		// Code = 0 (extended), ExCode = 16
-	u32		PadEx16[15];
+	u32 LoadSync;		// Code = 0 (extended), ExCode = 16
+	u32 PadEx16[15];
 	// ExCode 17 = Upper DRAM address bits on 32-bit systems
-	u32		Upper;			// Code = 0 (extended), ExCode = 17
-	u32		PadEx17[15];
+	u32 Upper;		// Code = 0 (extended), ExCode = 17
+	u32 PadEx17[15];
 	// ExCode 18 = Slowpath Send Index Address
-	u32		SPSendIndex;		// Code = 0 (extended), ExCode = 18
-	u32		PadEx18[15];
-	u32		RsvdXF;			// Code = 0 (extended), ExCode = 19
-	u32		PadEx19[15];
+	u32 SPSendIndex;	// Code = 0 (extended), ExCode = 18
+	u32 PadEx18[15];
+	u32 RsvdXF;		// Code = 0 (extended), ExCode = 19
+	u32 PadEx19[15];
 	// ExCode 20 = Aggregation
-	u32		Aggregation;		// Code = 0 (extended), ExCode = 20
-	u32		PadEx20[15];
+	u32 Aggregation;	// Code = 0 (extended), ExCode = 20
+	u32 PadEx20[15];
 	// ExCode 21 = Receive MDL push timer
-	u32		PushTicks;		// Code = 0 (extended), ExCode = 21
-	u32		PadEx21[15];
+	u32 PushTicks;		// Code = 0 (extended), ExCode = 21
+	u32 PadEx21[15];
 	// ExCode 22 = TOE NA
-	u32		AckFrequency;		// Code = 0 (extended), ExCode = 22
-	u32		PadEx22[15];
+	u32 AckFrequency;	// Code = 0 (extended), ExCode = 22
+	u32 PadEx22[15];
 	// ExCode 23 = TOE NA
-	u32		RsvdReg23;
-	u32		PadEx23[15];
+	u32 RsvdReg23;
+	u32 PadEx23[15];
 	// ExCode 24 = TOE NA
-	u32		RsvdReg24;
-	u32		PadEx24[15];
+	u32 RsvdReg24;
+	u32 PadEx24[15];
 	// ExCode 25 = TOE NA
-	u32		RsvdReg25;		// Code = 0 (extended), ExCode = 25
-	u32		PadEx25[15];
+	u32 RsvdReg25;		// Code = 0 (extended), ExCode = 25
+	u32 PadEx25[15];
 	// ExCode 26 = Receive checksum requirements
-	u32		ReceiveChecksum;	// Code = 0 (extended), ExCode = 26
-	u32		PadEx26[15];
+	u32 ReceiveChecksum;	// Code = 0 (extended), ExCode = 26
+	u32 PadEx26[15];
 	// ExCode 27 = RSS Requirements
-	u32		Rss;			// Code = 0 (extended), ExCode = 27
-	u32		PadEx27[15];
+	u32 Rss;		// Code = 0 (extended), ExCode = 27
+	u32 PadEx27[15];
 	// ExCode 28 = RSS Table
-	u32		RssTable;		// Code = 0 (extended), ExCode = 28
-	u32		PadEx28[15];
+	u32 RssTable;		// Code = 0 (extended), ExCode = 28
+	u32 PadEx28[15];
 	// ExCode 29 = Event ring release entries
-	u32		EventRelease;		// Code = 0 (extended), ExCode = 29
-	u32		PadEx29[15];
+	u32 EventRelease;	// Code = 0 (extended), ExCode = 29
+	u32 PadEx29[15];
 	// ExCode 30 = Number of receive bufferlist commands on ring 0
-	u32		RcvCmd;			// Code = 0 (extended), ExCode = 30
-	u32		PadEx30[15];
+	u32 RcvCmd;		// Code = 0 (extended), ExCode = 30
+	u32 PadEx30[15];
 	// ExCode 31 = slowpath transmit command - Data[31:0] = 1
-	u32		XmtCmd;			// Code = 0 (extended), ExCode = 31
-	u32		PadEx31[15];
+	u32 XmtCmd;		// Code = 0 (extended), ExCode = 31
+	u32 PadEx31[15];
 	// ExCode 32 = Dump command
-	u32		DumpCmd;		// Code = 0 (extended), ExCode = 32
-	u32		PadEx32[15];
+	u32 DumpCmd;		// Code = 0 (extended), ExCode = 32
+	u32 PadEx32[15];
 	// ExCode 33 = Debug command
-	u32		DebugCmd;		// Code = 0 (extended), ExCode = 33
-	u32		PadEx33[15];
+	u32 DebugCmd;		// Code = 0 (extended), ExCode = 33
+	u32 PadEx33[15];
 	// There are 128 possible extended commands - each of account for 16
 	// words (including the non-relevent base command codes 1-15).
 	// Pad for the remainder of these here to bring us to the next CPU
 	// base.  As extended codes are added, reduce the first array value in
 	// the following field
-	u32		PadToNextCpu[94][16];	// 94 = 128 - 34 (34 = Excodes 0 - 33)
+	u32 PadToNextCpu[94][16];	// 94 = 128 - 34 (34 = Excodes 0 - 33)
 } SXG_UCODE_REGS, *PSXG_UCODE_REGS;
 
 // Interrupt control register (0) values
@@ -141,7 +141,7 @@ typedef struct _SXG_UCODE_REGS {
 
 // The Microcode supports up to 16 RSS queues
 #define SXG_MAX_RSS				16
-#define SXG_MAX_RSS_TABLE_SIZE	256		// 256-byte max
+#define SXG_MAX_RSS_TABLE_SIZE	256	// 256-byte max
 
 #define SXG_RSS_TCP6				0x00000001	// RSS TCP over IPv6
 #define SXG_RSS_TCP4				0x00000002	// RSS TCP over IPv4
@@ -170,16 +170,16 @@ typedef struct _SXG_UCODE_REGS {
  * SXG_UCODE_REGS definition above
  */
 typedef struct _SXG_TCB_REGS {
-	u32		ExCode;		/* Extended codes - see SXG_UCODE_REGS */
-	u32		Xmt;		/* Code = 1 - # of Xmt descriptors added to ring */
-	u32		Rcv;		/* Code = 2 - # of Rcv descriptors added to ring */
-	u32		Rsvd1;		/* Code = 3 - TOE NA */
-	u32		Rsvd2;		/* Code = 4 - TOE NA */
-	u32		Rsvd3;		/* Code = 5 - TOE NA */
-	u32		Invalid;	/* Code = 6 - Reserved for "CardUp" see above */
-	u32		Rsvd4;		/* Code = 7 - TOE NA */
-	u32		Rsvd5;		/* Code = 8 - TOE NA */
-	u32		Pad[7];		/* Codes 8-15 - Not used. */
+	u32 ExCode;		/* Extended codes - see SXG_UCODE_REGS */
+	u32 Xmt;		/* Code = 1 - # of Xmt descriptors added to ring */
+	u32 Rcv;		/* Code = 2 - # of Rcv descriptors added to ring */
+	u32 Rsvd1;		/* Code = 3 - TOE NA */
+	u32 Rsvd2;		/* Code = 4 - TOE NA */
+	u32 Rsvd3;		/* Code = 5 - TOE NA */
+	u32 Invalid;		/* Code = 6 - Reserved for "CardUp" see above */
+	u32 Rsvd4;		/* Code = 7 - TOE NA */
+	u32 Rsvd5;		/* Code = 8 - TOE NA */
+	u32 Pad[7];		/* Codes 8-15 - Not used. */
 } SXG_TCB_REGS, *PSXG_TCB_REGS;
 
 /***************************************************************************
@@ -273,27 +273,27 @@ typedef struct _SXG_TCB_REGS {
  */
 #pragma pack(push, 1)
 typedef struct _SXG_EVENT {
-	u32			Pad[1];		// not used
-	u32			SndUna;		// SndUna value
-	u32			Resid;		// receive MDL resid
+	u32 Pad[1];		// not used
+	u32 SndUna;		// SndUna value
+	u32 Resid;		// receive MDL resid
 	union {
-		void *		HostHandle;	// Receive host handle
-		u32		Rsvd1;		// TOE NA
+		void *HostHandle;	// Receive host handle
+		u32 Rsvd1;	// TOE NA
 		struct {
-			u32	NotUsed;
-			u32	Rsvd2;		// TOE NA
+			u32 NotUsed;
+			u32 Rsvd2;	// TOE NA
 		} Flush;
 	};
-	u32			Toeplitz;	// RSS Toeplitz hash
+	u32 Toeplitz;		// RSS Toeplitz hash
 	union {
-		ushort		Rsvd3;		// TOE NA
-		ushort		HdrOffset;	// Slowpath
+		ushort Rsvd3;	// TOE NA
+		ushort HdrOffset;	// Slowpath
 	};
-	ushort			Length;		//
-	unsigned char 		Rsvd4;		// TOE NA
-	unsigned char 		Code;		// Event code
-	unsigned char		CommandIndex;	// New ring index
-	unsigned char		Status;		// Event status
+	ushort Length;		//
+	unsigned char Rsvd4;	// TOE NA
+	unsigned char Code;	// Event code
+	unsigned char CommandIndex;	// New ring index
+	unsigned char Status;	// Event status
 } SXG_EVENT, *PSXG_EVENT;
 #pragma pack(pop)
 
@@ -318,12 +318,12 @@ typedef struct _SXG_EVENT {
 // Event ring
 // Size must be power of 2, between 128 and 16k
 #define EVENT_RING_SIZE		4096	// ??
-#define EVENT_RING_BATCH	16		// Hand entries back 16 at a time.
-#define EVENT_BATCH_LIMIT	256	    // Stop processing events after 256 (16 * 16)
+#define EVENT_RING_BATCH	16	// Hand entries back 16 at a time.
+#define EVENT_BATCH_LIMIT	256	// Stop processing events after 256 (16 * 16)
 
 typedef struct _SXG_EVENT_RING {
-	SXG_EVENT	Ring[EVENT_RING_SIZE];
-}SXG_EVENT_RING, *PSXG_EVENT_RING;
+	SXG_EVENT Ring[EVENT_RING_SIZE];
+} SXG_EVENT_RING, *PSXG_EVENT_RING;
 
 /***************************************************************************
  *
@@ -341,7 +341,7 @@ typedef struct _SXG_EVENT_RING {
 #define SXG_TCB_PER_BUCKET		16
 #define SXG_TCB_BUCKET_MASK		0xFF0	// Bucket portion of TCB ID
 #define SXG_TCB_ELEMENT_MASK	0x00F	// Element within bucket
-#define SXG_TCB_BUCKETS			256		// 256 * 16 = 4k
+#define SXG_TCB_BUCKETS			256	// 256 * 16 = 4k
 
 #define SXG_TCB_BUFFER_SIZE	512	// ASSERT format is correct
 
@@ -368,7 +368,6 @@ typedef struct _SXG_EVENT_RING {
 	&(_TcpObject)->CompBuffer->Frame.HasVlan.TcpIp6.Ip				:		\
 	&(_TcpObject)->CompBuffer->Frame.NoVlan.TcpIp6.Ip
 
-
 #if DBG
 // Horrible kludge to distinguish dumb-nic, slowpath, and
 // fastpath traffic.  Decrement the HopLimit by one
@@ -396,16 +395,16 @@ typedef struct _SXG_EVENT_RING {
  * Receive and transmit rings
  ***************************************************************************/
 #define SXG_MAX_RING_SIZE	256
-#define SXG_XMT_RING_SIZE	128		// Start with 128
-#define SXG_RCV_RING_SIZE	128		// Start with 128
+#define SXG_XMT_RING_SIZE	128	// Start with 128
+#define SXG_RCV_RING_SIZE	128	// Start with 128
 #define SXG_MAX_ENTRIES     4096
 
 // Structure and macros to manage a ring
 typedef struct _SXG_RING_INFO {
-	unsigned char			Head;		// Where we add entries - Note unsigned char:RING_SIZE
-	unsigned char			Tail;		// Where we pull off completed entries
-	ushort			Size;		// Ring size - Must be multiple of 2
-	void *			Context[SXG_MAX_RING_SIZE];	// Shadow ring
+	unsigned char Head;	// Where we add entries - Note unsigned char:RING_SIZE
+	unsigned char Tail;	// Where we pull off completed entries
+	ushort Size;		// Ring size - Must be multiple of 2
+	void *Context[SXG_MAX_RING_SIZE];	// Shadow ring
 } SXG_RING_INFO, *PSXG_RING_INFO;
 
 #define SXG_INITIALIZE_RING(_ring, _size) {							\
@@ -483,40 +482,40 @@ typedef struct _SXG_RING_INFO {
  */
 #pragma pack(push, 1)
 typedef struct _SXG_CMD {
-	dma_addr_t             			Sgl;			// Physical address of SGL
+	dma_addr_t Sgl;		// Physical address of SGL
 	union {
 		struct {
-			dma64_addr_t          	FirstSgeAddress;// Address of first SGE
-			u32					FirstSgeLength;	// Length of first SGE
+			dma64_addr_t FirstSgeAddress;	// Address of first SGE
+			u32 FirstSgeLength;	// Length of first SGE
 			union {
-				u32				Rsvd1;	        // TOE NA
-				u32				SgeOffset;		// Slowpath - 2nd SGE offset
-				u32				Resid;			// MDL completion - clobbers update
+				u32 Rsvd1;	// TOE NA
+				u32 SgeOffset;	// Slowpath - 2nd SGE offset
+				u32 Resid;	// MDL completion - clobbers update
 			};
 			union {
-				u32				TotalLength;	// Total transfer length
-				u32				Mss;			// LSO MSS
+				u32 TotalLength;	// Total transfer length
+				u32 Mss;	// LSO MSS
 			};
 		} Buffer;
 	};
 	union {
 		struct {
-			unsigned char					Flags:4;		// slowpath flags
-			unsigned char					IpHl:4;			// Ip header length (>>2)
-			unsigned char					MacLen;			// Mac header len
+			unsigned char Flags:4;	// slowpath flags
+			unsigned char IpHl:4;	// Ip header length (>>2)
+			unsigned char MacLen;	// Mac header len
 		} CsumFlags;
 		struct {
-			ushort					Flags:4;		// slowpath flags
-			ushort					TcpHdrOff:7;	// TCP
-			ushort					MacLen:5;		// Mac header len
+			ushort Flags:4;	// slowpath flags
+			ushort TcpHdrOff:7;	// TCP
+			ushort MacLen:5;	// Mac header len
 		} LsoFlags;
-		ushort						Flags;			// flags
+		ushort Flags;	// flags
 	};
 	union {
-		ushort						SgEntries;		// SG entry count including first sge
+		ushort SgEntries;	// SG entry count including first sge
 		struct {
-			unsigned char					Status;		    // Copied from event status
-			unsigned char					NotUsed;
+			unsigned char Status;	// Copied from event status
+			unsigned char NotUsed;
 		} Status;
 	};
 } SXG_CMD, *PSXG_CMD;
@@ -524,8 +523,8 @@ typedef struct _SXG_CMD {
 
 #pragma pack(push, 1)
 typedef struct _VLAN_HDR {
-	ushort	VlanTci;
-	ushort	VlanTpid;
+	ushort VlanTci;
+	ushort VlanTpid;
 } VLAN_HDR, *PVLAN_HDR;
 #pragma pack(pop)
 
@@ -561,16 +560,16 @@ typedef struct _VLAN_HDR {
  *
  */
 // Slowpath CMD flags
-#define SXG_SLOWCMD_CSUM_IP			0x01		// Checksum IP
-#define SXG_SLOWCMD_CSUM_TCP		0x02		// Checksum TCP
-#define SXG_SLOWCMD_LSO				0x04		// Large segment send
+#define SXG_SLOWCMD_CSUM_IP			0x01	// Checksum IP
+#define SXG_SLOWCMD_CSUM_TCP		0x02	// Checksum TCP
+#define SXG_SLOWCMD_LSO				0x04	// Large segment send
 
 typedef struct _SXG_XMT_RING {
-	SXG_CMD		Descriptors[SXG_XMT_RING_SIZE];
+	SXG_CMD Descriptors[SXG_XMT_RING_SIZE];
 } SXG_XMT_RING, *PSXG_XMT_RING;
 
 typedef struct _SXG_RCV_RING {
-	SXG_CMD		Descriptors[SXG_RCV_RING_SIZE];
+	SXG_CMD Descriptors[SXG_RCV_RING_SIZE];
 } SXG_RCV_RING, *PSXG_RCV_RING;
 
 /***************************************************************************
@@ -578,8 +577,8 @@ typedef struct _SXG_RCV_RING {
  * shared memory allocation
  ***************************************************************************/
 typedef enum {
-	SXG_BUFFER_TYPE_RCV,		// Receive buffer
-	SXG_BUFFER_TYPE_SGL			// SGL buffer
+	SXG_BUFFER_TYPE_RCV,	// Receive buffer
+	SXG_BUFFER_TYPE_SGL	// SGL buffer
 } SXG_BUFFER_TYPE;
 
 // State for SXG buffers
@@ -668,60 +667,60 @@ typedef enum {
 #define SXG_RCV_DATA_BUFFERS			4096	// Amount to give to the card
 #define SXG_INITIAL_RCV_DATA_BUFFERS	8192	// Initial pool of buffers
 #define SXG_MIN_RCV_DATA_BUFFERS		2048	// Minimum amount and when to get more
-#define SXG_MAX_RCV_BLOCKS				128		// = 16384 receive buffers
+#define SXG_MAX_RCV_BLOCKS				128	// = 16384 receive buffers
 
 // Receive buffer header
 typedef struct _SXG_RCV_DATA_BUFFER_HDR {
-	dma_addr_t          			PhysicalAddress;	// Buffer physical address
+	dma_addr_t PhysicalAddress;	// Buffer physical address
 	// Note - DO NOT USE the VirtualAddress field to locate data.
 	// Use the sxg.h:SXG_RECEIVE_DATA_LOCATION macro instead.
-	void *VirtualAddress;		// Start of buffer
-	LIST_ENTRY						FreeList;			// Free queue of buffers
-	struct _SXG_RCV_DATA_BUFFER_HDR	*Next;				// Fastpath data buffer queue
-	u32							Size;				// Buffer size
-	u32							ByteOffset;			// See SXG_RESTORE_MDL_OFFSET
-	unsigned char							State;				// See SXG_BUFFER state above
-	unsigned char							Status;				// Event status (to log PUSH)
-	struct sk_buff                * skb;				// Double mapped (nbl and pkt)
+	void *VirtualAddress;	// Start of buffer
+	LIST_ENTRY FreeList;	// Free queue of buffers
+	struct _SXG_RCV_DATA_BUFFER_HDR *Next;	// Fastpath data buffer queue
+	u32 Size;		// Buffer size
+	u32 ByteOffset;		// See SXG_RESTORE_MDL_OFFSET
+	unsigned char State;	// See SXG_BUFFER state above
+	unsigned char Status;	// Event status (to log PUSH)
+	struct sk_buff *skb;	// Double mapped (nbl and pkt)
 } SXG_RCV_DATA_BUFFER_HDR, *PSXG_RCV_DATA_BUFFER_HDR;
 
 // SxgSlowReceive uses the PACKET (skb) contained
 // in the SXG_RCV_DATA_BUFFER_HDR when indicating dumb-nic data
 #define SxgDumbRcvPacket	        skb
 
-#define SXG_RCV_DATA_HDR_SIZE			256		// Space for SXG_RCV_DATA_BUFFER_HDR
+#define SXG_RCV_DATA_HDR_SIZE			256	// Space for SXG_RCV_DATA_BUFFER_HDR
 #define SXG_RCV_DATA_BUFFER_SIZE		2048	// Non jumbo = 2k including HDR
 #define SXG_RCV_JUMBO_BUFFER_SIZE		10240	// jumbo = 10k including HDR
 
 // Receive data descriptor
 typedef struct _SXG_RCV_DATA_DESCRIPTOR {
 	union {
-		struct sk_buff    *	VirtualAddress;			// Host handle
-		u64 			ForceTo8Bytes;			// Force x86 to 8-byte boundary
+		struct sk_buff *VirtualAddress;	// Host handle
+		u64 ForceTo8Bytes;	// Force x86 to 8-byte boundary
 	};
-	dma_addr_t             	PhysicalAddress;
+	dma_addr_t PhysicalAddress;
 } SXG_RCV_DATA_DESCRIPTOR, *PSXG_RCV_DATA_DESCRIPTOR;
 
 // Receive descriptor block
 #define SXG_RCV_DESCRIPTORS_PER_BLOCK		128
 #define SXG_RCV_DESCRIPTOR_BLOCK_SIZE		2048	// For sanity check
 typedef struct _SXG_RCV_DESCRIPTOR_BLOCK {
-	SXG_RCV_DATA_DESCRIPTOR		Descriptors[SXG_RCV_DESCRIPTORS_PER_BLOCK];
+	SXG_RCV_DATA_DESCRIPTOR Descriptors[SXG_RCV_DESCRIPTORS_PER_BLOCK];
 } SXG_RCV_DESCRIPTOR_BLOCK, *PSXG_RCV_DESCRIPTOR_BLOCK;
 
 // Receive descriptor block header
 typedef struct _SXG_RCV_DESCRIPTOR_BLOCK_HDR {
-	void *					VirtualAddress;			// Start of 2k buffer
-	dma_addr_t	            PhysicalAddress;		// ..and it's physical address
-	LIST_ENTRY				FreeList;				// Free queue of descriptor blocks
-	unsigned char					State;					// See SXG_BUFFER state above
+	void *VirtualAddress;	// Start of 2k buffer
+	dma_addr_t PhysicalAddress;	// ..and it's physical address
+	LIST_ENTRY FreeList;	// Free queue of descriptor blocks
+	unsigned char State;	// See SXG_BUFFER state above
 } SXG_RCV_DESCRIPTOR_BLOCK_HDR, *PSXG_RCV_DESCRIPTOR_BLOCK_HDR;
 
 // Receive block header
 typedef struct _SXG_RCV_BLOCK_HDR {
-	void *					VirtualAddress;			// Start of virtual memory
-	dma_addr_t	            PhysicalAddress;		// ..and it's physical address
-	LIST_ENTRY				AllList;				// Queue of all SXG_RCV_BLOCKS
+	void *VirtualAddress;	// Start of virtual memory
+	dma_addr_t PhysicalAddress;	// ..and it's physical address
+	LIST_ENTRY AllList;	// Queue of all SXG_RCV_BLOCKS
 } SXG_RCV_BLOCK_HDR, *PSXG_RCV_BLOCK_HDR;
 
 // Macros to determine data structure offsets into receive block
@@ -747,8 +746,8 @@ typedef struct _SXG_RCV_BLOCK_HDR {
 // Use the miniport reserved portion of the NBL to locate
 // our SXG_RCV_DATA_BUFFER_HDR structure.
 typedef struct _SXG_RCV_NBL_RESERVED {
-	PSXG_RCV_DATA_BUFFER_HDR	RcvDataBufferHdr;
-	void *						Available;
+	PSXG_RCV_DATA_BUFFER_HDR RcvDataBufferHdr;
+	void *Available;
 } SXG_RCV_NBL_RESERVED, *PSXG_RCV_NBL_RESERVED;
 
 #define SXG_RCV_NBL_BUFFER_HDR(_NBL) (((PSXG_RCV_NBL_RESERVED)NET_BUFFER_LIST_MINIPORT_RESERVED(_NBL))->RcvDataBufferHdr)
@@ -760,12 +759,11 @@ typedef struct _SXG_RCV_NBL_RESERVED {
 #define SXG_MIN_SGL_BUFFERS			2048	// Minimum amount and when to get more
 #define SXG_MAX_SGL_BUFFERS			16384	// Maximum to allocate (note ADAPT:ushort)
 
-
 // Self identifying structure type
 typedef enum _SXG_SGL_TYPE {
-	SXG_SGL_DUMB,				// Dumb NIC SGL
-	SXG_SGL_SLOW,				// Slowpath protocol header - see below
-	SXG_SGL_CHIMNEY				// Chimney offload SGL
+	SXG_SGL_DUMB,		// Dumb NIC SGL
+	SXG_SGL_SLOW,		// Slowpath protocol header - see below
+	SXG_SGL_CHIMNEY		// Chimney offload SGL
 } SXG_SGL_TYPE, PSXG_SGL_TYPE;
 
 // Note - the description below is Microsoft specific
@@ -774,14 +772,14 @@ typedef enum _SXG_SGL_TYPE {
 // for the SCATTER_GATHER_LIST portion of the SXG_SCATTER_GATHER data structure.
 // The following considerations apply when setting this value:
 // - First, the Sahara card is designed to read the Microsoft SGL structure
-// 	 straight out of host memory.  This means that the SGL must reside in
-//	 shared memory.  If the length here is smaller than the SGL for the
-//	 NET_BUFFER, then NDIS will allocate its own buffer.  The buffer
-//	 that NDIS allocates is not in shared memory, so when this happens,
-//	 the SGL will need to be copied to a set of SXG_SCATTER_GATHER buffers.
-//	 In other words.. we don't want this value to be too small.
+//       straight out of host memory.  This means that the SGL must reside in
+//       shared memory.  If the length here is smaller than the SGL for the
+//       NET_BUFFER, then NDIS will allocate its own buffer.  The buffer
+//       that NDIS allocates is not in shared memory, so when this happens,
+//       the SGL will need to be copied to a set of SXG_SCATTER_GATHER buffers.
+//       In other words.. we don't want this value to be too small.
 // - On the other hand.. we're allocating up to 16k of these things.  If
-//	 we make this too big, we start to consume a ton of memory..
+//       we make this too big, we start to consume a ton of memory..
 // At the moment, I'm going to limit the number of SG entries to 150.
 // If each entry maps roughly 4k, then this should cover roughly 600kB
 // NET_BUFFERs.  Furthermore, since each entry is 24 bytes, the total
@@ -801,24 +799,23 @@ typedef enum _SXG_SGL_TYPE {
 // the SGL.  The following structure defines an x64
 // formatted SGL entry
 typedef struct _SXG_X64_SGE {
-    dma64_addr_t      	Address;	// same as wdm.h
-    u32				Length;		// same as wdm.h
-	u32				CompilerPad;// The compiler pads to 8-bytes
-    u64 			Reserved;	// u32 * in wdm.h.  Force to 8 bytes
+	dma64_addr_t Address;	// same as wdm.h
+	u32 Length;		// same as wdm.h
+	u32 CompilerPad;	// The compiler pads to 8-bytes
+	u64 Reserved;		// u32 * in wdm.h.  Force to 8 bytes
 } SXG_X64_SGE, *PSXG_X64_SGE;
 
 typedef struct _SCATTER_GATHER_ELEMENT {
-    dma64_addr_t      	Address;	// same as wdm.h
-    u32				Length;		// same as wdm.h
-	u32				CompilerPad;// The compiler pads to 8-bytes
-    u64 			Reserved;	// u32 * in wdm.h.  Force to 8 bytes
+	dma64_addr_t Address;	// same as wdm.h
+	u32 Length;		// same as wdm.h
+	u32 CompilerPad;	// The compiler pads to 8-bytes
+	u64 Reserved;		// u32 * in wdm.h.  Force to 8 bytes
 } SCATTER_GATHER_ELEMENT, *PSCATTER_GATHER_ELEMENT;
 
-
 typedef struct _SCATTER_GATHER_LIST {
-    u32					NumberOfElements;
-    u32 *				Reserved;
-    SCATTER_GATHER_ELEMENT	Elements[];
+	u32 NumberOfElements;
+	u32 *Reserved;
+	SCATTER_GATHER_ELEMENT Elements[];
 } SCATTER_GATHER_LIST, *PSCATTER_GATHER_LIST;
 
 // The card doesn't care about anything except elements, so
@@ -826,26 +823,26 @@ typedef struct _SCATTER_GATHER_LIST {
 // SGL structure.  But redefine from wdm.h:SCATTER_GATHER_LIST so
 // we can specify SXG_X64_SGE and define a fixed number of elements
 typedef struct _SXG_X64_SGL {
-    u32					NumberOfElements;
-    u32 *				Reserved;
-    SXG_X64_SGE				Elements[SXG_SGL_ENTRIES];
+	u32 NumberOfElements;
+	u32 *Reserved;
+	SXG_X64_SGE Elements[SXG_SGL_ENTRIES];
 } SXG_X64_SGL, *PSXG_X64_SGL;
 
 typedef struct _SXG_SCATTER_GATHER {
-	SXG_SGL_TYPE						Type;			// FIRST! Dumb-nic or offload
-	void *   							adapter;		// Back pointer to adapter
-	LIST_ENTRY							FreeList;		// Free SXG_SCATTER_GATHER blocks
-	LIST_ENTRY							AllList;		// All SXG_SCATTER_GATHER blocks
-	dma_addr_t				            PhysicalAddress;// physical address
-	unsigned char								State;			// See SXG_BUFFER state above
-	unsigned char								CmdIndex;		// Command ring index
-	struct sk_buff                    *	DumbPacket;		// Associated Packet
-	u32								Direction;		// For asynchronous completions
-	u32								CurOffset;		// Current SGL offset
-	u32								SglRef;			// SGL reference count
-	VLAN_HDR							VlanTag;		// VLAN tag to be inserted into SGL
-	PSCATTER_GATHER_LIST   				pSgl;			// SGL Addr. Possibly &Sgl
-	SXG_X64_SGL							Sgl;			// SGL handed to card
+	SXG_SGL_TYPE Type;	// FIRST! Dumb-nic or offload
+	void *adapter;		// Back pointer to adapter
+	LIST_ENTRY FreeList;	// Free SXG_SCATTER_GATHER blocks
+	LIST_ENTRY AllList;	// All SXG_SCATTER_GATHER blocks
+	dma_addr_t PhysicalAddress;	// physical address
+	unsigned char State;	// See SXG_BUFFER state above
+	unsigned char CmdIndex;	// Command ring index
+	struct sk_buff *DumbPacket;	// Associated Packet
+	u32 Direction;		// For asynchronous completions
+	u32 CurOffset;		// Current SGL offset
+	u32 SglRef;		// SGL reference count
+	VLAN_HDR VlanTag;	// VLAN tag to be inserted into SGL
+	PSCATTER_GATHER_LIST pSgl;	// SGL Addr. Possibly &Sgl
+	SXG_X64_SGL Sgl;	// SGL handed to card
 } SXG_SCATTER_GATHER, *PSXG_SCATTER_GATHER;
 
 #if defined(CONFIG_X86_64)
@@ -856,6 +853,5 @@ typedef struct _SXG_SCATTER_GATHER {
 #define SXG_SGL_BUFFER(_SxgSgl)		NULL
 #define SXG_SGL_BUF_SIZE			0
 #else
-    Stop Compilation;
+Stop Compilation;
 #endif
-

drivers/staging/sxg/sxghw.h

@@ -13,11 +13,11 @@
 /*******************************************************************************
  * Configuration space
  *******************************************************************************/
-//  PCI Vendor ID
-#define SXG_VENDOR_ID			0x139A	// Alacritech's Vendor ID
+/*  PCI Vendor ID */
+#define SXG_VENDOR_ID			0x139A	/* Alacritech's Vendor ID */
 
 //  PCI Device ID
-#define SXG_DEVICE_ID			0x0009	// Sahara Device ID
+#define SXG_DEVICE_ID			0x0009	/* Sahara Device ID */
 
 //
 // Subsystem IDs.
@@ -141,7 +141,7 @@ typedef struct _SXG_HW_REGS {
 #define SXG_REGISTER_SIZE_PER_CPU	0x00002000	// Used to sanity check UCODE_REGS structure
 
 // Sahara receive sequencer status values
-#define SXG_RCV_STATUS_ATTN					0x80000000	// Attention
+#define SXG_RCV_STATUS_ATTN			0x80000000	// Attention
 #define SXG_RCV_STATUS_TRANSPORT_MASK		0x3F000000	// Transport mask
 #define SXG_RCV_STATUS_TRANSPORT_ERROR		0x20000000	// Transport error
 #define SXG_RCV_STATUS_TRANSPORT_CSUM		0x23000000	// Transport cksum error
@@ -156,9 +156,9 @@ typedef struct _SXG_HW_REGS {
 #define SXG_RCV_STATUS_TRANSPORT_FTP		0x03000000	// Transport FTP
 #define SXG_RCV_STATUS_TRANSPORT_HTTP		0x02000000	// Transport HTTP
 #define SXG_RCV_STATUS_TRANSPORT_SMB		0x01000000	// Transport SMB
-#define SXG_RCV_STATUS_NETWORK_MASK			0x00FF0000	// Network mask
+#define SXG_RCV_STATUS_NETWORK_MASK		0x00FF0000	// Network mask
 #define SXG_RCV_STATUS_NETWORK_ERROR		0x00800000	// Network error
-#define SXG_RCV_STATUS_NETWORK_CSUM			0x00830000	// Network cksum error
+#define SXG_RCV_STATUS_NETWORK_CSUM		0x00830000	// Network cksum error
 #define SXG_RCV_STATUS_NETWORK_UFLOW		0x00820000	// Network underflow error
 #define SXG_RCV_STATUS_NETWORK_HDRLEN		0x00800000	// Network header length
 #define SXG_RCV_STATUS_NETWORK_OFLOW		0x00400000	// Network overflow detected
@@ -167,67 +167,67 @@ typedef struct _SXG_HW_REGS {
 #define SXG_RCV_STATUS_NETWORK_OFFSET		0x00080000	// Network offset detected
 #define SXG_RCV_STATUS_NETWORK_FRAGMENT		0x00040000	// Network fragment detected
 #define SXG_RCV_STATUS_NETWORK_TRANS_MASK	0x00030000	// Network transport type mask
-#define SXG_RCV_STATUS_NETWORK_UDP			0x00020000	// UDP
-#define SXG_RCV_STATUS_NETWORK_TCP			0x00010000	// TCP
-#define SXG_RCV_STATUS_IPONLY				0x00008000	// IP-only not TCP
-#define SXG_RCV_STATUS_PKT_PRI				0x00006000	// Receive priority
-#define SXG_RCV_STATUS_PKT_PRI_SHFT					13	// Receive priority shift
-#define SXG_RCV_STATUS_PARITY				0x00001000	// MAC Receive RAM parity error
-#define SXG_RCV_STATUS_ADDRESS_MASK			0x00000F00	// Link address detection mask
-#define SXG_RCV_STATUS_ADDRESS_D			0x00000B00	// Link address D
-#define SXG_RCV_STATUS_ADDRESS_C			0x00000A00	// Link address C
-#define SXG_RCV_STATUS_ADDRESS_B			0x00000900	// Link address B
-#define SXG_RCV_STATUS_ADDRESS_A			0x00000800	// Link address A
+#define SXG_RCV_STATUS_NETWORK_UDP		0x00020000	// UDP
+#define SXG_RCV_STATUS_NETWORK_TCP		0x00010000	// TCP
+#define SXG_RCV_STATUS_IPONLY			0x00008000	// IP-only not TCP
+#define SXG_RCV_STATUS_PKT_PRI			0x00006000	// Receive priority
+#define SXG_RCV_STATUS_PKT_PRI_SHFT			13	// Receive priority shift
+#define SXG_RCV_STATUS_PARITY			0x00001000	// MAC Receive RAM parity error
+#define SXG_RCV_STATUS_ADDRESS_MASK		0x00000F00	// Link address detection mask
+#define SXG_RCV_STATUS_ADDRESS_D		0x00000B00	// Link address D
+#define SXG_RCV_STATUS_ADDRESS_C		0x00000A00	// Link address C
+#define SXG_RCV_STATUS_ADDRESS_B		0x00000900	// Link address B
+#define SXG_RCV_STATUS_ADDRESS_A		0x00000800	// Link address A
 #define SXG_RCV_STATUS_ADDRESS_BCAST		0x00000300	// Link address broadcast
 #define SXG_RCV_STATUS_ADDRESS_MCAST		0x00000200	// Link address multicast
 #define SXG_RCV_STATUS_ADDRESS_CMCAST		0x00000100	// Link control multicast
-#define SXG_RCV_STATUS_LINK_MASK			0x000000FF	// Link status mask
-#define SXG_RCV_STATUS_LINK_ERROR			0x00000080	// Link error
-#define SXG_RCV_STATUS_LINK_MASK			0x000000FF	// Link status mask
-#define SXG_RCV_STATUS_LINK_PARITY			0x00000087	// RcvMacQ parity error
-#define SXG_RCV_STATUS_LINK_EARLY			0x00000086	// Data early
+#define SXG_RCV_STATUS_LINK_MASK		0x000000FF	// Link status mask
+#define SXG_RCV_STATUS_LINK_ERROR		0x00000080	// Link error
+#define SXG_RCV_STATUS_LINK_MASK		0x000000FF	// Link status mask
+#define SXG_RCV_STATUS_LINK_PARITY		0x00000087	// RcvMacQ parity error
+#define SXG_RCV_STATUS_LINK_EARLY		0x00000086	// Data early
 #define SXG_RCV_STATUS_LINK_BUFOFLOW		0x00000085	// Buffer overflow
-#define SXG_RCV_STATUS_LINK_CODE			0x00000084	// Link code error
-#define SXG_RCV_STATUS_LINK_DRIBBLE			0x00000083	// Dribble nibble
-#define SXG_RCV_STATUS_LINK_CRC				0x00000082	// CRC error
-#define SXG_RCV_STATUS_LINK_OFLOW			0x00000081	// Link overflow
-#define SXG_RCV_STATUS_LINK_UFLOW			0x00000080	// Link underflow
-#define SXG_RCV_STATUS_LINK_8023			0x00000020	// 802.3
-#define SXG_RCV_STATUS_LINK_SNAP			0x00000010	// Snap
-#define SXG_RCV_STATUS_LINK_VLAN			0x00000008	// VLAN
+#define SXG_RCV_STATUS_LINK_CODE		0x00000084	// Link code error
+#define SXG_RCV_STATUS_LINK_DRIBBLE		0x00000083	// Dribble nibble
+#define SXG_RCV_STATUS_LINK_CRC			0x00000082	// CRC error
+#define SXG_RCV_STATUS_LINK_OFLOW		0x00000081	// Link overflow
+#define SXG_RCV_STATUS_LINK_UFLOW		0x00000080	// Link underflow
+#define SXG_RCV_STATUS_LINK_8023		0x00000020	// 802.3
+#define SXG_RCV_STATUS_LINK_SNAP		0x00000010	// Snap
+#define SXG_RCV_STATUS_LINK_VLAN		0x00000008	// VLAN
 #define SXG_RCV_STATUS_LINK_TYPE_MASK		0x00000007	// Network type mask
-#define SXG_RCV_STATUS_LINK_CONTROL			0x00000003	// Control packet
-#define SXG_RCV_STATUS_LINK_IPV6			0x00000002	// IPv6 packet
-#define SXG_RCV_STATUS_LINK_IPV4			0x00000001	// IPv4 packet
+#define SXG_RCV_STATUS_LINK_CONTROL		0x00000003	// Control packet
+#define SXG_RCV_STATUS_LINK_IPV6		0x00000002	// IPv6 packet
+#define SXG_RCV_STATUS_LINK_IPV4		0x00000001	// IPv4 packet
 
 /***************************************************************************
  * Sahara receive and transmit configuration registers
  ***************************************************************************/
-#define	RCV_CONFIG_RESET			0x80000000	// RcvConfig register reset
-#define	RCV_CONFIG_ENABLE			0x40000000	// Enable the receive logic
-#define	RCV_CONFIG_ENPARSE			0x20000000	// Enable the receive parser
-#define	RCV_CONFIG_SOCKET			0x10000000	// Enable the socket detector
-#define	RCV_CONFIG_RCVBAD			0x08000000	// Receive all bad frames
-#define	RCV_CONFIG_CONTROL			0x04000000	// Receive all control frames
-#define	RCV_CONFIG_RCVPAUSE			0x02000000	// Enable pause transmit when attn
-#define	RCV_CONFIG_TZIPV6			0x01000000	// Include TCP port w/ IPv6 toeplitz
-#define	RCV_CONFIG_TZIPV4			0x00800000	// Include TCP port w/ IPv4 toeplitz
-#define	RCV_CONFIG_FLUSH			0x00400000	// Flush buffers
+#define	RCV_CONFIG_RESET		0x80000000	// RcvConfig register reset
+#define	RCV_CONFIG_ENABLE		0x40000000	// Enable the receive logic
+#define	RCV_CONFIG_ENPARSE		0x20000000	// Enable the receive parser
+#define	RCV_CONFIG_SOCKET		0x10000000	// Enable the socket detector
+#define	RCV_CONFIG_RCVBAD		0x08000000	// Receive all bad frames
+#define	RCV_CONFIG_CONTROL		0x04000000	// Receive all control frames
+#define	RCV_CONFIG_RCVPAUSE		0x02000000	// Enable pause transmit when attn
+#define	RCV_CONFIG_TZIPV6		0x01000000	// Include TCP port w/ IPv6 toeplitz
+#define	RCV_CONFIG_TZIPV4		0x00800000	// Include TCP port w/ IPv4 toeplitz
+#define	RCV_CONFIG_FLUSH		0x00400000	// Flush buffers
 #define	RCV_CONFIG_PRIORITY_MASK	0x00300000	// Priority level
 #define	RCV_CONFIG_HASH_MASK		0x00030000	// Hash depth
-#define	RCV_CONFIG_HASH_8			0x00000000	// Hash depth 8
-#define	RCV_CONFIG_HASH_16			0x00010000	// Hash depth 16
-#define	RCV_CONFIG_HASH_4			0x00020000	// Hash depth 4
-#define	RCV_CONFIG_HASH_2			0x00030000	// Hash depth 2
+#define	RCV_CONFIG_HASH_8		0x00000000	// Hash depth 8
+#define	RCV_CONFIG_HASH_16		0x00010000	// Hash depth 16
+#define	RCV_CONFIG_HASH_4		0x00020000	// Hash depth 4
+#define	RCV_CONFIG_HASH_2		0x00030000	// Hash depth 2
 #define	RCV_CONFIG_BUFLEN_MASK		0x0000FFF0	// Buffer length bits 15:4. ie multiple of 16.
-#define RCV_CONFIG_SKT_DIS			0x00000008	// Disable socket detection on attn
+#define RCV_CONFIG_SKT_DIS		0x00000008	// Disable socket detection on attn
 // Macro to determine RCV_CONFIG_BUFLEN based on maximum frame size.
 // We add 18 bytes for Sahara receive status and padding, plus 4 bytes for CRC,
 // and round up to nearest 16 byte boundary
 #define RCV_CONFIG_BUFSIZE(_MaxFrame) ((((_MaxFrame) + 22) + 15) & RCV_CONFIG_BUFLEN_MASK)
 
-#define	XMT_CONFIG_RESET			0x80000000	// XmtConfig register reset
-#define	XMT_CONFIG_ENABLE			0x40000000	// Enable transmit logic
+#define	XMT_CONFIG_RESET		0x80000000	// XmtConfig register reset
+#define	XMT_CONFIG_ENABLE		0x40000000	// Enable transmit logic
 #define	XMT_CONFIG_MAC_PARITY		0x20000000	// Inhibit MAC RAM parity error
 #define	XMT_CONFIG_BUF_PARITY		0x10000000	// Inhibit D2F buffer parity error
 #define	XMT_CONFIG_MEM_PARITY		0x08000000	// Inhibit 1T SRAM parity error
@@ -249,9 +249,9 @@ typedef struct _SXG_HW_REGS {
 
 // A-XGMAC Configuration Register 1
 #define AXGMAC_CFG1_XMT_PAUSE		0x80000000		// Allow the sending of Pause frames
-#define AXGMAC_CFG1_XMT_EN			0x40000000		// Enable transmit
+#define AXGMAC_CFG1_XMT_EN		0x40000000		// Enable transmit
 #define AXGMAC_CFG1_RCV_PAUSE		0x20000000		// Allow the detection of Pause frames
-#define AXGMAC_CFG1_RCV_EN			0x10000000		// Enable receive
+#define AXGMAC_CFG1_RCV_EN		0x10000000		// Enable receive
 #define AXGMAC_CFG1_XMT_STATE		0x04000000		// Current transmit state - READ ONLY
 #define AXGMAC_CFG1_RCV_STATE		0x01000000		// Current receive state - READ ONLY
 #define AXGMAC_CFG1_XOFF_SHORT		0x00001000		// Only pause for 64 slot on XOFF
@@ -262,24 +262,24 @@ typedef struct _SXG_HW_REGS {
 #define AXGMAC_CFG1_RCV_FCS2		0x00000200		// Delay receive FCS 2 4-byte words
 #define AXGMAC_CFG1_RCV_FCS3		0x00000300		// Delay receive FCS 3 4-byte words
 #define AXGMAC_CFG1_PKT_OVERRIDE	0x00000080		// Per-packet override enable
-#define AXGMAC_CFG1_SWAP			0x00000040		// Byte swap enable
+#define AXGMAC_CFG1_SWAP		0x00000040		// Byte swap enable
 #define AXGMAC_CFG1_SHORT_ASSERT	0x00000020		// ASSERT srdrpfrm on short frame (<64)
 #define AXGMAC_CFG1_RCV_STRICT		0x00000010		// RCV only 802.3AE when CLEAR
 #define AXGMAC_CFG1_CHECK_LEN		0x00000008		// Verify frame length
-#define AXGMAC_CFG1_GEN_FCS			0x00000004		// Generate FCS
+#define AXGMAC_CFG1_GEN_FCS		0x00000004		// Generate FCS
 #define AXGMAC_CFG1_PAD_MASK		0x00000003		// Mask for pad bits
-#define AXGMAC_CFG1_PAD_64			0x00000001		// Pad frames to 64 bytes
+#define AXGMAC_CFG1_PAD_64		0x00000001		// Pad frames to 64 bytes
 #define AXGMAC_CFG1_PAD_VLAN		0x00000002		// Detect VLAN and pad to 68 bytes
-#define AXGMAC_CFG1_PAD_68			0x00000003		// Pad to 68 bytes
+#define AXGMAC_CFG1_PAD_68		0x00000003		// Pad to 68 bytes
 
 // A-XGMAC Configuration Register 2
 #define AXGMAC_CFG2_GEN_PAUSE		0x80000000		// Generate single pause frame (test)
 #define AXGMAC_CFG2_LF_MANUAL		0x08000000		// Manual link fault sequence
-#define AXGMAC_CFG2_LF_AUTO			0x04000000		// Auto link fault sequence
+#define AXGMAC_CFG2_LF_AUTO		0x04000000		// Auto link fault sequence
 #define AXGMAC_CFG2_LF_REMOTE		0x02000000		// Remote link fault (READ ONLY)
 #define AXGMAC_CFG2_LF_LOCAL		0x01000000		// Local link fault (READ ONLY)
 #define AXGMAC_CFG2_IPG_MASK		0x001F0000		// Inter packet gap
-#define AXGMAC_CFG2_IPG_SHIFT		16
+#define AXGMAC_CFG2_IPG_SHIFT			16
 #define AXGMAC_CFG2_PAUSE_XMT		0x00008000		// Pause transmit module
 #define AXGMAC_CFG2_IPG_EXTEN		0x00000020		// Enable IPG extension algorithm
 #define AXGMAC_CFG2_IPGEX_MASK		0x0000001F		// IPG extension
@@ -299,9 +299,9 @@ typedef struct _SXG_HW_REGS {
 #define AXGMAC_SARHIGH_OCTET_SIX	0x00FF0000		// Sixth octet
 
 // A-XGMAC Maximum frame length register
-#define AXGMAC_MAXFRAME_XMT			0x3FFF0000		// Maximum transmit frame length
+#define AXGMAC_MAXFRAME_XMT		0x3FFF0000		// Maximum transmit frame length
 #define AXGMAC_MAXFRAME_XMT_SHIFT	16
-#define AXGMAC_MAXFRAME_RCV			0x0000FFFF		// Maximum receive frame length
+#define AXGMAC_MAXFRAME_RCV		0x0000FFFF		// Maximum receive frame length
 // This register doesn't need to be written for standard MTU.
 // For jumbo, I'll just statically define the value here.  This
 // value sets the receive byte count to 9036 (0x234C) and the
@@ -324,34 +324,34 @@ typedef struct _SXG_HW_REGS {
 
 // A-XGMAC AMIIM Field Register
 #define AXGMAC_AMIIM_FIELD_ST		0xC0000000		// 2-bit ST field
-#define AXGMAC_AMIIM_FIELD_ST_SHIFT			30
+#define AXGMAC_AMIIM_FIELD_ST_SHIFT		30
 #define AXGMAC_AMIIM_FIELD_OP		0x30000000		// 2-bit OP field
-#define AXGMAC_AMIIM_FIELD_OP_SHIFT			28
-#define AXGMAC_AMIIM_FIELD_PORT_ADDR 0x0F800000		// Port address field (hstphyadx in spec)
+#define AXGMAC_AMIIM_FIELD_OP_SHIFT		28
+#define AXGMAC_AMIIM_FIELD_PORT_ADDR	0x0F800000		// Port address field (hstphyadx in spec)
 #define AXGMAC_AMIIM_FIELD_PORT_SHIFT		23
 #define AXGMAC_AMIIM_FIELD_DEV_ADDR	0x007C0000		// Device address field (hstregadx in spec)
 #define AXGMAC_AMIIM_FIELD_DEV_SHIFT		18
 #define AXGMAC_AMIIM_FIELD_TA		0x00030000		// 2-bit TA field
-#define AXGMAC_AMIIM_FIELD_TA_SHIFT			16
+#define AXGMAC_AMIIM_FIELD_TA_SHIFT		16
 #define AXGMAC_AMIIM_FIELD_DATA		0x0000FFFF		// Data field
 
 // Values for the AXGMAC_AMIIM_FIELD_OP field in the A-XGMAC AMIIM Field Register
-#define	MIIM_OP_ADDR						0		// MIIM Address set operation
-#define	MIIM_OP_WRITE						1		// MIIM Write register operation
-#define	MIIM_OP_READ						2		// MIIM Read register operation
+#define	MIIM_OP_ADDR				0		// MIIM Address set operation
+#define	MIIM_OP_WRITE				1		// MIIM Write register operation
+#define	MIIM_OP_READ				2		// MIIM Read register operation
 #define	MIIM_OP_ADDR_SHIFT	(MIIM_OP_ADDR << AXGMAC_AMIIM_FIELD_OP_SHIFT)
 
 // Values for the AXGMAC_AMIIM_FIELD_PORT_ADDR field in the A-XGMAC AMIIM Field Register
-#define	MIIM_PORT_NUM						1		// All Sahara MIIM modules use port 1
+#define	MIIM_PORT_NUM				1		// All Sahara MIIM modules use port 1
 
 // Values for the AXGMAC_AMIIM_FIELD_DEV_ADDR field in the A-XGMAC AMIIM Field Register
-#define	MIIM_DEV_PHY_PMA					1		// PHY PMA/PMD module MIIM device number
-#define	MIIM_DEV_PHY_PCS					3		// PHY PCS module MIIM device number
-#define	MIIM_DEV_PHY_XS						4		// PHY XS module MIIM device number
-#define	MIIM_DEV_XGXS						5		// XGXS MIIM device number
+#define	MIIM_DEV_PHY_PMA			1		// PHY PMA/PMD module MIIM device number
+#define	MIIM_DEV_PHY_PCS			3		// PHY PCS module MIIM device number
+#define	MIIM_DEV_PHY_XS				4		// PHY XS module MIIM device number
+#define	MIIM_DEV_XGXS				5		// XGXS MIIM device number
 
 // Values for the AXGMAC_AMIIM_FIELD_TA field in the A-XGMAC AMIIM Field Register
-#define	MIIM_TA_10GB						2		// set to 2 for 10 GB operation
+#define	MIIM_TA_10GB				2		// set to 2 for 10 GB operation
 
 // A-XGMAC AMIIM Configuration Register
 #define AXGMAC_AMIIM_CFG_NOPREAM	0x00000080		// Bypass preamble of mngmt frame
@@ -365,25 +365,25 @@ typedef struct _SXG_HW_REGS {
 #define AXGMAC_AMIIM_INDC_BUSY		0x00000001		// Set until cmd operation complete
 
 // Link Status and Control Register
-#define	LS_PHY_CLR_RESET			0x80000000		// Clear reset signal to PHY
+#define	LS_PHY_CLR_RESET		0x80000000		// Clear reset signal to PHY
 #define	LS_SERDES_POWER_DOWN		0x40000000		// Power down the Sahara Serdes
-#define	LS_XGXS_ENABLE				0x20000000		// Enable the XAUI XGXS logic
-#define	LS_XGXS_CTL					0x10000000		// Hold XAUI XGXS logic reset until Serdes is up
-#define	LS_SERDES_DOWN				0x08000000		// When 0, XAUI Serdes is up and initialization is complete
-#define	LS_TRACE_DOWN				0x04000000		// When 0, Trace Serdes is up and initialization is complete
-#define	LS_PHY_CLK_25MHZ			0x02000000		// Set PHY clock to 25 MHz (else 156.125 MHz)
-#define	LS_PHY_CLK_EN				0x01000000		// Enable clock to PHY
-#define	LS_XAUI_LINK_UP				0x00000010		// XAUI link is up
-#define	LS_XAUI_LINK_CHNG			0x00000008		// XAUI link status has changed
-#define	LS_LINK_ALARM				0x00000004		// Link alarm pin
-#define	LS_ATTN_CTRL_MASK			0x00000003		// Mask link attention control bits
-#define	LS_ATTN_ALARM				0x00000000		// 00 => Attn on link alarm
+#define	LS_XGXS_ENABLE			0x20000000		// Enable the XAUI XGXS logic
+#define	LS_XGXS_CTL			0x10000000		// Hold XAUI XGXS logic reset until Serdes is up
+#define	LS_SERDES_DOWN			0x08000000		// When 0, XAUI Serdes is up and initialization is complete
+#define	LS_TRACE_DOWN			0x04000000		// When 0, Trace Serdes is up and initialization is complete
+#define	LS_PHY_CLK_25MHZ		0x02000000		// Set PHY clock to 25 MHz (else 156.125 MHz)
+#define	LS_PHY_CLK_EN			0x01000000		// Enable clock to PHY
+#define	LS_XAUI_LINK_UP			0x00000010		// XAUI link is up
+#define	LS_XAUI_LINK_CHNG		0x00000008		// XAUI link status has changed
+#define	LS_LINK_ALARM			0x00000004		// Link alarm pin
+#define	LS_ATTN_CTRL_MASK		0x00000003		// Mask link attention control bits
+#define	LS_ATTN_ALARM			0x00000000		// 00 => Attn on link alarm
 #define	LS_ATTN_ALARM_OR_STAT_CHNG	0x00000001		// 01 => Attn on link alarm or status change
-#define	LS_ATTN_STAT_CHNG			0x00000002		// 10 => Attn on link status change
-#define	LS_ATTN_NONE				0x00000003		// 11 => no Attn
+#define	LS_ATTN_STAT_CHNG		0x00000002		// 10 => Attn on link status change
+#define	LS_ATTN_NONE			0x00000003		// 11 => no Attn
 
 // Link Address High Registers
-#define	LINK_ADDR_ENABLE			0x80000000		// Enable this link address
+#define	LINK_ADDR_ENABLE		0x80000000		// Enable this link address
 
 
 /***************************************************************************
@@ -396,7 +396,7 @@ typedef struct _SXG_HW_REGS {
 #define XGXS_ADDRESS_STATUS1		0x0001			// XS Status 1
 #define XGXS_ADDRESS_DEVID_LOW		0x0002			// XS Device ID (low)
 #define XGXS_ADDRESS_DEVID_HIGH		0x0003			// XS Device ID (high)
-#define XGXS_ADDRESS_SPEED			0x0004			// XS Speed ability
+#define XGXS_ADDRESS_SPEED		0x0004			// XS Speed ability
 #define XGXS_ADDRESS_DEV_LOW		0x0005			// XS Devices in package
 #define XGXS_ADDRESS_DEV_HIGH		0x0006			// XS Devices in package
 #define XGXS_ADDRESS_STATUS2		0x0008			// XS Status 2
@@ -410,27 +410,27 @@ typedef struct _SXG_HW_REGS {
 #define XGXS_ADDRESS_RESET_HI2		0x8003			// Vendor-Specific Reset Hi 2
 
 // XS Control 1 register bit definitions
-#define XGXS_CONTROL1_RESET			0x8000			// Reset - self clearing
+#define XGXS_CONTROL1_RESET		0x8000			// Reset - self clearing
 #define XGXS_CONTROL1_LOOPBACK		0x4000			// Enable loopback
 #define XGXS_CONTROL1_SPEED1		0x2000			// 0 = unspecified, 1 = 10Gb+
 #define XGXS_CONTROL1_LOWPOWER		0x0400			// 1 = Low power mode
 #define XGXS_CONTROL1_SPEED2		0x0040			// Same as SPEED1 (?)
-#define XGXS_CONTROL1_SPEED			0x003C			// Everything reserved except zero (?)
+#define XGXS_CONTROL1_SPEED		0x003C			// Everything reserved except zero (?)
 
 // XS Status 1 register bit definitions
-#define XGXS_STATUS1_FAULT			0x0080			// Fault detected
-#define XGXS_STATUS1_LINK			0x0004			// 1 = Link up
+#define XGXS_STATUS1_FAULT		0x0080			// Fault detected
+#define XGXS_STATUS1_LINK		0x0004			// 1 = Link up
 #define XGXS_STATUS1_LOWPOWER		0x0002			// 1 = Low power supported
 
 // XS Speed register bit definitions
-#define XGXS_SPEED_10G				0x0001			// 1 = 10G capable
+#define XGXS_SPEED_10G			0x0001			// 1 = 10G capable
 
 // XS Devices register bit definitions
-#define XGXS_DEVICES_DTE			0x0020			// DTE XS Present
-#define XGXS_DEVICES_PHY			0x0010			// PHY XS Present
-#define XGXS_DEVICES_PCS			0x0008			// PCS Present
-#define XGXS_DEVICES_WIS			0x0004			// WIS Present
-#define XGXS_DEVICES_PMD			0x0002			// PMD/PMA Present
+#define XGXS_DEVICES_DTE		0x0020			// DTE XS Present
+#define XGXS_DEVICES_PHY		0x0010			// PHY XS Present
+#define XGXS_DEVICES_PCS		0x0008			// PCS Present
+#define XGXS_DEVICES_WIS		0x0004			// WIS Present
+#define XGXS_DEVICES_PMD		0x0002			// PMD/PMA Present
 #define XGXS_DEVICES_CLAUSE22		0x0001			// Clause 22 registers present
 
 // XS Devices High register bit definitions
@@ -444,18 +444,18 @@ typedef struct _SXG_HW_REGS {
 #define XGXS_STATUS2_RCV_FAULT		0x0400			// Receive fault
 
 // XS Package ID High register bit definitions
-#define XGXS_PKGID_HIGH_ORG			0xFC00			// Organizationally Unique
-#define XGXS_PKGID_HIGH_MFG			0x03F0			// Manufacturer Model
-#define XGXS_PKGID_HIGH_REV			0x000F			// Revision Number
+#define XGXS_PKGID_HIGH_ORG		0xFC00			// Organizationally Unique
+#define XGXS_PKGID_HIGH_MFG		0x03F0			// Manufacturer Model
+#define XGXS_PKGID_HIGH_REV		0x000F			// Revision Number
 
 // XS Lane Status register bit definitions
-#define XGXS_LANE_PHY				0x1000			// PHY/DTE lane alignment status
-#define XGXS_LANE_PATTERN			0x0800			// Pattern testing ability
-#define XGXS_LANE_LOOPBACK			0x0400			// PHY loopback ability
-#define XGXS_LANE_SYNC3				0x0008			// Lane 3 sync
-#define XGXS_LANE_SYNC2				0x0004			// Lane 2 sync
-#define XGXS_LANE_SYNC1				0x0002			// Lane 1 sync
-#define XGXS_LANE_SYNC0				0x0001			// Lane 0 sync
+#define XGXS_LANE_PHY			0x1000			// PHY/DTE lane alignment status
+#define XGXS_LANE_PATTERN		0x0800			// Pattern testing ability
+#define XGXS_LANE_LOOPBACK		0x0400			// PHY loopback ability
+#define XGXS_LANE_SYNC3			0x0008			// Lane 3 sync
+#define XGXS_LANE_SYNC2			0x0004			// Lane 2 sync
+#define XGXS_LANE_SYNC1			0x0002			// Lane 1 sync
+#define XGXS_LANE_SYNC0			0x0001			// Lane 0 sync
 
 // XS Test Control register bit definitions
 #define XGXS_TEST_PATTERN_ENABLE	0x0004			// Test pattern enabled
@@ -473,10 +473,10 @@ typedef struct _SXG_HW_REGS {
 // LASI (Link Alarm Status Interrupt) Registers (located in MIIM_DEV_PHY_PMA device)
 #define LASI_RX_ALARM_CONTROL		0x9000			// LASI RX_ALARM Control
 #define LASI_TX_ALARM_CONTROL		0x9001			// LASI TX_ALARM Control
-#define LASI_CONTROL				0x9002			// LASI Control
+#define LASI_CONTROL			0x9002			// LASI Control
 #define LASI_RX_ALARM_STATUS		0x9003			// LASI RX_ALARM Status
 #define LASI_TX_ALARM_STATUS		0x9004			// LASI TX_ALARM Status
-#define LASI_STATUS					0x9005			// LASI Status
+#define LASI_STATUS			0x9005			// LASI Status
 
 // LASI_CONTROL bit definitions
 #define	LASI_CTL_RX_ALARM_ENABLE	0x0004			// Enable RX_ALARM interrupts
@@ -489,34 +489,34 @@ typedef struct _SXG_HW_REGS {
 #define	LASI_STATUS_LS_ALARM		0x0001			// Link Status
 
 // PHY registers - PMA/PMD (device 1)
-#define	PHY_PMA_CONTROL1			0x0000			// PMA/PMD Control 1
-#define	PHY_PMA_STATUS1				0x0001			// PMA/PMD Status 1
-#define	PHY_PMA_RCV_DET				0x000A			// PMA/PMD Receive Signal Detect
+#define	PHY_PMA_CONTROL1		0x0000			// PMA/PMD Control 1
+#define	PHY_PMA_STATUS1			0x0001			// PMA/PMD Status 1
+#define	PHY_PMA_RCV_DET			0x000A			// PMA/PMD Receive Signal Detect
 		// other PMA/PMD registers exist and can be defined as needed
 
 // PHY registers - PCS (device 3)
-#define	PHY_PCS_CONTROL1			0x0000			// PCS Control 1
-#define	PHY_PCS_STATUS1				0x0001			// PCS Status 1
-#define	PHY_PCS_10G_STATUS1			0x0020			// PCS 10GBASE-R Status 1
+#define	PHY_PCS_CONTROL1		0x0000			// PCS Control 1
+#define	PHY_PCS_STATUS1			0x0001			// PCS Status 1
+#define	PHY_PCS_10G_STATUS1		0x0020			// PCS 10GBASE-R Status 1
 		// other PCS registers exist and can be defined as needed
 
 // PHY registers - XS (device 4)
-#define	PHY_XS_CONTROL1				0x0000			// XS Control 1
-#define	PHY_XS_STATUS1				0x0001			// XS Status 1
-#define	PHY_XS_LANE_STATUS			0x0018			// XS Lane Status
+#define	PHY_XS_CONTROL1			0x0000			// XS Control 1
+#define	PHY_XS_STATUS1			0x0001			// XS Status 1
+#define	PHY_XS_LANE_STATUS		0x0018			// XS Lane Status
 		// other XS registers exist and can be defined as needed
 
 // PHY_PMA_CONTROL1 register bit definitions
-#define	PMA_CONTROL1_RESET			0x8000			// PMA/PMD reset
+#define	PMA_CONTROL1_RESET		0x8000			// PMA/PMD reset
 
 // PHY_PMA_RCV_DET register bit definitions
-#define	PMA_RCV_DETECT				0x0001			// PMA/PMD receive signal detect
+#define	PMA_RCV_DETECT			0x0001			// PMA/PMD receive signal detect
 
 // PHY_PCS_10G_STATUS1 register bit definitions
-#define	PCS_10B_BLOCK_LOCK			0x0001			// PCS 10GBASE-R locked to receive blocks
+#define	PCS_10B_BLOCK_LOCK		0x0001			// PCS 10GBASE-R locked to receive blocks
 
 // PHY_XS_LANE_STATUS register bit definitions
-#define	XS_LANE_ALIGN				0x1000			// XS transmit lanes aligned
+#define	XS_LANE_ALIGN			0x1000			// XS transmit lanes aligned
 
 // PHY Microcode download data structure
 typedef struct _PHY_UCODE {
@@ -558,8 +558,8 @@ typedef struct _XMT_DESC {
 		// command codes
 #define XMT_DESC_CMD_RAW_SEND		0		// raw send descriptor
 #define XMT_DESC_CMD_CSUM_INSERT	1		// checksum insert descriptor
-#define XMT_DESC_CMD_FORMAT			2		// format descriptor
-#define XMT_DESC_CMD_PRIME			3		// prime descriptor
+#define XMT_DESC_CMD_FORMAT		2		// format descriptor
+#define XMT_DESC_CMD_PRIME		3		// prime descriptor
 #define XMT_DESC_CMD_CODE_SHFT		6		// comand code shift (shift to bits [31:30] in word 0)
 		// shifted command codes
 #define XMT_RAW_SEND		(XMT_DESC_CMD_RAW_SEND    << XMT_DESC_CMD_CODE_SHFT)
@@ -569,22 +569,22 @@ typedef struct _XMT_DESC {
 
 // XMT_DESC Control Byte (XmtCtl) definitions
 // NOTE:  These bits do not work on Sahara (Rev A)!
-#define	XMT_CTL_PAUSE_FRAME			0x80	// current frame is a pause control frame (for statistics)
+#define	XMT_CTL_PAUSE_FRAME		0x80	// current frame is a pause control frame (for statistics)
 #define	XMT_CTL_CONTROL_FRAME		0x40	// current frame is a control frame (for statistics)
 #define	XMT_CTL_PER_PKT_QUAL		0x20	// per packet qualifier
 #define	XMT_CTL_PAD_MODE_NONE		0x00	// do not pad frame
-#define	XMT_CTL_PAD_MODE_64			0x08	// pad frame to 64 bytes
+#define	XMT_CTL_PAD_MODE_64		0x08	// pad frame to 64 bytes
 #define	XMT_CTL_PAD_MODE_VLAN_68	0x10	// pad frame to 64 bytes, and VLAN frames to 68 bytes
-#define	XMT_CTL_PAD_MODE_68			0x18	// pad frame to 68 bytes
-#define	XMT_CTL_GEN_FCS				0x04	// generate FCS (CRC) for this frame
-#define	XMT_CTL_DELAY_FCS_0			0x00	// do not delay FCS calcution
-#define	XMT_CTL_DELAY_FCS_1			0x01	// delay FCS calculation by 1 (4-byte) word
-#define	XMT_CTL_DELAY_FCS_2			0x02	// delay FCS calculation by 2 (4-byte) words
-#define	XMT_CTL_DELAY_FCS_3			0x03	// delay FCS calculation by 3 (4-byte) words
+#define	XMT_CTL_PAD_MODE_68		0x18	// pad frame to 68 bytes
+#define	XMT_CTL_GEN_FCS			0x04	// generate FCS (CRC) for this frame
+#define	XMT_CTL_DELAY_FCS_0		0x00	// do not delay FCS calcution
+#define	XMT_CTL_DELAY_FCS_1		0x01	// delay FCS calculation by 1 (4-byte) word
+#define	XMT_CTL_DELAY_FCS_2		0x02	// delay FCS calculation by 2 (4-byte) words
+#define	XMT_CTL_DELAY_FCS_3		0x03	// delay FCS calculation by 3 (4-byte) words
 
 // XMT_DESC XmtBufId definition
-#define XMT_BUF_ID_SHFT		8			// The Xmt buffer ID is formed by dividing
-										// the buffer (DRAM) address by 256 (or << 8)
+#define XMT_BUF_ID_SHFT		8	// The Xmt buffer ID is formed by dividing
+					// the buffer (DRAM) address by 256 (or << 8)
 
 /*****************************************************************************
  * Receiver Sequencer Definitions
@@ -594,8 +594,8 @@ typedef struct _XMT_DESC {
 #define	RCV_EVTQ_RBFID_MASK		0x0000FFFF	// bit mask for the Receive Buffer ID
 
 // Receive Buffer ID definition
-#define RCV_BUF_ID_SHFT		5			// The Rcv buffer ID is formed by dividing
-										// the buffer (DRAM) address by 32 (or << 5)
+#define RCV_BUF_ID_SHFT		5	// The Rcv buffer ID is formed by dividing
+					// the buffer (DRAM) address by 32 (or << 5)
 
 // Format of the 18 byte Receive Buffer returned by the
 // Receive Sequencer for received packets
@@ -623,48 +623,48 @@ typedef struct _RCV_BUF_HDR {
  * Queue definitions
  *****************************************************************************/
 
-// Ingress (read only) queue numbers
-#define PXY_BUF_Q		0		// Proxy Buffer Queue
-#define HST_EVT_Q		1		// Host Event Queue
-#define XMT_BUF_Q		2		// Transmit Buffer Queue
-#define SKT_EVL_Q		3		// RcvSqr Socket Event Low Priority Queue
-#define RCV_EVL_Q		4		// RcvSqr Rcv Event Low Priority Queue
-#define SKT_EVH_Q		5		// RcvSqr Socket Event High Priority Queue
-#define RCV_EVH_Q		6		// RcvSqr Rcv Event High Priority Queue
-#define DMA_RSP_Q		7		// Dma Response Queue - one per CPU context
-// Local (read/write) queue numbers
-#define LOCAL_A_Q		8		// Spare local Queue
-#define LOCAL_B_Q		9		// Spare local Queue
-#define LOCAL_C_Q		10		// Spare local Queue
-#define FSM_EVT_Q		11		// Finite-State-Machine Event Queue
-#define SBF_PAL_Q		12		// System Buffer Physical Address (low) Queue
-#define SBF_PAH_Q		13		// System Buffer Physical Address (high) Queue
-#define SBF_VAL_Q		14		// System Buffer Virtual Address (low) Queue
-#define SBF_VAH_Q		15		// System Buffer Virtual Address (high) Queue
-// Egress (write only) queue numbers
-#define H2G_CMD_Q		16		// Host to GlbRam DMA Command Queue
-#define H2D_CMD_Q		17		// Host to DRAM DMA Command Queue
-#define G2H_CMD_Q		18		// GlbRam to Host DMA Command Queue
-#define G2D_CMD_Q		19		// GlbRam to DRAM DMA Command Queue
-#define D2H_CMD_Q		20		// DRAM to Host DMA Command Queue
-#define D2G_CMD_Q		21		// DRAM to GlbRam DMA Command Queue
-#define D2D_CMD_Q		22		// DRAM to DRAM DMA Command Queue
-#define PXL_CMD_Q		23		// Low Priority Proxy Command Queue
-#define PXH_CMD_Q		24		// High Priority Proxy Command Queue
-#define RSQ_CMD_Q		25		// Receive Sequencer Command Queue
-#define RCV_BUF_Q		26		// Receive Buffer Queue
-
-// Bit definitions for the Proxy Command queues (PXL_CMD_Q and PXH_CMD_Q)
-#define PXY_COPY_EN		0x00200000		// enable copy of xmt descriptor to xmt command queue
-#define PXY_SIZE_16		0x00000000		// copy 16 bytes
-#define PXY_SIZE_32		0x00100000		// copy 32 bytes
+/* Ingress (read only) queue numbers */
+#define PXY_BUF_Q		0		/* Proxy Buffer Queue */
+#define HST_EVT_Q		1		/* Host Event Queue */
+#define XMT_BUF_Q		2		/* Transmit Buffer Queue */
+#define SKT_EVL_Q		3		/* RcvSqr Socket Event Low Priority Queue */
+#define RCV_EVL_Q		4		/* RcvSqr Rcv Event Low Priority Queue */
+#define SKT_EVH_Q		5		/* RcvSqr Socket Event High Priority Queue */
+#define RCV_EVH_Q		6		/* RcvSqr Rcv Event High Priority Queue */
+#define DMA_RSP_Q		7		/* Dma Response Queue - one per CPU context */
+/* Local (read/write) queue numbers */
+#define LOCAL_A_Q		8		/* Spare local Queue */
+#define LOCAL_B_Q		9		/* Spare local Queue */
+#define LOCAL_C_Q		10		/* Spare local Queue */
+#define FSM_EVT_Q		11		/* Finite-State-Machine Event Queue */
+#define SBF_PAL_Q		12		/* System Buffer Physical Address (low) Queue */
+#define SBF_PAH_Q		13		/* System Buffer Physical Address (high) Queue */
+#define SBF_VAL_Q		14		/* System Buffer Virtual Address (low) Queue */
+#define SBF_VAH_Q		15		/* System Buffer Virtual Address (high) Queue */
+/* Egress (write only) queue numbers */
+#define H2G_CMD_Q		16		/* Host to GlbRam DMA Command Queue */
+#define H2D_CMD_Q		17		/* Host to DRAM DMA Command Queue */
+#define G2H_CMD_Q		18		/* GlbRam to Host DMA Command Queue */
+#define G2D_CMD_Q		19		/* GlbRam to DRAM DMA Command Queue */
+#define D2H_CMD_Q		20		/* DRAM to Host DMA Command Queue */
+#define D2G_CMD_Q		21		/* DRAM to GlbRam DMA Command Queue */
+#define D2D_CMD_Q		22		/* DRAM to DRAM DMA Command Queue */
+#define PXL_CMD_Q		23		/* Low Priority Proxy Command Queue */
+#define PXH_CMD_Q		24		/* High Priority Proxy Command Queue */
+#define RSQ_CMD_Q		25		/* Receive Sequencer Command Queue */
+#define RCV_BUF_Q		26		/* Receive Buffer Queue */
+
+/* Bit definitions for the Proxy Command queues (PXL_CMD_Q and PXH_CMD_Q) */
+#define PXY_COPY_EN		0x00200000		/* enable copy of xmt descriptor to xmt command queue */
+#define PXY_SIZE_16		0x00000000		/* copy 16 bytes */
+#define PXY_SIZE_32		0x00100000		/* copy 32 bytes */
 
 /*****************************************************************************
  * SXG EEPROM/Flash Configuration Definitions
  *****************************************************************************/
 #pragma pack(push, 1)
 
-//
+/* */
 typedef struct _HW_CFG_DATA {
 	ushort		Addr;
 	union {
@@ -673,22 +673,22 @@ typedef struct _HW_CFG_DATA {
 	};
 } HW_CFG_DATA, *PHW_CFG_DATA;
 
-//
+/* */
 #define	NUM_HW_CFG_ENTRIES	((128/sizeof(HW_CFG_DATA)) - 4)
 
-// MAC address
+/* MAC address */
 typedef struct _SXG_CONFIG_MAC {
-	unsigned char		MacAddr[6];			// MAC Address
+	unsigned char		MacAddr[6];			/* MAC Address */
 } SXG_CONFIG_MAC, *PSXG_CONFIG_MAC;
 
-//
+/* */
 typedef struct _ATK_FRU {
 	unsigned char		PartNum[6];
 	unsigned char		Revision[2];
 	unsigned char		Serial[14];
 } ATK_FRU, *PATK_FRU;
 
-// OEM FRU Format types
+/* OEM FRU Format types */
 #define	ATK_FRU_FORMAT		0x0000
 #define CPQ_FRU_FORMAT		0x0001
 #define DELL_FRU_FORMAT		0x0002
@@ -697,24 +697,24 @@ typedef struct _ATK_FRU {
 #define EMC_FRU_FORMAT		0x0005
 #define NO_FRU_FORMAT		0xFFFF
 
-// EEPROM/Flash Format
+/* EEPROM/Flash Format */
 typedef struct _SXG_CONFIG {
-	//
-	// Section 1 (128 bytes)
-	//
-	ushort			MagicWord;			// EEPROM/FLASH Magic code 'A5A5'
-	ushort			SpiClks;			// SPI bus clock dividers
+	/* */
+	/* Section 1 (128 bytes) */
+	/* */
+	ushort			MagicWord;			/* EEPROM/FLASH Magic code 'A5A5' */
+	ushort			SpiClks;			/* SPI bus clock dividers */
 	HW_CFG_DATA		HwCfg[NUM_HW_CFG_ENTRIES];
-	//
-	//
-	//
-	ushort			Version;			// EEPROM format version
-	SXG_CONFIG_MAC	MacAddr[4];			// space for 4 MAC addresses
-	ATK_FRU			AtkFru;				// FRU information
-	ushort			OemFruFormat;		// OEM FRU format type
-	unsigned char			OemFru[76];			// OEM FRU information (optional)
-	ushort			Checksum;			// Checksum of section 2
-	// CS info XXXTODO
+	/* */
+	/* */
+	/* */
+	ushort			Version;			/* EEPROM format version */
+	SXG_CONFIG_MAC	MacAddr[4];			/* space for 4 MAC addresses */
+	ATK_FRU			AtkFru;				/* FRU information */
+	ushort			OemFruFormat;		/* OEM FRU format type */
+	unsigned char			OemFru[76];			/* OEM FRU information (optional) */
+	ushort			Checksum;			/* Checksum of section 2 */
+	/* CS info XXXTODO */
 } SXG_CONFIG, *PSXG_CONFIG;
 #pragma pack(pop)
 
@@ -723,12 +723,12 @@ typedef struct _SXG_CONFIG {
  *****************************************************************************/
 
 // Sahara (ASIC level) defines
-#define SAHARA_GRAM_SIZE			0x020000		// GRAM size - 128 KB
-#define SAHARA_DRAM_SIZE			0x200000		// DRAM size - 2 MB
-#define SAHARA_QRAM_SIZE			0x004000		// QRAM size - 16K entries (64 KB)
-#define SAHARA_WCS_SIZE				0x002000		// WCS - 8K instructions (x 108 bits)
+#define SAHARA_GRAM_SIZE		0x020000		// GRAM size - 128 KB
+#define SAHARA_DRAM_SIZE		0x200000		// DRAM size - 2 MB
+#define SAHARA_QRAM_SIZE		0x004000		// QRAM size - 16K entries (64 KB)
+#define SAHARA_WCS_SIZE			0x002000		// WCS - 8K instructions (x 108 bits)
 
 // Arabia (board level) defines
-#define	FLASH_SIZE				0x080000		// 512 KB (4 Mb)
-#define	EEPROM_SIZE_XFMR		512				// true EEPROM size (bytes), including xfmr area
-#define	EEPROM_SIZE_NO_XFMR		256				// EEPROM size excluding xfmr area
+#define	FLASH_SIZE			0x080000		// 512 KB (4 Mb)
+#define	EEPROM_SIZE_XFMR		512			// true EEPROM size (bytes), including xfmr area
+#define	EEPROM_SIZE_NO_XFMR		256			// EEPROM size excluding xfmr area

drivers/staging/sxg/sxgphycode.h

@@ -34,7 +34,7 @@ static PHY_UCODE PhyUcode[] = {
 	 */
 	/* Addr, Data */
 	{0xc017, 0xfeb0},	/* flip RX_LOS polarity (mandatory */
-				/*  patch for SFP+ applications) */
+	/*  patch for SFP+ applications) */
 	{0xC001, 0x0428},	/* flip RX serial polarity */
 
 	{0xc013, 0xf341},	/* invert lxmit clock (mandatory patch) */
@@ -43,7 +43,7 @@ static PHY_UCODE PhyUcode[] = {
 	{0xc210, 0x8000},	/* reset datapath (mandatory patch) */
 	{0xc210, 0x0000},	/* reset datapath (mandatory patch) */
 	{0x0000, 0x0032},	/* wait for 50ms for datapath reset to */
-				/* complete. (mandatory patch) */
+	/* complete. (mandatory patch) */
 
 	/* Configure the LED's */
 	{0xc214, 0x0099},	/* configure the LED drivers */
@@ -52,15 +52,15 @@ static PHY_UCODE PhyUcode[] = {
 
 	/* Transceiver-specific MDIO Patches: */
 	{0xc010, 0x448a},	/* (bit 14) mask out high BER input from the */
-				/* LOS signal in 1.000A */
-				/* (mandatory patch for SR code)*/
+	/* LOS signal in 1.000A */
+	/* (mandatory patch for SR code) */
 	{0xc003, 0x0181},	/* (bit 7) enable the CDR inc setting in */
-				/* 1.C005 (mandatory patch for SR code) */
+	/* 1.C005 (mandatory patch for SR code) */
 
 	/* Transceiver-specific Microcontroller Initialization: */
 	{0xc04a, 0x5200},	/* activate microcontroller and pause */
 	{0x0000, 0x0032},	/* wait 50ms for microcontroller before */
-				/* writing in code. */
+	/* writing in code. */
 
 	/* code block starts here: */
 	{0xcc00, 0x2009},

drivers/staging/usbip/usbip_common.c

@@ -221,7 +221,7 @@ static void usbip_dump_request_type(__u8 rt)
 static void usbip_dump_usb_ctrlrequest(struct usb_ctrlrequest *cmd)
 {
 	if (!cmd) {
-		printk("      %s : null pointer\n", __FUNCTION__);
+		printk("      %s : null pointer\n", __func__);
 		return;
 	}
 

drivers/staging/usbip/vhci_rx.c

@@ -202,7 +202,7 @@ static void vhci_rx_pdu(struct usbip_device *ud)
 	ret = usbip_xmit(0, ud->tcp_socket, (char *) &pdu, sizeof(pdu), 0);
 	if (ret != sizeof(pdu)) {
 		uerr("receiving pdu failed! size is %d, should be %d\n",
-				ret, sizeof(pdu));
+				ret, (unsigned int)sizeof(pdu));
 		usbip_event_add(ud, VDEV_EVENT_ERROR_TCP);
 		return;
 	}

drivers/staging/winbond/Kconfig

@@ -1,6 +1,6 @@
 config W35UND
 	tristate "Winbond driver"
-	depends on MAC80211 && WLAN_80211 && EXPERIMENTAL && !4KSTACKS
+	depends on MAC80211 && WLAN_80211 && USB && EXPERIMENTAL && !4KSTACKS
 	default n
 	---help---
 	  This is highly experimental driver for winbond wifi card on some Kohjinsha notebooks

drivers/staging/winbond/README

@@ -5,6 +5,7 @@ TODO:
 	- remove typedefs
 	- remove unused ioctls
 	- use cfg80211 for regulatory stuff
+	- fix 4k stack problems
 
 Please send patches to Greg Kroah-Hartman <greg@kroah.com> and
 Pavel Machek <pavel@suse.cz>

drivers/staging/winbond/bss_f.h

@@ -24,7 +24,7 @@ void DesiredRate2InfoElement(PWB32_ADAPTER Adapter, u8	*addr, u16 *iFildOffset,
 							 u8 *pBasicRateSet, u8 BasicRateCount,
 							 u8 *pOperationRateSet, u8 OperationRateCount);
 void BSSAddIBSSdata(PWB32_ADAPTER Adapter, PWB_BSSDESCRIPTION psDesData);
-unsigned char boCmpMacAddr( PUCHAR, PUCHAR );
+unsigned char boCmpMacAddr( u8 *, u8 *);
 unsigned char boCmpSSID(struct SSID_Element *psSSID1, struct SSID_Element *psSSID2);
 u16 wBSSfindSSID(PWB32_ADAPTER Adapter, struct SSID_Element *psSsid);
 u16 wRoamingQuery(PWB32_ADAPTER Adapter);
@@ -42,11 +42,11 @@ void RateReSortForSRate(PWB32_ADAPTER Adapter, u8 *RateArray, u8 num);
 void Assemble_IE(PWB32_ADAPTER Adapter, u16 wBssIdx);
 void SetMaxTxRate(PWB32_ADAPTER Adapter);
 
-void CreateWpaIE(PWB32_ADAPTER Adapter, u16* iFildOffset, PUCHAR msg, struct  Management_Frame* msgHeader,
+void CreateWpaIE(PWB32_ADAPTER Adapter, u16* iFildOffset, u8 *msg, struct  Management_Frame* msgHeader,
 				 struct Association_Request_Frame_Body* msgBody, u16 iMSindex); //added by WS 05/14/05
 
 #ifdef _WPA2_
-void CreateRsnIE(PWB32_ADAPTER Adapter, u16* iFildOffset, PUCHAR msg, struct  Management_Frame* msgHeader,
+void CreateRsnIE(PWB32_ADAPTER Adapter, u16* iFildOffset, u8 *msg, struct  Management_Frame* msgHeader,
 				 struct Association_Request_Frame_Body* msgBody, u16 iMSindex);//added by WS 05/14/05
 
 u16 SearchPmkid(PWB32_ADAPTER Adapter, struct  Management_Frame* msgHeader,

drivers/staging/winbond/ds_tkip.h

@@ -25,9 +25,9 @@ typedef struct tkip
 	s32		bytes_in_M;	// # bytes in M
 } tkip_t;
 
-//void _append_data( PUCHAR pData, u16 size, tkip_t *p );
-void Mds_MicGet(  void* Adapter,  void* pRxLayer1,  PUCHAR pKey,  PUCHAR pMic );
-void Mds_MicFill(  void* Adapter,  void* pDes,  PUCHAR XmitBufAddress );
+//void _append_data( u8 *pData, u16 size, tkip_t *p );
+void Mds_MicGet(  void* Adapter,  void* pRxLayer1,  u8 *pKey,  u8 *pMic );
+void Mds_MicFill(  void* Adapter,  void* pDes,  u8 *XmitBufAddress );
 
 
 

drivers/staging/winbond/linux/common.h

@@ -39,14 +39,6 @@
 // Common type definition
 //===============================================================
 
-typedef u8*            PUCHAR;
-typedef s8*            PCHAR;
-typedef u8*            PBOOLEAN;
-typedef u16*           PUSHORT;
-typedef u32*           PULONG;
-typedef s16*   PSHORT;
-
-
 //===========================================
 #define IGNORE      2
 #define	SUCCESS     1
@@ -110,16 +102,9 @@ typedef struct urb * PURB;
 #define OS_ATOMIC_READ( _A, _V )	_V
 #define OS_ATOMIC_INC( _A, _V )		EncapAtomicInc( _A, (void*)_V )
 #define OS_ATOMIC_DEC( _A, _V )		EncapAtomicDec( _A, (void*)_V )
-#define OS_MEMORY_CLEAR( _A, _S )	memset( (PUCHAR)_A,0,_S)
+#define OS_MEMORY_CLEAR( _A, _S )	memset( (u8 *)_A,0,_S)
 #define OS_MEMORY_COMPARE( _A, _B, _S )	(memcmp(_A,_B,_S)? 0 : 1) // Definition is reverse with Ndis 1: the same 0: different
 
-
-#define OS_SPIN_LOCK				spinlock_t
-#define OS_SPIN_LOCK_ALLOCATE( _S )		spin_lock_init( _S );
-#define OS_SPIN_LOCK_FREE( _S )
-#define OS_SPIN_LOCK_ACQUIRED( _S )		spin_lock_irq( _S )
-#define OS_SPIN_LOCK_RELEASED( _S )		spin_unlock_irq( _S );
-
 #define OS_TIMER	struct timer_list
 #define OS_TIMER_INITIAL( _T, _F, _P )			\
 {							\

drivers/staging/winbond/linux/wb35reg.c

@@ -10,7 +10,7 @@ extern void phy_calibration_winbond(hw_data_t *phw_data, u32 frequency);
 // Flag : AUTO_INCREMENT - RegisterNo will auto increment 4
 //		  NO_INCREMENT - Function will write data into the same register
 unsigned char
-Wb35Reg_BurstWrite(phw_data_t pHwData, u16 RegisterNo, PULONG pRegisterData, u8 NumberOfData, u8 Flag)
+Wb35Reg_BurstWrite(phw_data_t pHwData, u16 RegisterNo, u32 * pRegisterData, u8 NumberOfData, u8 Flag)
 {
 	PWB35REG pWb35Reg = &pHwData->Wb35Reg;
 	PURB		pUrb = NULL;
@@ -30,13 +30,13 @@ Wb35Reg_BurstWrite(phw_data_t pHwData, u16 RegisterNo, PULONG pRegisterData, u8
 	if( pUrb && pRegQueue ) {
 		pRegQueue->DIRECT = 2;// burst write register
 		pRegQueue->INDEX = RegisterNo;
-		pRegQueue->pBuffer = (PULONG)((PUCHAR)pRegQueue + sizeof(REG_QUEUE));
+		pRegQueue->pBuffer = (u32 *)((u8 *)pRegQueue + sizeof(REG_QUEUE));
 		memcpy( pRegQueue->pBuffer, pRegisterData, DataSize );
 		//the function for reversing register data from little endian to big endian
 		for( i=0; i<NumberOfData ; i++ )
 			pRegQueue->pBuffer[i] = cpu_to_le32( pRegQueue->pBuffer[i] );
 
-		dr = (struct usb_ctrlrequest *)((PUCHAR)pRegQueue + sizeof(REG_QUEUE) + DataSize);
+		dr = (struct usb_ctrlrequest *)((u8 *)pRegQueue + sizeof(REG_QUEUE) + DataSize);
 		dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
 		dr->bRequest = 0x04; // USB or vendor-defined request code, burst mode
 		dr->wValue = cpu_to_le16( Flag ); // 0: Register number auto-increment, 1: No auto increment
@@ -46,14 +46,14 @@ Wb35Reg_BurstWrite(phw_data_t pHwData, u16 RegisterNo, PULONG pRegisterData, u8
 		pRegQueue->pUsbReq = dr;
 		pRegQueue->pUrb = pUrb;
 
-		OS_SPIN_LOCK_ACQUIRED( &pWb35Reg->EP0VM_spin_lock );
+		spin_lock_irq( &pWb35Reg->EP0VM_spin_lock );
 		if (pWb35Reg->pRegFirst == NULL)
 			pWb35Reg->pRegFirst = pRegQueue;
 		else
 			pWb35Reg->pRegLast->Next = pRegQueue;
 		pWb35Reg->pRegLast = pRegQueue;
 
-		OS_SPIN_LOCK_RELEASED( &pWb35Reg->EP0VM_spin_lock );
+		spin_unlock_irq( &pWb35Reg->EP0VM_spin_lock );
 
 		// Start EP0VM
 		Wb35Reg_EP0VM_start(pHwData);
@@ -181,7 +181,7 @@ Wb35Reg_Write(  phw_data_t pHwData,  u16 RegisterNo,  u32 RegisterValue )
 		pRegQueue->INDEX = RegisterNo;
 		pRegQueue->VALUE = cpu_to_le32(RegisterValue);
 		pRegQueue->RESERVED_VALID = FALSE;
-		dr = (struct usb_ctrlrequest *)((PUCHAR)pRegQueue + sizeof(REG_QUEUE));
+		dr = (struct usb_ctrlrequest *)((u8 *)pRegQueue + sizeof(REG_QUEUE));
 		dr->bRequestType = USB_TYPE_VENDOR|USB_DIR_OUT |USB_RECIP_DEVICE;
 		dr->bRequest = 0x03; // USB or vendor-defined request code, burst mode
 		dr->wValue = cpu_to_le16(0x0);
@@ -193,14 +193,14 @@ Wb35Reg_Write(  phw_data_t pHwData,  u16 RegisterNo,  u32 RegisterValue )
 		pRegQueue->pUsbReq = dr;
 		pRegQueue->pUrb = pUrb;
 
-		OS_SPIN_LOCK_ACQUIRED(&pWb35Reg->EP0VM_spin_lock );
+		spin_lock_irq(&pWb35Reg->EP0VM_spin_lock );
 		if (pWb35Reg->pRegFirst == NULL)
 			pWb35Reg->pRegFirst = pRegQueue;
 		else
 			pWb35Reg->pRegLast->Next = pRegQueue;
 		pWb35Reg->pRegLast = pRegQueue;
 
-		OS_SPIN_LOCK_RELEASED( &pWb35Reg->EP0VM_spin_lock );
+		spin_unlock_irq( &pWb35Reg->EP0VM_spin_lock );
 
 		// Start EP0VM
 		Wb35Reg_EP0VM_start(pHwData);
@@ -220,7 +220,7 @@ Wb35Reg_Write(  phw_data_t pHwData,  u16 RegisterNo,  u32 RegisterValue )
 // FALSE : register not support
 unsigned char
 Wb35Reg_WriteWithCallbackValue( phw_data_t pHwData, u16 RegisterNo, u32 RegisterValue,
-				PCHAR pValue, s8 Len)
+				s8 *pValue, s8 Len)
 {
 	PWB35REG	pWb35Reg = &pHwData->Wb35Reg;
 	struct usb_ctrlrequest *dr;
@@ -243,7 +243,7 @@ Wb35Reg_WriteWithCallbackValue( phw_data_t pHwData, u16 RegisterNo, u32 Register
 		//NOTE : Users must guarantee the size of value will not exceed the buffer size.
 		memcpy(pRegQueue->RESERVED, pValue, Len);
 		pRegQueue->RESERVED_VALID = TRUE;
-		dr = (struct usb_ctrlrequest *)((PUCHAR)pRegQueue + sizeof(REG_QUEUE));
+		dr = (struct usb_ctrlrequest *)((u8 *)pRegQueue + sizeof(REG_QUEUE));
 		dr->bRequestType = USB_TYPE_VENDOR|USB_DIR_OUT |USB_RECIP_DEVICE;
 		dr->bRequest = 0x03; // USB or vendor-defined request code, burst mode
 		dr->wValue = cpu_to_le16(0x0);
@@ -254,14 +254,14 @@ Wb35Reg_WriteWithCallbackValue( phw_data_t pHwData, u16 RegisterNo, u32 Register
 		pRegQueue->Next = NULL;
 		pRegQueue->pUsbReq = dr;
 		pRegQueue->pUrb = pUrb;
-		OS_SPIN_LOCK_ACQUIRED (&pWb35Reg->EP0VM_spin_lock );
+		spin_lock_irq (&pWb35Reg->EP0VM_spin_lock );
 		if( pWb35Reg->pRegFirst == NULL )
 			pWb35Reg->pRegFirst = pRegQueue;
 		else
 			pWb35Reg->pRegLast->Next = pRegQueue;
 		pWb35Reg->pRegLast = pRegQueue;
 
-		OS_SPIN_LOCK_RELEASED ( &pWb35Reg->EP0VM_spin_lock );
+		spin_unlock_irq ( &pWb35Reg->EP0VM_spin_lock );
 
 		// Start EP0VM
 		Wb35Reg_EP0VM_start(pHwData);
@@ -278,10 +278,10 @@ Wb35Reg_WriteWithCallbackValue( phw_data_t pHwData, u16 RegisterNo, u32 Register
 // FALSE : register not support
 // pRegisterValue : It must be a resident buffer due to asynchronous read register.
 unsigned char
-Wb35Reg_ReadSync(  phw_data_t pHwData,  u16 RegisterNo,   PULONG pRegisterValue )
+Wb35Reg_ReadSync(  phw_data_t pHwData,  u16 RegisterNo,   u32 * pRegisterValue )
 {
 	PWB35REG pWb35Reg = &pHwData->Wb35Reg;
-	PULONG	pltmp = pRegisterValue;
+	u32 *	pltmp = pRegisterValue;
 	int ret = -1;
 
 	// Module shutdown
@@ -327,7 +327,7 @@ Wb35Reg_ReadSync(  phw_data_t pHwData,  u16 RegisterNo,   PULONG pRegisterValue
 // FALSE : register not support
 // pRegisterValue : It must be a resident buffer due to asynchronous read register.
 unsigned char
-Wb35Reg_Read(phw_data_t pHwData, u16 RegisterNo,  PULONG pRegisterValue )
+Wb35Reg_Read(phw_data_t pHwData, u16 RegisterNo,  u32 * pRegisterValue )
 {
 	PWB35REG	pWb35Reg = &pHwData->Wb35Reg;
 	struct usb_ctrlrequest * dr;
@@ -348,7 +348,7 @@ Wb35Reg_Read(phw_data_t pHwData, u16 RegisterNo,  PULONG pRegisterValue )
 		pRegQueue->DIRECT = 0;// read register
 		pRegQueue->INDEX = RegisterNo;
 		pRegQueue->pBuffer = pRegisterValue;
-		dr = (struct usb_ctrlrequest *)((PUCHAR)pRegQueue + sizeof(REG_QUEUE));
+		dr = (struct usb_ctrlrequest *)((u8 *)pRegQueue + sizeof(REG_QUEUE));
 		dr->bRequestType = USB_TYPE_VENDOR|USB_RECIP_DEVICE|USB_DIR_IN;
 		dr->bRequest = 0x01; // USB or vendor-defined request code, burst mode
 		dr->wValue = cpu_to_le16(0x0);
@@ -359,14 +359,14 @@ Wb35Reg_Read(phw_data_t pHwData, u16 RegisterNo,  PULONG pRegisterValue )
 		pRegQueue->Next = NULL;
 		pRegQueue->pUsbReq = dr;
 		pRegQueue->pUrb = pUrb;
-		OS_SPIN_LOCK_ACQUIRED ( &pWb35Reg->EP0VM_spin_lock );
+		spin_lock_irq ( &pWb35Reg->EP0VM_spin_lock );
 		if( pWb35Reg->pRegFirst == NULL )
 			pWb35Reg->pRegFirst = pRegQueue;
 		else
 			pWb35Reg->pRegLast->Next = pRegQueue;
 		pWb35Reg->pRegLast = pRegQueue;
 
-		OS_SPIN_LOCK_RELEASED( &pWb35Reg->EP0VM_spin_lock );
+		spin_unlock_irq( &pWb35Reg->EP0VM_spin_lock );
 
 		// Start EP0VM
 		Wb35Reg_EP0VM_start( pHwData );
@@ -399,7 +399,7 @@ Wb35Reg_EP0VM(phw_data_t pHwData )
 	PWB35REG	pWb35Reg = &pHwData->Wb35Reg;
 	PURB		pUrb;
 	struct usb_ctrlrequest *dr;
-	PULONG		pBuffer;
+	u32 *		pBuffer;
 	int			ret = -1;
 	PREG_QUEUE	pRegQueue;
 
@@ -411,9 +411,9 @@ Wb35Reg_EP0VM(phw_data_t pHwData )
 		goto cleanup;
 
 	// Get the register data and send to USB through Irp
-	OS_SPIN_LOCK_ACQUIRED( &pWb35Reg->EP0VM_spin_lock );
+	spin_lock_irq( &pWb35Reg->EP0VM_spin_lock );
 	pRegQueue = pWb35Reg->pRegFirst;
-	OS_SPIN_LOCK_RELEASED( &pWb35Reg->EP0VM_spin_lock );
+	spin_unlock_irq( &pWb35Reg->EP0VM_spin_lock );
 
 	if (!pRegQueue)
 		goto cleanup;
@@ -429,7 +429,7 @@ Wb35Reg_EP0VM(phw_data_t pHwData )
 
 	usb_fill_control_urb( pUrb, pHwData->WbUsb.udev,
 			      REG_DIRECTION(pHwData->WbUsb.udev,pRegQueue),
-			      (PUCHAR)dr,pBuffer,cpu_to_le16(dr->wLength),
+			      (u8 *)dr,pBuffer,cpu_to_le16(dr->wLength),
 			      Wb35Reg_EP0VM_complete, (void*)pHwData);
 
 	pWb35Reg->EP0vm_state = VM_RUNNING;
@@ -468,12 +468,12 @@ Wb35Reg_EP0VM_complete(PURB pUrb)
 		OS_ATOMIC_DEC( pHwData->Adapter, &pWb35Reg->RegFireCount );
 	} else {
 		// Complete to send, remove the URB from the first
-		OS_SPIN_LOCK_ACQUIRED( &pWb35Reg->EP0VM_spin_lock );
+		spin_lock_irq( &pWb35Reg->EP0VM_spin_lock );
 		pRegQueue = pWb35Reg->pRegFirst;
 		if (pRegQueue == pWb35Reg->pRegLast)
 			pWb35Reg->pRegLast = NULL;
 		pWb35Reg->pRegFirst = pWb35Reg->pRegFirst->Next;
-		OS_SPIN_LOCK_RELEASED( &pWb35Reg->EP0VM_spin_lock );
+		spin_unlock_irq( &pWb35Reg->EP0VM_spin_lock );
 
 		if (pWb35Reg->EP0VM_status) {
 #ifdef _PE_REG_DUMP_
@@ -513,7 +513,7 @@ Wb35Reg_destroy(phw_data_t pHwData)
 	OS_SLEEP(10000);  // Delay for waiting function enter 940623.1.b
 
 	// Release all the data in RegQueue
-	OS_SPIN_LOCK_ACQUIRED( &pWb35Reg->EP0VM_spin_lock );
+	spin_lock_irq( &pWb35Reg->EP0VM_spin_lock );
 	pRegQueue = pWb35Reg->pRegFirst;
 	while (pRegQueue) {
 		if (pRegQueue == pWb35Reg->pRegLast)
@@ -521,7 +521,7 @@ Wb35Reg_destroy(phw_data_t pHwData)
 		pWb35Reg->pRegFirst = pWb35Reg->pRegFirst->Next;
 
 		pUrb = pRegQueue->pUrb;
-		OS_SPIN_LOCK_RELEASED( &pWb35Reg->EP0VM_spin_lock );
+		spin_unlock_irq( &pWb35Reg->EP0VM_spin_lock );
 		if (pUrb) {
 			usb_free_urb(pUrb);
 			kfree(pRegQueue);
@@ -530,14 +530,11 @@ Wb35Reg_destroy(phw_data_t pHwData)
 			WBDEBUG(("EP0 queue release error\n"));
 			#endif
 		}
-		OS_SPIN_LOCK_ACQUIRED( &pWb35Reg->EP0VM_spin_lock );
+		spin_lock_irq( &pWb35Reg->EP0VM_spin_lock );
 
 		pRegQueue = pWb35Reg->pRegFirst;
 	}
-	OS_SPIN_LOCK_RELEASED( &pWb35Reg->EP0VM_spin_lock );
-
-	// Free resource
-	OS_SPIN_LOCK_FREE(  &pWb35Reg->EP0VM_spin_lock );
+	spin_unlock_irq( &pWb35Reg->EP0VM_spin_lock );
 }
 
 //====================================================================================
@@ -550,7 +547,7 @@ unsigned char Wb35Reg_initial(phw_data_t pHwData)
 	u32 SoftwareSet, VCO_trim, TxVga, Region_ScanInterval;
 
 	// Spin lock is acquired for read and write IRP command
-	OS_SPIN_LOCK_ALLOCATE( &pWb35Reg->EP0VM_spin_lock );
+	spin_lock_init( &pWb35Reg->EP0VM_spin_lock );
 
 	// Getting RF module type from EEPROM ------------------------------------
 	Wb35Reg_WriteSync( pHwData, 0x03b4, 0x080d0000 ); // Start EEPROM access + Read + address(0x0d)
@@ -655,7 +652,7 @@ unsigned char Wb35Reg_initial(phw_data_t pHwData)
 //    version in _GENREQ.ASM of the DWB NE1000/2000 driver.
 //==================================================================================
 u32
-CardComputeCrc(PUCHAR Buffer, u32 Length)
+CardComputeCrc(u8 * Buffer, u32 Length)
 {
     u32 Crc, Carry;
     u32  i, j;

drivers/staging/winbond/linux/wb35reg_f.h

@@ -29,16 +29,16 @@ void EEPROMTxVgaAdjust(  phw_data_t pHwData ); // 20060619.5 Add
 
 void Wb35Reg_destroy(  phw_data_t pHwData );
 
-unsigned char Wb35Reg_Read(  phw_data_t pHwData,  u16 RegisterNo,   PULONG pRegisterValue );
-unsigned char Wb35Reg_ReadSync(  phw_data_t pHwData,  u16 RegisterNo,   PULONG pRegisterValue );
+unsigned char Wb35Reg_Read(  phw_data_t pHwData,  u16 RegisterNo,   u32 * pRegisterValue );
+unsigned char Wb35Reg_ReadSync(  phw_data_t pHwData,  u16 RegisterNo,   u32 * pRegisterValue );
 unsigned char Wb35Reg_Write(  phw_data_t pHwData,  u16 RegisterNo,  u32 RegisterValue );
 unsigned char Wb35Reg_WriteSync(  phw_data_t pHwData,  u16 RegisterNo,  u32 RegisterValue );
 unsigned char Wb35Reg_WriteWithCallbackValue(  phw_data_t pHwData,
 								 u16 RegisterNo,
 								 u32 RegisterValue,
-								 PCHAR pValue,
-								 s8	Len);
-unsigned char Wb35Reg_BurstWrite(  phw_data_t pHwData,  u16 RegisterNo,  PULONG pRegisterData,  u8 NumberOfData,  u8 Flag );
+								 s8 *pValue,
+								 s8 Len);
+unsigned char Wb35Reg_BurstWrite(  phw_data_t pHwData,  u16 RegisterNo,  u32 * pRegisterData,  u8 NumberOfData,  u8 Flag );
 
 void Wb35Reg_EP0VM(  phw_data_t pHwData );
 void Wb35Reg_EP0VM_start(  phw_data_t pHwData );
@@ -47,7 +47,7 @@ void Wb35Reg_EP0VM_complete(  PURB pUrb );
 u32 BitReverse( u32 dwData, u32 DataLength);
 
 void CardGetMulticastBit(   u8 Address[MAC_ADDR_LENGTH],  u8 *Byte,  u8 *Value );
-u32 CardComputeCrc(  PUCHAR Buffer,  u32 Length );
+u32 CardComputeCrc(  u8 * Buffer,  u32 Length );
 
 void Wb35Reg_phy_calibration(  phw_data_t pHwData );
 void Wb35Reg_Update(  phw_data_t pHwData,  u16 RegisterNo,  u32 RegisterValue );

drivers/staging/winbond/linux/wb35reg_s.h

@@ -75,7 +75,7 @@ typedef struct _REG_QUEUE
 	union
 	{
 		u32	VALUE;
-		PULONG	pBuffer;
+		u32 *	pBuffer;
 	};
 	u8	RESERVED[4];// space reserved for communication
 
@@ -143,7 +143,7 @@ typedef struct _WB35REG
 	//-------------------
 	// VM
 	//-------------------
-	OS_SPIN_LOCK	EP0VM_spin_lock; // 4B
+	spinlock_t	EP0VM_spin_lock; // 4B
 	u32	        EP0VM_status;//$$
 	PREG_QUEUE	    pRegFirst;
 	PREG_QUEUE	    pRegLast;

drivers/staging/winbond/linux/wb35rx.c

@@ -27,7 +27,7 @@ void Wb35Rx_start(phw_data_t pHwData)
 void Wb35Rx(  phw_data_t pHwData )
 {
 	PWB35RX	pWb35Rx = &pHwData->Wb35Rx;
-	PUCHAR	pRxBufferAddress;
+	u8 *	pRxBufferAddress;
 	PURB	pUrb = (PURB)pWb35Rx->RxUrb;
 	int	retv;
 	u32	RxBufferId;
@@ -35,51 +35,50 @@ void Wb35Rx(  phw_data_t pHwData )
 	//
 	// Issuing URB
 	//
-	do {
-		if (pHwData->SurpriseRemove || pHwData->HwStop)
-			break;
+	if (pHwData->SurpriseRemove || pHwData->HwStop)
+		goto error;
 
-		if (pWb35Rx->rx_halt)
-			break;
+	if (pWb35Rx->rx_halt)
+		goto error;
 
-		// Get RxBuffer's ID
-		RxBufferId = pWb35Rx->RxBufferId;
-		if (!pWb35Rx->RxOwner[RxBufferId]) {
-			// It's impossible to run here.
-			#ifdef _PE_RX_DUMP_
-			WBDEBUG(("Rx driver fifo unavailable\n"));
-			#endif
-			break;
-		}
+	// Get RxBuffer's ID
+	RxBufferId = pWb35Rx->RxBufferId;
+	if (!pWb35Rx->RxOwner[RxBufferId]) {
+		// It's impossible to run here.
+		#ifdef _PE_RX_DUMP_
+		WBDEBUG(("Rx driver fifo unavailable\n"));
+		#endif
+		goto error;
+	}
 
-		// Update buffer point, then start to bulkin the data from USB
-		pWb35Rx->RxBufferId++;
-		pWb35Rx->RxBufferId %= MAX_USB_RX_BUFFER_NUMBER;
+	// Update buffer point, then start to bulkin the data from USB
+	pWb35Rx->RxBufferId++;
+	pWb35Rx->RxBufferId %= MAX_USB_RX_BUFFER_NUMBER;
 
-		pWb35Rx->CurrentRxBufferId = RxBufferId;
+	pWb35Rx->CurrentRxBufferId = RxBufferId;
 
-		if (1 != OS_MEMORY_ALLOC((void* *)&pWb35Rx->pDRx, MAX_USB_RX_BUFFER)) {
-			printk("w35und: Rx memory alloc failed\n");
-			break;
-		}
-		pRxBufferAddress = pWb35Rx->pDRx;
+	if (1 != OS_MEMORY_ALLOC((void* *)&pWb35Rx->pDRx, MAX_USB_RX_BUFFER)) {
+		printk("w35und: Rx memory alloc failed\n");
+		goto error;
+	}
+	pRxBufferAddress = pWb35Rx->pDRx;
 
-		usb_fill_bulk_urb(pUrb, pHwData->WbUsb.udev,
-				  usb_rcvbulkpipe(pHwData->WbUsb.udev, 3),
-				  pRxBufferAddress, MAX_USB_RX_BUFFER,
-				  Wb35Rx_Complete, pHwData);
+	usb_fill_bulk_urb(pUrb, pHwData->WbUsb.udev,
+			  usb_rcvbulkpipe(pHwData->WbUsb.udev, 3),
+			  pRxBufferAddress, MAX_USB_RX_BUFFER,
+			  Wb35Rx_Complete, pHwData);
 
-		pWb35Rx->EP3vm_state = VM_RUNNING;
+	pWb35Rx->EP3vm_state = VM_RUNNING;
 
-		retv = wb_usb_submit_urb(pUrb);
+	retv = wb_usb_submit_urb(pUrb);
 
-		if (retv != 0) {
-			printk("Rx URB sending error\n");
-			break;
-		}
-		return;
-	} while(FALSE);
+	if (retv != 0) {
+		printk("Rx URB sending error\n");
+		goto error;
+	}
+	return;
 
+error:
 	// VM stop
 	pWb35Rx->EP3vm_state = VM_STOP;
 	OS_ATOMIC_DEC( pHwData->Adapter, &pWb35Rx->RxFireCounter );
@@ -89,7 +88,7 @@ void Wb35Rx_Complete(PURB pUrb)
 {
 	phw_data_t	pHwData = pUrb->context;
 	PWB35RX		pWb35Rx = &pHwData->Wb35Rx;
-	PUCHAR		pRxBufferAddress;
+	u8 *		pRxBufferAddress;
 	u32		SizeCheck;
 	u16		BulkLength;
 	u32		RxBufferId;
@@ -99,65 +98,63 @@ void Wb35Rx_Complete(PURB pUrb)
 	pWb35Rx->EP3vm_state = VM_COMPLETED;
 	pWb35Rx->EP3VM_status = pUrb->status;//Store the last result of Irp
 
-	do {
-		RxBufferId = pWb35Rx->CurrentRxBufferId;
+	RxBufferId = pWb35Rx->CurrentRxBufferId;
 
-		pRxBufferAddress = pWb35Rx->pDRx;
-		BulkLength = (u16)pUrb->actual_length;
+	pRxBufferAddress = pWb35Rx->pDRx;
+	BulkLength = (u16)pUrb->actual_length;
 
-		// The IRP is completed
-		pWb35Rx->EP3vm_state = VM_COMPLETED;
+	// The IRP is completed
+	pWb35Rx->EP3vm_state = VM_COMPLETED;
 
-		if (pHwData->SurpriseRemove || pHwData->HwStop) // Must be here, or RxBufferId is invalid
-			break;
+	if (pHwData->SurpriseRemove || pHwData->HwStop) // Must be here, or RxBufferId is invalid
+		goto error;
 
-		if (pWb35Rx->rx_halt)
-			break;
+	if (pWb35Rx->rx_halt)
+		goto error;
 
-		// Start to process the data only in successful condition
-		pWb35Rx->RxOwner[ RxBufferId ] = 0; // Set the owner to driver
-		R00.value = le32_to_cpu(*(PULONG)pRxBufferAddress);
+	// Start to process the data only in successful condition
+	pWb35Rx->RxOwner[ RxBufferId ] = 0; // Set the owner to driver
+	R00.value = le32_to_cpu(*(u32 *)pRxBufferAddress);
 
-		// The URB is completed, check the result
-		if (pWb35Rx->EP3VM_status != 0) {
-			#ifdef _PE_USB_STATE_DUMP_
-			WBDEBUG(("EP3 IoCompleteRoutine return error\n"));
-			DebugUsbdStatusInformation( pWb35Rx->EP3VM_status );
-			#endif
-			pWb35Rx->EP3vm_state = VM_STOP;
-			break;
-		}
+	// The URB is completed, check the result
+	if (pWb35Rx->EP3VM_status != 0) {
+		#ifdef _PE_USB_STATE_DUMP_
+		WBDEBUG(("EP3 IoCompleteRoutine return error\n"));
+		DebugUsbdStatusInformation( pWb35Rx->EP3VM_status );
+		#endif
+		pWb35Rx->EP3vm_state = VM_STOP;
+		goto error;
+	}
 
-		// 20060220 For recovering. check if operating in single USB mode
-		if (!HAL_USB_MODE_BURST(pHwData)) {
-			SizeCheck = R00.R00_receive_byte_count;  //20060926 anson's endian
-			if ((SizeCheck & 0x03) > 0)
-				SizeCheck -= 4;
-			SizeCheck = (SizeCheck + 3) & ~0x03;
-			SizeCheck += 12; // 8 + 4 badbeef
-			if ((BulkLength > 1600) ||
-				(SizeCheck > 1600) ||
-				(BulkLength != SizeCheck) ||
-				(BulkLength == 0)) { // Add for fail Urb
-				pWb35Rx->EP3vm_state = VM_STOP;
-				pWb35Rx->Ep3ErrorCount2++;
-			}
+	// 20060220 For recovering. check if operating in single USB mode
+	if (!HAL_USB_MODE_BURST(pHwData)) {
+		SizeCheck = R00.R00_receive_byte_count;  //20060926 anson's endian
+		if ((SizeCheck & 0x03) > 0)
+			SizeCheck -= 4;
+		SizeCheck = (SizeCheck + 3) & ~0x03;
+		SizeCheck += 12; // 8 + 4 badbeef
+		if ((BulkLength > 1600) ||
+			(SizeCheck > 1600) ||
+			(BulkLength != SizeCheck) ||
+			(BulkLength == 0)) { // Add for fail Urb
+			pWb35Rx->EP3vm_state = VM_STOP;
+			pWb35Rx->Ep3ErrorCount2++;
 		}
+	}
 
-		// Indicating the receiving data
-		pWb35Rx->ByteReceived += BulkLength;
-		pWb35Rx->RxBufferSize[ RxBufferId ] = BulkLength;
-
-		if (!pWb35Rx->RxOwner[ RxBufferId ])
-			Wb35Rx_indicate(pHwData);
+	// Indicating the receiving data
+	pWb35Rx->ByteReceived += BulkLength;
+	pWb35Rx->RxBufferSize[ RxBufferId ] = BulkLength;
 
-		kfree(pWb35Rx->pDRx);
-		// Do the next receive
-		Wb35Rx(pHwData);
-		return;
+	if (!pWb35Rx->RxOwner[ RxBufferId ])
+		Wb35Rx_indicate(pHwData);
 
-	} while(FALSE);
+	kfree(pWb35Rx->pDRx);
+	// Do the next receive
+	Wb35Rx(pHwData);
+	return;
 
+error:
 	pWb35Rx->RxOwner[ RxBufferId ] = 1; // Set the owner to hardware
 	OS_ATOMIC_DEC( pHwData->Adapter, &pWb35Rx->RxFireCounter );
 	pWb35Rx->EP3vm_state = VM_STOP;
@@ -223,7 +220,7 @@ void Wb35Rx_reset_descriptor(  phw_data_t pHwData )
 
 void Wb35Rx_adjust(PDESCRIPTOR pRxDes)
 {
-	PULONG	pRxBufferAddress;
+	u32 *	pRxBufferAddress;
 	u32	DecryptionMethod;
 	u32	i;
 	u16	BufferSize;
@@ -264,7 +261,7 @@ u16 Wb35Rx_indicate(phw_data_t pHwData)
 {
 	DESCRIPTOR	RxDes;
 	PWB35RX	pWb35Rx = &pHwData->Wb35Rx;
-	PUCHAR		pRxBufferAddress;
+	u8 *		pRxBufferAddress;
 	u16		PacketSize;
 	u16		stmp, BufferSize, stmp2 = 0;
 	u32		RxBufferId;
@@ -283,13 +280,13 @@ u16 Wb35Rx_indicate(phw_data_t pHwData)
 
 		// Parse the bulkin buffer
 		while (BufferSize >= 4) {
-			if ((cpu_to_le32(*(PULONG)pRxBufferAddress) & 0x0fffffff) == RX_END_TAG) //Is ending? 921002.9.a
+			if ((cpu_to_le32(*(u32 *)pRxBufferAddress) & 0x0fffffff) == RX_END_TAG) //Is ending? 921002.9.a
 				break;
 
 			// Get the R00 R01 first
-			RxDes.R00.value = le32_to_cpu(*(PULONG)pRxBufferAddress);
+			RxDes.R00.value = le32_to_cpu(*(u32 *)pRxBufferAddress);
 			PacketSize = (u16)RxDes.R00.R00_receive_byte_count;
-			RxDes.R01.value = le32_to_cpu(*((PULONG)(pRxBufferAddress+4)));
+			RxDes.R01.value = le32_to_cpu(*((u32 *)(pRxBufferAddress+4)));
 			// For new DMA 4k
 			if ((PacketSize & 0x03) > 0)
 				PacketSize -= 4;

drivers/staging/winbond/linux/wb35rx_s.h

@@ -41,7 +41,7 @@ typedef struct _WB35RX
 	u32		Ep3ErrorCount2; // 20060625.1 Usbd for Rx DMA error count
 
 	int		EP3VM_status;
-	PUCHAR	pDRx;
+	u8 *	pDRx;
 
 } WB35RX, *PWB35RX;
 

drivers/staging/winbond/linux/wb35tx.c

@@ -12,7 +12,7 @@
 
 
 unsigned char
-Wb35Tx_get_tx_buffer(phw_data_t pHwData, PUCHAR *pBuffer )
+Wb35Tx_get_tx_buffer(phw_data_t pHwData, u8 **pBuffer)
 {
 	PWB35TX pWb35Tx = &pHwData->Wb35Tx;
 
@@ -37,7 +37,7 @@ void Wb35Tx(phw_data_t pHwData)
 {
 	PWB35TX		pWb35Tx = &pHwData->Wb35Tx;
 	PADAPTER	Adapter = pHwData->Adapter;
-	PUCHAR		pTxBufferAddress;
+	u8		*pTxBufferAddress;
 	PMDS		pMds = &Adapter->Mds;
 	struct urb *	pUrb = (struct urb *)pWb35Tx->Tx4Urb;
 	int         	retv;
@@ -100,25 +100,24 @@ void Wb35Tx_complete(struct urb * pUrb)
 	pWb35Tx->TxSendIndex++;
 	pWb35Tx->TxSendIndex %= MAX_USB_TX_BUFFER_NUMBER;
 
-	do {
-		if (pHwData->SurpriseRemove || pHwData->HwStop) // Let WbWlanHalt to handle surprise remove
-			break;
+	if (pHwData->SurpriseRemove || pHwData->HwStop) // Let WbWlanHalt to handle surprise remove
+		goto error;
 
-		if (pWb35Tx->tx_halt)
-			break;
+	if (pWb35Tx->tx_halt)
+		goto error;
 
-		// The URB is completed, check the result
-		if (pWb35Tx->EP4VM_status != 0) {
-			printk("URB submission failed\n");
-			pWb35Tx->EP4vm_state = VM_STOP;
-			break; // Exit while(FALSE);
-		}
+	// The URB is completed, check the result
+	if (pWb35Tx->EP4VM_status != 0) {
+		printk("URB submission failed\n");
+		pWb35Tx->EP4vm_state = VM_STOP;
+		goto error;
+	}
 
-		Mds_Tx(Adapter);
-		Wb35Tx(pHwData);
-		return;
-	} while(FALSE);
+	Mds_Tx(Adapter);
+	Wb35Tx(pHwData);
+	return;
 
+error:
 	OS_ATOMIC_DEC( pHwData->Adapter, &pWb35Tx->TxFireCounter );
 	pWb35Tx->EP4vm_state = VM_STOP;
 }
@@ -225,36 +224,33 @@ void Wb35Tx_EP2VM(phw_data_t pHwData)
 {
 	PWB35TX pWb35Tx = &pHwData->Wb35Tx;
 	struct urb *	pUrb = (struct urb *)pWb35Tx->Tx2Urb;
-	PULONG	pltmp = (PULONG)pWb35Tx->EP2_buf;
+	u32 *	pltmp = (u32 *)pWb35Tx->EP2_buf;
 	int		retv;
 
-	do {
-		if (pHwData->SurpriseRemove || pHwData->HwStop)
-			break;
-
-		if (pWb35Tx->tx_halt)
-			break;
-
-		//
-		// Issuing URB
-		//
-		usb_fill_int_urb( pUrb, pHwData->WbUsb.udev, usb_rcvintpipe(pHwData->WbUsb.udev,2),
-				  pltmp, MAX_INTERRUPT_LENGTH, Wb35Tx_EP2VM_complete, pHwData, 32);
+	if (pHwData->SurpriseRemove || pHwData->HwStop)
+		goto error;
 
-		pWb35Tx->EP2vm_state = VM_RUNNING;
-		retv = wb_usb_submit_urb( pUrb );
+	if (pWb35Tx->tx_halt)
+		goto error;
 
-		if(retv < 0) {
-			#ifdef _PE_TX_DUMP_
-			WBDEBUG(("EP2 Tx Irp sending error\n"));
-			#endif
-			break;
-		}
+	//
+	// Issuing URB
+	//
+	usb_fill_int_urb( pUrb, pHwData->WbUsb.udev, usb_rcvintpipe(pHwData->WbUsb.udev,2),
+			  pltmp, MAX_INTERRUPT_LENGTH, Wb35Tx_EP2VM_complete, pHwData, 32);
 
-		return;
+	pWb35Tx->EP2vm_state = VM_RUNNING;
+	retv = wb_usb_submit_urb( pUrb );
 
-	} while(FALSE);
+	if (retv < 0) {
+		#ifdef _PE_TX_DUMP_
+		WBDEBUG(("EP2 Tx Irp sending error\n"));
+		#endif
+		goto error;
+	}
 
+	return;
+error:
 	pWb35Tx->EP2vm_state = VM_STOP;
 	OS_ATOMIC_DEC( pHwData->Adapter, &pWb35Tx->TxResultCount );
 }
@@ -266,7 +262,7 @@ void Wb35Tx_EP2VM_complete(struct urb * pUrb)
 	T02_DESCRIPTOR	T02, TSTATUS;
 	PADAPTER	Adapter = (PADAPTER)pHwData->Adapter;
 	PWB35TX		pWb35Tx = &pHwData->Wb35Tx;
-	PULONG		pltmp = (PULONG)pWb35Tx->EP2_buf;
+	u32 *		pltmp = (u32 *)pWb35Tx->EP2_buf;
 	u32		i;
 	u16		InterruptInLength;
 
@@ -275,38 +271,36 @@ void Wb35Tx_EP2VM_complete(struct urb * pUrb)
 	pWb35Tx->EP2vm_state = VM_COMPLETED;
 	pWb35Tx->EP2VM_status = pUrb->status;
 
-	do {
-		// For Linux 2.4. Interrupt will always trigger
-		if( pHwData->SurpriseRemove || pHwData->HwStop ) // Let WbWlanHalt to handle surprise remove
-			break;
-
-		if( pWb35Tx->tx_halt )
-			break;
-
-		//The Urb is completed, check the result
-		if (pWb35Tx->EP2VM_status != 0) {
-			WBDEBUG(("EP2 IoCompleteRoutine return error\n"));
-			pWb35Tx->EP2vm_state= VM_STOP;
-			break; // Exit while(FALSE);
-		}
-
-		// Update the Tx result
-		InterruptInLength = pUrb->actual_length;
-		// Modify for minimum memory access and DWORD alignment.
-		T02.value = cpu_to_le32(pltmp[0]) >> 8; // [31:8] -> [24:0]
-		InterruptInLength -= 1;// 20051221.1.c Modify the follow for more stable
-		InterruptInLength >>= 2; // InterruptInLength/4
-		for (i=1; i<=InterruptInLength; i++) {
-			T02.value |= ((cpu_to_le32(pltmp[i]) & 0xff) << 24);
-
-			TSTATUS.value = T02.value;  //20061009 anson's endian
-			Mds_SendComplete( Adapter, &TSTATUS );
-			T02.value = cpu_to_le32(pltmp[i]) >> 8;
-		}
-
-		return;
-	} while(FALSE);
+	// For Linux 2.4. Interrupt will always trigger
+	if (pHwData->SurpriseRemove || pHwData->HwStop) // Let WbWlanHalt to handle surprise remove
+		goto error;
+
+	if (pWb35Tx->tx_halt)
+		goto error;
+
+	//The Urb is completed, check the result
+	if (pWb35Tx->EP2VM_status != 0) {
+		WBDEBUG(("EP2 IoCompleteRoutine return error\n"));
+		pWb35Tx->EP2vm_state= VM_STOP;
+		goto error;
+	}
 
+	// Update the Tx result
+	InterruptInLength = pUrb->actual_length;
+	// Modify for minimum memory access and DWORD alignment.
+	T02.value = cpu_to_le32(pltmp[0]) >> 8; // [31:8] -> [24:0]
+	InterruptInLength -= 1;// 20051221.1.c Modify the follow for more stable
+	InterruptInLength >>= 2; // InterruptInLength/4
+	for (i = 1; i <= InterruptInLength; i++) {
+		T02.value |= ((cpu_to_le32(pltmp[i]) & 0xff) << 24);
+
+		TSTATUS.value = T02.value;  //20061009 anson's endian
+		Mds_SendComplete( Adapter, &TSTATUS );
+		T02.value = cpu_to_le32(pltmp[i]) >> 8;
+	}
+
+	return;
+error:
 	OS_ATOMIC_DEC( pHwData->Adapter, &pWb35Tx->TxResultCount );
 	pWb35Tx->EP2vm_state = VM_STOP;
 }

drivers/staging/winbond/linux/wb35tx_f.h

@@ -3,7 +3,7 @@
 //====================================
 unsigned char Wb35Tx_initial(	 phw_data_t pHwData );
 void Wb35Tx_destroy(  phw_data_t pHwData );
-unsigned char Wb35Tx_get_tx_buffer(  phw_data_t pHwData,  PUCHAR *pBuffer );
+unsigned char Wb35Tx_get_tx_buffer(  phw_data_t pHwData,  u8 **pBuffer );
 
 void Wb35Tx_EP2VM(  phw_data_t pHwData );
 void Wb35Tx_EP2VM_start(  phw_data_t pHwData );

drivers/staging/winbond/linux/wbusb.c

@@ -6,42 +6,29 @@
 #include "sysdef.h"
 #include <net/mac80211.h>
 
-
-MODULE_AUTHOR( DRIVER_AUTHOR );
-MODULE_DESCRIPTION( DRIVER_DESC );
+MODULE_AUTHOR(DRIVER_AUTHOR);
+MODULE_DESCRIPTION(DRIVER_DESC);
 MODULE_LICENSE("GPL");
 MODULE_VERSION("0.1");
 
-
-//============================================================
-// vendor ID and product ID can into here for others
-//============================================================
-static struct usb_device_id Id_Table[] =
-{
-  {USB_DEVICE( 0x0416, 0x0035 )},
-  {USB_DEVICE( 0x18E8, 0x6201 )},
-  {USB_DEVICE( 0x18E8, 0x6206 )},
-  {USB_DEVICE( 0x18E8, 0x6217 )},
-  {USB_DEVICE( 0x18E8, 0x6230 )},
-  {USB_DEVICE( 0x18E8, 0x6233 )},
-  {USB_DEVICE( 0x1131, 0x2035 )},
-  {  }
+static struct usb_device_id wb35_table[] __devinitdata = {
+	{USB_DEVICE(0x0416, 0x0035)},
+	{USB_DEVICE(0x18E8, 0x6201)},
+	{USB_DEVICE(0x18E8, 0x6206)},
+	{USB_DEVICE(0x18E8, 0x6217)},
+	{USB_DEVICE(0x18E8, 0x6230)},
+	{USB_DEVICE(0x18E8, 0x6233)},
+	{USB_DEVICE(0x1131, 0x2035)},
+	{ 0, }
 };
 
-MODULE_DEVICE_TABLE(usb, Id_Table);
+MODULE_DEVICE_TABLE(usb, wb35_table);
 
-static struct usb_driver wb35_driver = {
-	.name =		"w35und",
-	.probe =	wb35_probe,
-	.disconnect = wb35_disconnect,
-	.id_table = Id_Table,
-};
-
-static const struct ieee80211_rate wbsoft_rates[] = {
+static struct ieee80211_rate wbsoft_rates[] = {
 	{ .bitrate = 10, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
 };
 
-static const struct ieee80211_channel wbsoft_channels[] = {
+static struct ieee80211_channel wbsoft_channels[] = {
 	{ .center_freq = 2412},
 };
 
@@ -62,9 +49,22 @@ static void wbsoft_remove_interface(struct ieee80211_hw *dev,
 	printk("wbsoft_remove interface called\n");
 }
 
-static int wbsoft_nop(void)
+static void wbsoft_stop(struct ieee80211_hw *hw)
+{
+	printk(KERN_INFO "%s called\n", __func__);
+}
+
+static int wbsoft_get_stats(struct ieee80211_hw *hw,
+			    struct ieee80211_low_level_stats *stats)
 {
-	printk("wbsoft_nop called\n");
+	printk(KERN_INFO "%s called\n", __func__);
+	return 0;
+}
+
+static int wbsoft_get_tx_stats(struct ieee80211_hw *hw,
+			       struct ieee80211_tx_queue_stats *stats)
+{
+	printk(KERN_INFO "%s called\n", __func__);
 	return 0;
 }
 
@@ -105,8 +105,7 @@ static void wbsoft_configure_filter(struct ieee80211_hw *dev,
 	*total_flags = new_flags;
 }
 
-static int wbsoft_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
-		      struct ieee80211_tx_control *control)
+static int wbsoft_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 {
 	char *buffer = kmalloc(skb->len, GFP_ATOMIC);
 	printk("Sending frame %d bytes\n", skb->len);
@@ -136,7 +135,7 @@ static int wbsoft_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
 	hal_set_current_channel(&my_adapter->sHwData, ch);
 	hal_set_beacon_period(&my_adapter->sHwData, conf->beacon_int);
 //	hal_set_cap_info(&my_adapter->sHwData, ?? );
-// hal_set_ssid(phw_data_t pHwData,  PUCHAR pssid,  u8 ssid_len); ??
+// hal_set_ssid(phw_data_t pHwData,  u8 * pssid,  u8 ssid_len); ??
 	hal_set_accept_broadcast(&my_adapter->sHwData, 1);
 	hal_set_accept_promiscuous(&my_adapter->sHwData,  1);
 	hal_set_accept_multicast(&my_adapter->sHwData,  1);
@@ -148,7 +147,7 @@ static int wbsoft_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
 
 //	hal_start_bss(&my_adapter->sHwData, WLAN_BSSTYPE_INFRASTRUCTURE);	??
 
-//void hal_set_rates(phw_data_t pHwData, PUCHAR pbss_rates,
+//void hal_set_rates(phw_data_t pHwData, u8 * pbss_rates,
 //		   u8 length, unsigned char basic_rate_set)
 
 	return 0;
@@ -171,14 +170,14 @@ static u64 wbsoft_get_tsf(struct ieee80211_hw *dev)
 static const struct ieee80211_ops wbsoft_ops = {
 	.tx			= wbsoft_tx,
 	.start			= wbsoft_start,		/* Start can be pretty much empty as we do WbWLanInitialize() during probe? */
-	.stop			= wbsoft_nop,
+	.stop			= wbsoft_stop,
 	.add_interface		= wbsoft_add_interface,
 	.remove_interface	= wbsoft_remove_interface,
 	.config			= wbsoft_config,
 	.config_interface	= wbsoft_config_interface,
 	.configure_filter	= wbsoft_configure_filter,
-	.get_stats		= wbsoft_nop,
-	.get_tx_stats		= wbsoft_nop,
+	.get_stats		= wbsoft_get_stats,
+	.get_tx_stats		= wbsoft_get_tx_stats,
 	.get_tsf		= wbsoft_get_tsf,
 // conf_tx: hal_set_cwmin()/hal_set_cwmax;
 };
@@ -187,21 +186,6 @@ struct wbsoft_priv {
 };
 
 
-int __init wb35_init(void)
-{
-	printk("[w35und]driver init\n");
-	return usb_register(&wb35_driver);
-}
-
-void __exit wb35_exit(void)
-{
-	printk("[w35und]driver exit\n");
-	usb_deregister( &wb35_driver );
-}
-
-module_init(wb35_init);
-module_exit(wb35_exit);
-
 // Usb kernel subsystem will call this function when a new device is plugged into.
 int wb35_probe(struct usb_interface *intf, const struct usb_device_id *id_table)
 {
@@ -210,7 +194,7 @@ int wb35_probe(struct usb_interface *intf, const struct usb_device_id *id_table)
 	PWBUSB		pWbUsb;
         struct usb_host_interface *interface;
 	struct usb_endpoint_descriptor *endpoint;
-	int	i, ret = -1;
+	int	ret = -1;
 	u32	ltmp;
 	struct usb_device *udev = interface_to_usbdev(intf);
 
@@ -218,114 +202,95 @@ int wb35_probe(struct usb_interface *intf, const struct usb_device_id *id_table)
 
 	printk("[w35und]wb35_probe ->\n");
 
-	do {
-		for (i=0; i<(sizeof(Id_Table)/sizeof(struct usb_device_id)); i++ ) {
-			if ((udev->descriptor.idVendor == Id_Table[i].idVendor) &&
-				(udev->descriptor.idProduct == Id_Table[i].idProduct)) {
-				printk("[w35und]Found supported hardware\n");
-				break;
-			}
-		}
-		if ((i == (sizeof(Id_Table)/sizeof(struct usb_device_id)))) {
-			#ifdef _PE_USB_INI_DUMP_
-			WBDEBUG(("[w35und] This is not the one we are interested about\n"));
-			#endif
-			return -ENODEV;
-		}
-
-		// 20060630.2 Check the device if it already be opened
-		ret = usb_control_msg(udev, usb_rcvctrlpipe( udev, 0 ),
-				      0x01, USB_TYPE_VENDOR|USB_RECIP_DEVICE|USB_DIR_IN,
-				      0x0, 0x400, &ltmp, 4, HZ*100 );
-		if( ret < 0 )
-			break;
+	// 20060630.2 Check the device if it already be opened
+	ret = usb_control_msg(udev, usb_rcvctrlpipe( udev, 0 ),
+			      0x01, USB_TYPE_VENDOR|USB_RECIP_DEVICE|USB_DIR_IN,
+			      0x0, 0x400, &ltmp, 4, HZ*100 );
+	if (ret < 0)
+		goto error;
 
-		ltmp = cpu_to_le32(ltmp);
-		if (ltmp)  // Is already initialized?
-			break;
+	ltmp = cpu_to_le32(ltmp);
+	if (ltmp)  // Is already initialized?
+		goto error;
 
+	Adapter = kzalloc(sizeof(ADAPTER), GFP_KERNEL);
 
-		Adapter = kzalloc(sizeof(ADAPTER), GFP_KERNEL);
+	my_adapter = Adapter;
+	pWbLinux = &Adapter->WbLinux;
+	pWbUsb = &Adapter->sHwData.WbUsb;
+	pWbUsb->udev = udev;
 
-		my_adapter = Adapter;
-		pWbLinux = &Adapter->WbLinux;
-		pWbUsb = &Adapter->sHwData.WbUsb;
-		pWbUsb->udev = udev;
+        interface = intf->cur_altsetting;
+        endpoint = &interface->endpoint[0].desc;
 
-	        interface = intf->cur_altsetting;
-	        endpoint = &interface->endpoint[0].desc;
-
-		if (endpoint[2].wMaxPacketSize == 512) {
-			printk("[w35und] Working on USB 2.0\n");
-			pWbUsb->IsUsb20 = 1;
-		}
-
-		if (!WbWLanInitialize(Adapter)) {
-			printk("[w35und]WbWLanInitialize fail\n");
-			break;
-		}
+	if (endpoint[2].wMaxPacketSize == 512) {
+		printk("[w35und] Working on USB 2.0\n");
+		pWbUsb->IsUsb20 = 1;
+	}
 
-		{
-			struct wbsoft_priv *priv;
-			struct ieee80211_hw *dev;
-			int res;
+	if (!WbWLanInitialize(Adapter)) {
+		printk("[w35und]WbWLanInitialize fail\n");
+		goto error;
+	}
 
-			dev = ieee80211_alloc_hw(sizeof(*priv), &wbsoft_ops);
+	{
+		struct wbsoft_priv *priv;
+		struct ieee80211_hw *dev;
+		static struct ieee80211_supported_band band;
+		int res;
 
-			if (!dev) {
-				printk("w35und: ieee80211 alloc failed\n" );
-				BUG();
-			}
+		dev = ieee80211_alloc_hw(sizeof(*priv), &wbsoft_ops);
 
-			my_dev = dev;
+		if (!dev) {
+			printk("w35und: ieee80211 alloc failed\n" );
+			BUG();
+		}
 
-			SET_IEEE80211_DEV(dev, &udev->dev);
-			{
-				phw_data_t pHwData = &Adapter->sHwData;
-				unsigned char		dev_addr[MAX_ADDR_LEN];
-				hal_get_permanent_address(pHwData, dev_addr);
-				SET_IEEE80211_PERM_ADDR(dev, dev_addr);
-			}
+		my_dev = dev;
 
+		SET_IEEE80211_DEV(dev, &udev->dev);
+		{
+			phw_data_t pHwData = &Adapter->sHwData;
+			unsigned char		dev_addr[MAX_ADDR_LEN];
+			hal_get_permanent_address(pHwData, dev_addr);
+			SET_IEEE80211_PERM_ADDR(dev, dev_addr);
+		}
 
-			dev->extra_tx_headroom = 12;	/* FIXME */
-			dev->flags = 0;
 
-			dev->channel_change_time = 1000;
-//			dev->max_rssi = 100;
+		dev->extra_tx_headroom = 12;	/* FIXME */
+		dev->flags = 0;
 
-			dev->queues = 1;
+		dev->channel_change_time = 1000;
+//		dev->max_rssi = 100;
 
-			static struct ieee80211_supported_band band;
+		dev->queues = 1;
 
-			band.channels = wbsoft_channels;
-			band.n_channels = ARRAY_SIZE(wbsoft_channels);
-			band.bitrates = wbsoft_rates;
-			band.n_bitrates = ARRAY_SIZE(wbsoft_rates);
+		band.channels = wbsoft_channels;
+		band.n_channels = ARRAY_SIZE(wbsoft_channels);
+		band.bitrates = wbsoft_rates;
+		band.n_bitrates = ARRAY_SIZE(wbsoft_rates);
 
-			dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band;
+		dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band;
 #if 0
-			wbsoft_modes[0].num_channels = 1;
-			wbsoft_modes[0].channels = wbsoft_channels;
-			wbsoft_modes[0].mode = MODE_IEEE80211B;
-			wbsoft_modes[0].num_rates = ARRAY_SIZE(wbsoft_rates);
-			wbsoft_modes[0].rates = wbsoft_rates;
-
-			res = ieee80211_register_hwmode(dev, &wbsoft_modes[0]);
-			BUG_ON(res);
+		wbsoft_modes[0].num_channels = 1;
+		wbsoft_modes[0].channels = wbsoft_channels;
+		wbsoft_modes[0].mode = MODE_IEEE80211B;
+		wbsoft_modes[0].num_rates = ARRAY_SIZE(wbsoft_rates);
+		wbsoft_modes[0].rates = wbsoft_rates;
+
+		res = ieee80211_register_hwmode(dev, &wbsoft_modes[0]);
+		BUG_ON(res);
 #endif
 
-			res = ieee80211_register_hw(dev);
-			BUG_ON(res);
-		}
-
-		usb_set_intfdata( intf, Adapter );
-
-		printk("[w35und] _probe OK\n");
-		return 0;
+		res = ieee80211_register_hw(dev);
+		BUG_ON(res);
+	}
 
-	} while(FALSE);
+	usb_set_intfdata( intf, Adapter );
 
+	printk("[w35und] _probe OK\n");
+	return 0;
+error:
 	return -ENOMEM;
 }
 
@@ -401,4 +366,22 @@ void wb35_disconnect(struct usb_interface *intf)
 
 }
 
+static struct usb_driver wb35_driver = {
+	.name		= "w35und",
+	.id_table	= wb35_table,
+	.probe		= wb35_probe,
+	.disconnect	= wb35_disconnect,
+};
 
+static int __init wb35_init(void)
+{
+	return usb_register(&wb35_driver);
+}
+
+static void __exit wb35_exit(void)
+{
+	usb_deregister(&wb35_driver);
+}
+
+module_init(wb35_init);
+module_exit(wb35_exit);

drivers/staging/winbond/mds.c

@@ -40,7 +40,7 @@ Mds_Tx(PADAPTER Adapter)
 	PMDS		pMds = &Adapter->Mds;
 	DESCRIPTOR	TxDes;
 	PDESCRIPTOR	pTxDes = &TxDes;
-	PUCHAR		XmitBufAddress;
+	u8		*XmitBufAddress;
 	u16		XmitBufSize, PacketSize, stmp, CurrentSize, FragmentThreshold;
 	u8		FillIndex, TxDesIndex, FragmentCount, FillCount;
 	unsigned char	BufferFilled = FALSE, MICAdd = 0;
@@ -90,7 +90,7 @@ Mds_Tx(PADAPTER Adapter)
 			BufferFilled = TRUE;
 
 			/* Leaves first u8 intact */
-			memset((PUCHAR)pTxDes + 1, 0, sizeof(DESCRIPTOR) - 1);
+			memset((u8 *)pTxDes + 1, 0, sizeof(DESCRIPTOR) - 1);
 
 			TxDesIndex = pMds->TxDesIndex;//Get the current ID
 			pTxDes->Descriptor_ID = TxDesIndex;
@@ -229,10 +229,10 @@ Mds_SendComplete(PADAPTER Adapter, PT02_DESCRIPTOR pT02)
 }
 
 void
-Mds_HeaderCopy(PADAPTER Adapter, PDESCRIPTOR pDes, PUCHAR TargetBuffer)
+Mds_HeaderCopy(PADAPTER Adapter, PDESCRIPTOR pDes, u8 *TargetBuffer)
 {
 	PMDS	pMds = &Adapter->Mds;
-	PUCHAR	src_buffer = pDes->buffer_address[0];//931130.5.g
+	u8	*src_buffer = pDes->buffer_address[0];//931130.5.g
 	PT00_DESCRIPTOR	pT00;
 	PT01_DESCRIPTOR	pT01;
 	u16	stmp;
@@ -276,7 +276,7 @@ Mds_HeaderCopy(PADAPTER Adapter, PDESCRIPTOR pDes, PUCHAR TargetBuffer)
 	//
 	// Set tx rate
 	//
-	stmp = *(PUSHORT)(TargetBuffer+30); // 2n alignment address
+	stmp = *(u16 *)(TargetBuffer+30); // 2n alignment address
 
 	//Use basic rate
 	ctmp1 = ctmpf = CURRENT_TX_RATE_FOR_MNG;
@@ -326,11 +326,13 @@ Mds_HeaderCopy(PADAPTER Adapter, PDESCRIPTOR pDes, PUCHAR TargetBuffer)
 
 // The function return the 4n size of usb pk
 u16
-Mds_BodyCopy(PADAPTER Adapter, PDESCRIPTOR pDes, PUCHAR TargetBuffer)
+Mds_BodyCopy(PADAPTER Adapter, PDESCRIPTOR pDes, u8 *TargetBuffer)
 {
 	PT00_DESCRIPTOR	pT00;
 	PMDS	pMds = &Adapter->Mds;
-	PUCHAR	buffer, src_buffer, pctmp;
+	u8	*buffer;
+	u8	*src_buffer;
+	u8	*pctmp;
 	u16	Size = 0;
 	u16	SizeLeft, CopySize, CopyLeft, stmp;
 	u8	buf_index, FragmentCount = 0;
@@ -354,7 +356,7 @@ Mds_BodyCopy(PADAPTER Adapter, PDESCRIPTOR pDes, PUCHAR TargetBuffer)
 		SizeLeft -= CopySize;
 
 		// 1 Byte operation
-		pctmp = (PUCHAR)( buffer + 8 + DOT_11_SEQUENCE_OFFSET );
+		pctmp = (u8 *)( buffer + 8 + DOT_11_SEQUENCE_OFFSET );
 		*pctmp &= 0xf0;
 		*pctmp |= FragmentCount;//931130.5.m
 		if( !FragmentCount )
@@ -379,7 +381,7 @@ Mds_BodyCopy(PADAPTER Adapter, PDESCRIPTOR pDes, PUCHAR TargetBuffer)
 				buf_index++;
 				buf_index %= MAX_DESCRIPTOR_BUFFER_INDEX;
 			} else {
-				PUCHAR	pctmp = pDes->buffer_address[buf_index];
+				u8	*pctmp = pDes->buffer_address[buf_index];
 				pctmp += CopySize;
 				pDes->buffer_address[buf_index] = pctmp;
 				pDes->buffer_size[buf_index] -= CopySize;
@@ -419,7 +421,7 @@ Mds_BodyCopy(PADAPTER Adapter, PDESCRIPTOR pDes, PUCHAR TargetBuffer)
 
 	pT00->T00_last_mpdu = 1;
 	pT00->T00_IsLastMpdu = 1;
-	buffer = (PUCHAR)pT00 + 8; // +8 for USB hdr
+	buffer = (u8 *)pT00 + 8; // +8 for USB hdr
 	buffer[1] &= ~0x04; // Clear more frag bit of 802.11 frame control
 	pDes->FragmentCount = FragmentCount; // Update the correct fragment number
 	return Size;
@@ -427,7 +429,7 @@ Mds_BodyCopy(PADAPTER Adapter, PDESCRIPTOR pDes, PUCHAR TargetBuffer)
 
 
 void
-Mds_DurationSet(  PADAPTER Adapter,  PDESCRIPTOR pDes,  PUCHAR buffer )
+Mds_DurationSet(  PADAPTER Adapter,  PDESCRIPTOR pDes,  u8 *buffer )
 {
 	PT00_DESCRIPTOR	pT00;
 	PT01_DESCRIPTOR	pT01;
@@ -435,7 +437,7 @@ Mds_DurationSet(  PADAPTER Adapter,  PDESCRIPTOR pDes,  PUCHAR buffer )
 	u8	Rate, i;
 	unsigned char	CTS_on = FALSE, RTS_on = FALSE;
 	PT00_DESCRIPTOR pNextT00;
-	u16 BodyLen;
+	u16 BodyLen = 0;
 	unsigned char boGroupAddr = FALSE;
 
 
@@ -574,7 +576,7 @@ Mds_DurationSet(  PADAPTER Adapter,  PDESCRIPTOR pDes,  PUCHAR buffer )
 							DEFAULT_SIFSTIME*3 );
 			}
 
-			((PUSHORT)buffer)[5] = cpu_to_le16(Duration);// 4 USHOR for skip 8B USB, 2USHORT=FC + Duration
+			((u16 *)buffer)[5] = cpu_to_le16(Duration);// 4 USHOR for skip 8B USB, 2USHORT=FC + Duration
 
 			//----20061009 add by anson's endian
 			pNextT00->value = cpu_to_le32(pNextT00->value);
@@ -615,7 +617,7 @@ Mds_DurationSet(  PADAPTER Adapter,  PDESCRIPTOR pDes,  PUCHAR buffer )
 		}
 	}
 
-	((PUSHORT)buffer)[5] = cpu_to_le16(Duration);// 4 USHOR for skip 8B USB, 2USHORT=FC + Duration
+	((u16 *)buffer)[5] = cpu_to_le16(Duration);// 4 USHOR for skip 8B USB, 2USHORT=FC + Duration
 	pT00->value = cpu_to_le32(pT00->value);
 	pT01->value = cpu_to_le32(pT01->value);
 	//--end 20061009 add

drivers/staging/winbond/mds_f.h

@@ -1,9 +1,9 @@
 unsigned char Mds_initial(  PADAPTER Adapter );
 void Mds_Destroy(  PADAPTER Adapter );
 void Mds_Tx(  PADAPTER Adapter );
-void Mds_HeaderCopy(  PADAPTER Adapter,  PDESCRIPTOR pDes,  PUCHAR TargetBuffer );
-u16 Mds_BodyCopy(  PADAPTER Adapter,  PDESCRIPTOR pDes,  PUCHAR TargetBuffer );
-void Mds_DurationSet(  PADAPTER Adapter,  PDESCRIPTOR pDes,  PUCHAR TargetBuffer );
+void Mds_HeaderCopy(  PADAPTER Adapter,  PDESCRIPTOR pDes,  u8 *TargetBuffer );
+u16 Mds_BodyCopy(  PADAPTER Adapter,  PDESCRIPTOR pDes,  u8 *TargetBuffer );
+void Mds_DurationSet(  PADAPTER Adapter,  PDESCRIPTOR pDes,  u8 *TargetBuffer );
 void Mds_SendComplete(  PADAPTER Adapter,  PT02_DESCRIPTOR pT02 );
 void Mds_MpduProcess(  PADAPTER Adapter,  PDESCRIPTOR pRxDes );
 void Mds_reset_descriptor(  PADAPTER Adapter );

drivers/staging/winbond/mds_s.h

@@ -86,7 +86,7 @@ typedef struct _MDS
 {
 	// For Tx usage
 	u8	TxOwner[ ((MAX_USB_TX_BUFFER_NUMBER + 3) & ~0x03) ];
-	PUCHAR	pTxBuffer;
+	u8	*pTxBuffer;
 	u16	TxBufferSize[ ((MAX_USB_TX_BUFFER_NUMBER + 1) & ~0x01) ];
 	u8	TxDesFrom[ ((MAX_USB_TX_DESCRIPTOR + 3) & ~0x03) ];//931130.4.u // 1: MLME 2: NDIS control 3: NDIS data
 	u8	TxCountInBuffer[ ((MAX_USB_TX_DESCRIPTOR + 3) & ~0x03) ]; // 20060928
@@ -103,7 +103,7 @@ typedef struct _MDS
 	u16	TxResult[ ((MAX_USB_TX_DESCRIPTOR + 1) & ~0x01) ];//Collect the sending result of Mpdu
 
 	u8	MicRedundant[8]; // For tmp use
-	PUCHAR	MicWriteAddress[2]; //The start address to fill the Mic, use 2 point due to Mic maybe fragment
+	u8	*MicWriteAddress[2]; //The start address to fill the Mic, use 2 point due to Mic maybe fragment
 
 	u16	MicWriteSize[2]; //931130.4.x
 
@@ -144,7 +144,7 @@ typedef struct _MDS
 
 typedef struct _RxBuffer
 {
-    PUCHAR  pBufferAddress;     // Pointer the received data buffer.
+    u8 * pBufferAddress;     // Pointer the received data buffer.
 	u16	BufferSize;
 	u8	RESERVED;
 	u8	BufferIndex;// Only 1 byte
@@ -176,7 +176,7 @@ typedef struct _RXLAYER1
 	/////////////////////////////////////////////////////////////////////////////////////////////
 	// For brand-new Rx system
 	u8	ReservedBuffer[ 2400 ];//If Buffer ID is reserved one, it must copy the data into this area
-	PUCHAR	ReservedBufferPoint;// Point to the next availabe address of reserved buffer
+	u8	*ReservedBufferPoint;// Point to the next availabe address of reserved buffer
 
 }RXLAYER1, * PRXLAYER1;
 

drivers/staging/winbond/mlme_s.h

@@ -125,12 +125,12 @@
 typedef struct _MLME_FRAME
 {
 	//NDIS_PACKET		MLME_Packet;
-	PCHAR			pMMPDU;
+	s8 *			pMMPDU;
 	u16			len;
 	u8			DataType;
 	u8			IsInUsed;
 
-	OS_SPIN_LOCK	MLMESpinLock;
+	spinlock_t	MLMESpinLock;
 
     u8		TxMMPDU[MAX_NUM_TX_MMPDU][MAX_MMPDU_SIZE];
 	u8		TxMMPDUInUse[ (MAX_NUM_TX_MMPDU+3) & ~0x03 ];

drivers/staging/winbond/mlmetxrx.c

@@ -113,13 +113,13 @@ MLME_GetNextPacket(PADAPTER Adapter, PDESCRIPTOR pDes)
 	pDes->Type = Adapter->sMlmeFrame.DataType;
 }
 
-void MLMEfreeMMPDUBuffer(PWB32_ADAPTER Adapter, PCHAR pData)
+void MLMEfreeMMPDUBuffer(PWB32_ADAPTER Adapter, s8 *pData)
 {
 	int i;
 
 	// Reclaim the data buffer
 	for (i = 0; i < MAX_NUM_TX_MMPDU; i++) {
-		if (pData == (PCHAR)&(Adapter->sMlmeFrame.TxMMPDU[i]))
+		if (pData == (s8 *)&(Adapter->sMlmeFrame.TxMMPDU[i]))
 			break;
 	}
 	if (Adapter->sMlmeFrame.TxMMPDUInUse[i])

drivers/staging/winbond/mlmetxrx_f.h

@@ -20,7 +20,7 @@ MLMEGetMMPDUBuffer(
      PWB32_ADAPTER    Adapter
    );
 
-void MLMEfreeMMPDUBuffer( PWB32_ADAPTER Adapter,  PCHAR pData);
+void MLMEfreeMMPDUBuffer( PWB32_ADAPTER Adapter,  s8 * pData);
 
 void MLME_GetNextPacket(  PADAPTER Adapter,  PDESCRIPTOR pDes );
 u8 MLMESendFrame( PWB32_ADAPTER Adapter,
@@ -42,7 +42,7 @@ MLMERcvFrame(
 void
 MLMEReturnPacket(
      PWB32_ADAPTER    Adapter,
-     PUCHAR           pRxBufer
+     u8 *          pRxBufer
    );
 #ifdef _IBSS_BEACON_SEQ_STICK_
 s8 SendBCNullData(PWB32_ADAPTER Adapter, u16 wIdx);

drivers/staging/winbond/reg.c

@@ -922,16 +922,16 @@ Uxx_ReadEthernetAddress(  phw_data_t pHwData )
 	// Only unplug and plug again can make hardware read EEPROM again. 20060727
 	Wb35Reg_WriteSync( pHwData, 0x03b4, 0x08000000 ); // Start EEPROM access + Read + address(0x0d)
 	Wb35Reg_ReadSync( pHwData, 0x03b4, &ltmp );
-	*(PUSHORT)pHwData->PermanentMacAddress = cpu_to_le16((u16)ltmp); //20060926 anson's endian
+	*(u16 *)pHwData->PermanentMacAddress = cpu_to_le16((u16)ltmp); //20060926 anson's endian
 	Wb35Reg_WriteSync( pHwData, 0x03b4, 0x08010000 ); // Start EEPROM access + Read + address(0x0d)
 	Wb35Reg_ReadSync( pHwData, 0x03b4, &ltmp );
-	*(PUSHORT)(pHwData->PermanentMacAddress + 2) = cpu_to_le16((u16)ltmp); //20060926 anson's endian
+	*(u16 *)(pHwData->PermanentMacAddress + 2) = cpu_to_le16((u16)ltmp); //20060926 anson's endian
 	Wb35Reg_WriteSync( pHwData, 0x03b4, 0x08020000 ); // Start EEPROM access + Read + address(0x0d)
 	Wb35Reg_ReadSync( pHwData, 0x03b4, &ltmp );
-	*(PUSHORT)(pHwData->PermanentMacAddress + 4) = cpu_to_le16((u16)ltmp); //20060926 anson's endian
-	*(PUSHORT)(pHwData->PermanentMacAddress + 6) = 0;
-	Wb35Reg_WriteSync( pHwData, 0x03e8, cpu_to_le32(*(PULONG)pHwData->PermanentMacAddress) ); //20060926 anson's endian
-	Wb35Reg_WriteSync( pHwData, 0x03ec, cpu_to_le32(*(PULONG)(pHwData->PermanentMacAddress+4)) ); //20060926 anson's endian
+	*(u16 *)(pHwData->PermanentMacAddress + 4) = cpu_to_le16((u16)ltmp); //20060926 anson's endian
+	*(u16 *)(pHwData->PermanentMacAddress + 6) = 0;
+	Wb35Reg_WriteSync( pHwData, 0x03e8, cpu_to_le32(*(u32 *)pHwData->PermanentMacAddress) ); //20060926 anson's endian
+	Wb35Reg_WriteSync( pHwData, 0x03ec, cpu_to_le32(*(u32 *)(pHwData->PermanentMacAddress+4)) ); //20060926 anson's endian
 }
 
 
@@ -1038,7 +1038,7 @@ void
 RFSynthesizer_initial(phw_data_t pHwData)
 {
 	u32	altmp[32];
-	PULONG	pltmp = altmp;
+	u32 *	pltmp = altmp;
 	u32	ltmp;
 	u8	number=0x00; // The number of register vale
 	u8	i;
@@ -2358,11 +2358,11 @@ void Mxx_initial(  phw_data_t pHwData )
 	pltmp[2] = pWb35Reg->M2C_MacControl;
 
 	// M30 BSSID
-	pltmp[3] = *(PULONG)pHwData->bssid;
+	pltmp[3] = *(u32 *)pHwData->bssid;
 
 	// M34
 	pHwData->AID = DEFAULT_AID;
-	tmp = *(PUSHORT)(pHwData->bssid+4);
+	tmp = *(u16 *)(pHwData->bssid+4);
 	tmp |= DEFAULT_AID << 16;
 	pltmp[4] = tmp;
 
@@ -2428,7 +2428,7 @@ void GetTxVgaFromEEPROM(  phw_data_t pHwData )
 {
 	u32		i, j, ltmp;
 	u16		Value[MAX_TXVGA_EEPROM];
-	PUCHAR		pctmp;
+	u8		*pctmp;
 	u8		ctmp=0;
 
 	// Get the entire TxVga setting in EEPROM
@@ -2441,7 +2441,7 @@ void GetTxVgaFromEEPROM(  phw_data_t pHwData )
 	}
 
 	// Adjust the filed which fills with reserved value.
-	pctmp = (PUCHAR)Value;
+	pctmp = (u8 *)Value;
 	for( i=0; i<(MAX_TXVGA_EEPROM*2); i++ )
 	{
 		if( pctmp[i] != 0xff )
@@ -2480,7 +2480,7 @@ void GetTxVgaFromEEPROM(  phw_data_t pHwData )
 // This function will use default TxVgaSettingInEEPROM data to calculate new TxVga.
 void EEPROMTxVgaAdjust(  phw_data_t pHwData ) // 20060619.5 Add
 {
-	PUCHAR		pTxVga = pHwData->TxVgaSettingInEEPROM;
+	u8	*	pTxVga = pHwData->TxVgaSettingInEEPROM;
 	s16		i, stmp;
 
 	//-- 2.4G -- 20060704.2 Request from Tiger

drivers/staging/winbond/sme_api.c

@@ -10,4 +10,5 @@
 s8 sme_get_rssi(void *pcore_data, s32 *prssi)
 {
        BUG();
+       return 0;
 }

drivers/staging/winbond/sme_api.h

@@ -208,7 +208,7 @@ s8 sme_set_tx_antenna(void *pcore_data, u32 TxAntenna);
 s8 sme_set_IBSS_chan(void *pcore_data, ChanInfo chan);
 
 //20061108 WPS
-s8 sme_set_IE_append(void *pcore_data, PUCHAR buffer, u16 buf_len);
+s8 sme_set_IE_append(void *pcore_data, u8 *buffer, u16 buf_len);
 
 
 

drivers/staging/winbond/wbhal.c

@@ -1,13 +1,13 @@
 #include "os_common.h"
 
-void hal_get_ethernet_address( phw_data_t pHwData, PUCHAR current_address )
+void hal_get_ethernet_address( phw_data_t pHwData, u8 *current_address )
 {
 	if( pHwData->SurpriseRemove ) return;
 
 	memcpy( current_address, pHwData->CurrentMacAddress, ETH_LENGTH_OF_ADDRESS );
 }
 
-void hal_set_ethernet_address( phw_data_t pHwData, PUCHAR current_address )
+void hal_set_ethernet_address( phw_data_t pHwData, u8 *current_address )
 {
 	u32 ltmp[2];
 
@@ -15,13 +15,13 @@ void hal_set_ethernet_address( phw_data_t pHwData, PUCHAR current_address )
 
 	memcpy( pHwData->CurrentMacAddress, current_address, ETH_LENGTH_OF_ADDRESS );
 
-	ltmp[0]= cpu_to_le32( *(PULONG)pHwData->CurrentMacAddress );
-	ltmp[1]= cpu_to_le32( *(PULONG)(pHwData->CurrentMacAddress + 4) ) & 0xffff;
+	ltmp[0]= cpu_to_le32( *(u32 *)pHwData->CurrentMacAddress );
+	ltmp[1]= cpu_to_le32( *(u32 *)(pHwData->CurrentMacAddress + 4) ) & 0xffff;
 
 	Wb35Reg_BurstWrite( pHwData, 0x03e8, ltmp, 2, AUTO_INCREMENT );
 }
 
-void hal_get_permanent_address( phw_data_t pHwData, PUCHAR pethernet_address )
+void hal_get_permanent_address( phw_data_t pHwData, u8 *pethernet_address )
 {
 	if( pHwData->SurpriseRemove ) return;
 
@@ -89,7 +89,7 @@ void hal_halt(phw_data_t pHwData, void *ppa_data)
 }
 
 //---------------------------------------------------------------------------------------------------
-void hal_set_rates(phw_data_t pHwData, PUCHAR pbss_rates,
+void hal_set_rates(phw_data_t pHwData, u8 *pbss_rates,
 		   u8 length, unsigned char basic_rate_set)
 {
 	PWB35REG	pWb35Reg = &pHwData->Wb35Reg;
@@ -158,13 +158,13 @@ void hal_set_rates(phw_data_t pHwData, PUCHAR pbss_rates,
 	// Fill data into support rate until buffer full
 	//---20060926 add by anson's endian
 	for (i=0; i<4; i++)
-		*(PULONG)(SupportedRate+(i<<2)) = cpu_to_le32( *(PULONG)(SupportedRate+(i<<2)) );
+		*(u32 *)(SupportedRate+(i<<2)) = cpu_to_le32( *(u32 *)(SupportedRate+(i<<2)) );
 	//--- end 20060926 add by anson's endian
-	Wb35Reg_BurstWrite( pHwData,0x087c, (PULONG)SupportedRate, 4, AUTO_INCREMENT );
-	pWb35Reg->M7C_MacControl = ((PULONG)SupportedRate)[0];
-	pWb35Reg->M80_MacControl = ((PULONG)SupportedRate)[1];
-	pWb35Reg->M84_MacControl = ((PULONG)SupportedRate)[2];
-	pWb35Reg->M88_MacControl = ((PULONG)SupportedRate)[3];
+	Wb35Reg_BurstWrite( pHwData,0x087c, (u32 *)SupportedRate, 4, AUTO_INCREMENT );
+	pWb35Reg->M7C_MacControl = ((u32 *)SupportedRate)[0];
+	pWb35Reg->M80_MacControl = ((u32 *)SupportedRate)[1];
+	pWb35Reg->M84_MacControl = ((u32 *)SupportedRate)[2];
+	pWb35Reg->M88_MacControl = ((u32 *)SupportedRate)[3];
 
 	// Fill length
 	tmp = Count1<<28 | Count2<<24;
@@ -206,7 +206,7 @@ void hal_set_current_channel_ex(  phw_data_t pHwData,  ChanInfo channel )
 	pWb35Reg->M28_MacControl &= ~0xff; // Clean channel information field
 	pWb35Reg->M28_MacControl |= channel.ChanNo;
 	Wb35Reg_WriteWithCallbackValue( pHwData, 0x0828, pWb35Reg->M28_MacControl,
-					(PCHAR)&channel, sizeof(ChanInfo));
+					(s8 *)&channel, sizeof(ChanInfo));
 }
 //---------------------------------------------------------------------------------------------------
 void hal_set_current_channel(  phw_data_t pHwData,  ChanInfo channel )
@@ -277,7 +277,7 @@ void hal_set_accept_beacon(  phw_data_t pHwData,  u8 enable )
 	Wb35Reg_Write( pHwData, 0x0800, pWb35Reg->M00_MacControl );
 }
 //---------------------------------------------------------------------------------------------------
-void hal_set_multicast_address( phw_data_t pHwData, PUCHAR address, u8 number )
+void hal_set_multicast_address( phw_data_t pHwData, u8 *address, u8 number )
 {
 	PWB35REG	pWb35Reg = &pHwData->Wb35Reg;
 	u8		Byte, Bit;
@@ -297,7 +297,7 @@ void hal_set_multicast_address( phw_data_t pHwData, PUCHAR address, u8 number )
 	}
 
 	// Updating register
-	Wb35Reg_BurstWrite( pHwData, 0x0804, (PULONG)pWb35Reg->Multicast, 2, AUTO_INCREMENT );
+	Wb35Reg_BurstWrite( pHwData, 0x0804, (u32 *)pWb35Reg->Multicast, 2, AUTO_INCREMENT );
 }
 //---------------------------------------------------------------------------------------------------
 u8 hal_get_accept_beacon(  phw_data_t pHwData )
@@ -806,7 +806,7 @@ u8 hal_get_hw_radio_off(  phw_data_t pHwData )
 	}
 }
 
-unsigned char hal_get_dxx_reg(  phw_data_t pHwData,  u16 number,  PULONG pValue )
+unsigned char hal_get_dxx_reg(  phw_data_t pHwData,  u16 number,  u32 * pValue )
 {
 	if( number < 0x1000 )
 		number += 0x1000;

drivers/staging/winbond/wbhal_f.h

@@ -16,23 +16,23 @@
 //====================================================================================
 // Function declaration
 //====================================================================================
-void hal_remove_mapping_key(  phw_data_t pHwData,  PUCHAR pmac_addr );
+void hal_remove_mapping_key(  phw_data_t pHwData,  u8 *pmac_addr );
 void hal_remove_default_key(  phw_data_t pHwData,  u32 index );
-unsigned char hal_set_mapping_key(  phw_data_t Adapter,  PUCHAR pmac_addr,  u8 null_key,  u8 wep_on,  PUCHAR ptx_tsc,  PUCHAR prx_tsc,  u8 key_type,  u8 key_len,  PUCHAR pkey_data );
-unsigned char hal_set_default_key(  phw_data_t Adapter,  u8 index,  u8 null_key,  u8 wep_on,  PUCHAR ptx_tsc,  PUCHAR prx_tsc,  u8 key_type,  u8 key_len,  PUCHAR pkey_data );
+unsigned char hal_set_mapping_key(  phw_data_t Adapter,  u8 *pmac_addr,  u8 null_key,  u8 wep_on,  u8 *ptx_tsc,  u8 *prx_tsc,  u8 key_type,  u8 key_len,  u8 *pkey_data );
+unsigned char hal_set_default_key(  phw_data_t Adapter,  u8 index,  u8 null_key,  u8 wep_on,  u8 *ptx_tsc,  u8 *prx_tsc,  u8 key_type,  u8 key_len,  u8 *pkey_data );
 void hal_clear_all_default_key(  phw_data_t pHwData );
 void hal_clear_all_group_key(  phw_data_t pHwData );
 void hal_clear_all_mapping_key(  phw_data_t pHwData );
 void hal_clear_all_key(  phw_data_t pHwData );
-void hal_get_ethernet_address(  phw_data_t pHwData,  PUCHAR current_address );
-void hal_set_ethernet_address(  phw_data_t pHwData,  PUCHAR current_address );
-void hal_get_permanent_address(  phw_data_t pHwData,  PUCHAR pethernet_address );
+void hal_get_ethernet_address(  phw_data_t pHwData,  u8 *current_address );
+void hal_set_ethernet_address(  phw_data_t pHwData,  u8 *current_address );
+void hal_get_permanent_address(  phw_data_t pHwData,  u8 *pethernet_address );
 unsigned char hal_init_hardware(  phw_data_t pHwData,  PADAPTER Adapter );
 void hal_set_power_save_mode(  phw_data_t pHwData,  unsigned char power_save,  unsigned char wakeup,  unsigned char dtim );
-void hal_get_power_save_mode(  phw_data_t pHwData,   PBOOLEAN pin_pwr_save );
+void hal_get_power_save_mode(  phw_data_t pHwData,   u8 *pin_pwr_save );
 void hal_set_slot_time(  phw_data_t pHwData,  u8 type );
 #define hal_set_atim_window( _A, _ATM )
-void hal_set_rates(  phw_data_t pHwData,  PUCHAR pbss_rates,  u8 length,  unsigned char basic_rate_set );
+void hal_set_rates(  phw_data_t pHwData,  u8 *pbss_rates,  u8 length,  unsigned char basic_rate_set );
 #define hal_set_basic_rates( _A, _R, _L ) hal_set_rates( _A, _R, _L, TRUE )
 #define hal_set_op_rates( _A, _R, _L ) hal_set_rates( _A, _R, _L, FALSE )
 void hal_start_bss(  phw_data_t pHwData,  u8 mac_op_mode );
@@ -40,19 +40,19 @@ void hal_join_request(  phw_data_t pHwData,  u8 bss_type ); // 0:BSS STA 1:IBSS
 void hal_stop_sync_bss(  phw_data_t pHwData );
 void hal_resume_sync_bss(  phw_data_t pHwData);
 void hal_set_aid(  phw_data_t pHwData,  u16 aid );
-void hal_set_bssid(  phw_data_t pHwData,  PUCHAR pbssid );
-void hal_get_bssid(  phw_data_t pHwData,  PUCHAR pbssid );
+void hal_set_bssid(  phw_data_t pHwData,  u8 *pbssid );
+void hal_get_bssid(  phw_data_t pHwData,  u8 *pbssid );
 void hal_set_beacon_period(  phw_data_t pHwData,  u16 beacon_period );
 void hal_set_listen_interval(  phw_data_t pHwData,  u16 listen_interval );
 void hal_set_cap_info(  phw_data_t pHwData,  u16 capability_info );
-void hal_set_ssid(  phw_data_t pHwData,  PUCHAR pssid,  u8 ssid_len );
+void hal_set_ssid(  phw_data_t pHwData,  u8 *pssid,  u8 ssid_len );
 void hal_set_current_channel(  phw_data_t pHwData,  ChanInfo channel );
 void hal_set_current_channel_ex(  phw_data_t pHwData,  ChanInfo channel );
 void hal_get_current_channel(  phw_data_t pHwData,  ChanInfo *channel );
 void hal_set_accept_broadcast(  phw_data_t pHwData,  u8 enable );
 void hal_set_accept_multicast(  phw_data_t pHwData,  u8 enable );
 void hal_set_accept_beacon(  phw_data_t pHwData,  u8 enable );
-void hal_set_multicast_address(  phw_data_t pHwData,  PUCHAR address,  u8 number );
+void hal_set_multicast_address(  phw_data_t pHwData,  u8 *address,  u8 number );
 u8 hal_get_accept_beacon(  phw_data_t pHwData );
 void hal_stop(  phw_data_t pHwData );
 void hal_halt(  phw_data_t pHwData, void *ppa_data );
@@ -97,7 +97,7 @@ void hal_surprise_remove(  phw_data_t pHwData );
 
 
 void hal_rate_change(  phw_data_t pHwData ); // Notify the HAL rate is changing 20060613.1
-unsigned char hal_get_dxx_reg(  phw_data_t pHwData,  u16 number,  PULONG pValue );
+unsigned char hal_get_dxx_reg(  phw_data_t pHwData,  u16 number,  u32 * pValue );
 unsigned char hal_set_dxx_reg(  phw_data_t pHwData,  u16 number,  u32 value );
 #define hal_get_time_count( _P )	(_P->time_count/10)	// return 100ms count
 #define hal_detect_error( _P )		(_P->WbUsb.DetectCount)
@@ -116,7 +116,7 @@ unsigned char	hal_idle(  phw_data_t pHwData );
 #define pa_stall_execution( _A )	//OS_SLEEP( 1 )
 #define hw_get_cxx_reg( _A, _B, _C )
 #define hw_set_cxx_reg( _A, _B, _C )
-#define hw_get_dxx_reg( _A, _B, _C )	hal_get_dxx_reg( _A, _B, (PULONG)_C )
+#define hw_get_dxx_reg( _A, _B, _C )	hal_get_dxx_reg( _A, _B, (u32 *)_C )
 #define hw_set_dxx_reg( _A, _B, _C )	hal_set_dxx_reg( _A, _B, (u32)_C )
 
 

drivers/staging/winbond/wbhal_s.h

@@ -461,7 +461,7 @@ typedef struct _HW_DATA_T
 	//=====================================================================
 	// Definition for 802.11
 	//=====================================================================
-	PUCHAR	bssid_pointer; // Used by hal_get_bssid for return value
+	u8	*bssid_pointer; // Used by hal_get_bssid for return value
 	u8	bssid[8];// Only 6 byte will be used. 8 byte is required for read buffer
 	u8	ssid[32];// maximum ssid length is 32 byte
 
@@ -486,7 +486,7 @@ typedef struct _HW_DATA_T
 	u32	CurrentRadioSw; // 20060320.2 0:On 1:Off
 	u32	CurrentRadioHw; // 20060825 0:On 1:Off
 
-	PUCHAR	power_save_point;  // Used by hal_get_power_save_mode for return value
+	u8	*power_save_point;  // Used by hal_get_power_save_mode for return value
 	u8	cwmin;
 	u8	desired_power_save;
 	u8	dtim;// Is running dtim

drivers/staging/winbond/wblinux.c

@@ -25,11 +25,11 @@ EncapAtomicInc(PADAPTER Adapter, void* pAtomic)
 {
 	PWBLINUX pWbLinux = &Adapter->WbLinux;
 	u32	ltmp;
-	PULONG	pltmp = (PULONG)pAtomic;
-	OS_SPIN_LOCK_ACQUIRED( &pWbLinux->AtomicSpinLock );
+	u32 *	pltmp = (u32 *)pAtomic;
+	spin_lock_irq( &pWbLinux->AtomicSpinLock );
 	(*pltmp)++;
 	ltmp = (*pltmp);
-	OS_SPIN_LOCK_RELEASED( &pWbLinux->AtomicSpinLock );
+	spin_unlock_irq( &pWbLinux->AtomicSpinLock );
 	return ltmp;
 }
 
@@ -38,11 +38,11 @@ EncapAtomicDec(PADAPTER Adapter, void* pAtomic)
 {
 	PWBLINUX pWbLinux = &Adapter->WbLinux;
 	u32	ltmp;
-	PULONG	pltmp = (PULONG)pAtomic;
-	OS_SPIN_LOCK_ACQUIRED( &pWbLinux->AtomicSpinLock );
+	u32 *	pltmp = (u32 *)pAtomic;
+	spin_lock_irq( &pWbLinux->AtomicSpinLock );
 	(*pltmp)--;
 	ltmp = (*pltmp);
-	OS_SPIN_LOCK_RELEASED( &pWbLinux->AtomicSpinLock );
+	spin_unlock_irq( &pWbLinux->AtomicSpinLock );
 	return ltmp;
 }
 
@@ -51,8 +51,8 @@ WBLINUX_Initial(PADAPTER Adapter)
 {
 	PWBLINUX pWbLinux = &Adapter->WbLinux;
 
-	OS_SPIN_LOCK_ALLOCATE( &pWbLinux->SpinLock );
-	OS_SPIN_LOCK_ALLOCATE( &pWbLinux->AtomicSpinLock );
+	spin_lock_init( &pWbLinux->SpinLock );
+	spin_lock_init( &pWbLinux->AtomicSpinLock );
 	return TRUE;
 }
 
@@ -79,7 +79,6 @@ void
 WBLINUX_Destroy(PADAPTER Adapter)
 {
 	WBLINUX_stop( Adapter );
-	OS_SPIN_LOCK_FREE( &pWbNdis->SpinLock );
 #ifdef _PE_USB_INI_DUMP_
 	WBDEBUG(("[w35und] unregister_netdev!\n"));
 #endif
@@ -142,119 +141,118 @@ unsigned char
 WbWLanInitialize(PADAPTER Adapter)
 {
 	phw_data_t	pHwData;
-	PUCHAR		pMacAddr, pMacAddr2;
+	u8		*pMacAddr;
+	u8		*pMacAddr2;
 	u32		InitStep = 0;
 	u8		EEPROM_region;
 	u8		HwRadioOff;
 
-	do {
-		//
-		// Setting default value for Linux
-		//
-		Adapter->sLocalPara.region_INF = REGION_AUTO;
-		Adapter->sLocalPara.TxRateMode = RATE_AUTO;
-		psLOCAL->bMacOperationMode = MODE_802_11_BG;	// B/G mode
-		Adapter->Mds.TxRTSThreshold = DEFAULT_RTSThreshold;
-		Adapter->Mds.TxFragmentThreshold = DEFAULT_FRAGMENT_THRESHOLD;
-		hal_set_phy_type( &Adapter->sHwData, RF_WB_242_1 );
-		Adapter->sLocalPara.MTUsize = MAX_ETHERNET_PACKET_SIZE;
-		psLOCAL->bPreambleMode = AUTO_MODE;
-		Adapter->sLocalPara.RadioOffStatus.boSwRadioOff = FALSE;
-		pHwData = &Adapter->sHwData;
-		hal_set_phy_type( pHwData, RF_DECIDE_BY_INF );
-
-		//
-		// Initial each module and variable
-		//
-		if (!WBLINUX_Initial(Adapter)) {
+	//
+	// Setting default value for Linux
+	//
+	Adapter->sLocalPara.region_INF = REGION_AUTO;
+	Adapter->sLocalPara.TxRateMode = RATE_AUTO;
+	psLOCAL->bMacOperationMode = MODE_802_11_BG;	// B/G mode
+	Adapter->Mds.TxRTSThreshold = DEFAULT_RTSThreshold;
+	Adapter->Mds.TxFragmentThreshold = DEFAULT_FRAGMENT_THRESHOLD;
+	hal_set_phy_type( &Adapter->sHwData, RF_WB_242_1 );
+	Adapter->sLocalPara.MTUsize = MAX_ETHERNET_PACKET_SIZE;
+	psLOCAL->bPreambleMode = AUTO_MODE;
+	Adapter->sLocalPara.RadioOffStatus.boSwRadioOff = FALSE;
+	pHwData = &Adapter->sHwData;
+	hal_set_phy_type( pHwData, RF_DECIDE_BY_INF );
+
+	//
+	// Initial each module and variable
+	//
+	if (!WBLINUX_Initial(Adapter)) {
 #ifdef _PE_USB_INI_DUMP_
-			WBDEBUG(("[w35und]WBNDIS initialization failed\n"));
+		WBDEBUG(("[w35und]WBNDIS initialization failed\n"));
 #endif
-			break;
-		}
+		goto error;
+	}
 
-		// Initial Software variable
-		Adapter->sLocalPara.ShutDowned = FALSE;
-
-		//added by ws for wep key error detection
-		Adapter->sLocalPara.bWepKeyError= FALSE;
-		Adapter->sLocalPara.bToSelfPacketReceived = FALSE;
-		Adapter->sLocalPara.WepKeyDetectTimerCount= 2 * 100; /// 2 seconds
-
-		// Initial USB hal
-		InitStep = 1;
-		pHwData = &Adapter->sHwData;
-		if (!hal_init_hardware(pHwData, Adapter))
-			break;
-
-		EEPROM_region = hal_get_region_from_EEPROM( pHwData );
-		if (EEPROM_region != REGION_AUTO)
-			psLOCAL->region = EEPROM_region;
-		else {
-			if (psLOCAL->region_INF != REGION_AUTO)
-				psLOCAL->region = psLOCAL->region_INF;
-			else
-				psLOCAL->region = REGION_USA;	//default setting
-		}
+	// Initial Software variable
+	Adapter->sLocalPara.ShutDowned = FALSE;
+
+	//added by ws for wep key error detection
+	Adapter->sLocalPara.bWepKeyError= FALSE;
+	Adapter->sLocalPara.bToSelfPacketReceived = FALSE;
+	Adapter->sLocalPara.WepKeyDetectTimerCount= 2 * 100; /// 2 seconds
+
+	// Initial USB hal
+	InitStep = 1;
+	pHwData = &Adapter->sHwData;
+	if (!hal_init_hardware(pHwData, Adapter))
+		goto error;
+
+	EEPROM_region = hal_get_region_from_EEPROM( pHwData );
+	if (EEPROM_region != REGION_AUTO)
+		psLOCAL->region = EEPROM_region;
+	else {
+		if (psLOCAL->region_INF != REGION_AUTO)
+			psLOCAL->region = psLOCAL->region_INF;
+		else
+			psLOCAL->region = REGION_USA;	//default setting
+	}
 
-		// Get Software setting flag from hal
-		Adapter->sLocalPara.boAntennaDiversity = FALSE;
-		if (hal_software_set(pHwData) & 0x00000001)
-			Adapter->sLocalPara.boAntennaDiversity = TRUE;
-
-		//
-		// For TS module
-		//
-		InitStep = 2;
-
-		// For MDS module
-		InitStep = 3;
-		Mds_initial(Adapter);
-
-		//=======================================
-		// Initialize the SME, SCAN, MLME, ROAM
-		//=======================================
-		InitStep = 4;
-		InitStep = 5;
-		InitStep = 6;
-
-		// If no user-defined address in the registry, use the addresss "burned" on the NIC instead.
-		pMacAddr = Adapter->sLocalPara.ThisMacAddress;
-		pMacAddr2 = Adapter->sLocalPara.PermanentAddress;
-		hal_get_permanent_address( pHwData, Adapter->sLocalPara.PermanentAddress );// Reading ethernet address from EEPROM
-		if (OS_MEMORY_COMPARE(pMacAddr, "\x00\x00\x00\x00\x00\x00", MAC_ADDR_LENGTH )) // Is equal
-		{
-			memcpy( pMacAddr, pMacAddr2, MAC_ADDR_LENGTH );
-		} else {
-			// Set the user define MAC address
-			hal_set_ethernet_address( pHwData, Adapter->sLocalPara.ThisMacAddress );
-		}
+	// Get Software setting flag from hal
+	Adapter->sLocalPara.boAntennaDiversity = FALSE;
+	if (hal_software_set(pHwData) & 0x00000001)
+		Adapter->sLocalPara.boAntennaDiversity = TRUE;
+
+	//
+	// For TS module
+	//
+	InitStep = 2;
+
+	// For MDS module
+	InitStep = 3;
+	Mds_initial(Adapter);
+
+	//=======================================
+	// Initialize the SME, SCAN, MLME, ROAM
+	//=======================================
+	InitStep = 4;
+	InitStep = 5;
+	InitStep = 6;
+
+	// If no user-defined address in the registry, use the addresss "burned" on the NIC instead.
+	pMacAddr = Adapter->sLocalPara.ThisMacAddress;
+	pMacAddr2 = Adapter->sLocalPara.PermanentAddress;
+	hal_get_permanent_address( pHwData, Adapter->sLocalPara.PermanentAddress );// Reading ethernet address from EEPROM
+	if (OS_MEMORY_COMPARE(pMacAddr, "\x00\x00\x00\x00\x00\x00", MAC_ADDR_LENGTH )) // Is equal
+	{
+		memcpy( pMacAddr, pMacAddr2, MAC_ADDR_LENGTH );
+	} else {
+		// Set the user define MAC address
+		hal_set_ethernet_address( pHwData, Adapter->sLocalPara.ThisMacAddress );
+	}
 
-		//get current antenna
-		psLOCAL->bAntennaNo = hal_get_antenna_number(pHwData);
+	//get current antenna
+	psLOCAL->bAntennaNo = hal_get_antenna_number(pHwData);
 #ifdef _PE_STATE_DUMP_
-		WBDEBUG(("Driver init, antenna no = %d\n", psLOCAL->bAntennaNo));
+	WBDEBUG(("Driver init, antenna no = %d\n", psLOCAL->bAntennaNo));
 #endif
-		hal_get_hw_radio_off( pHwData );
+	hal_get_hw_radio_off( pHwData );
 
-		// Waiting for HAL setting OK
-		while (!hal_idle(pHwData))
-			OS_SLEEP(10000);
+	// Waiting for HAL setting OK
+	while (!hal_idle(pHwData))
+		OS_SLEEP(10000);
 
-		MTO_Init(Adapter);
+	MTO_Init(Adapter);
 
-		HwRadioOff = hal_get_hw_radio_off( pHwData );
-		psLOCAL->RadioOffStatus.boHwRadioOff = !!HwRadioOff;
+	HwRadioOff = hal_get_hw_radio_off( pHwData );
+	psLOCAL->RadioOffStatus.boHwRadioOff = !!HwRadioOff;
 
-		hal_set_radio_mode( pHwData, (unsigned char)(psLOCAL->RadioOffStatus.boSwRadioOff || psLOCAL->RadioOffStatus.boHwRadioOff) );
+	hal_set_radio_mode( pHwData, (unsigned char)(psLOCAL->RadioOffStatus.boSwRadioOff || psLOCAL->RadioOffStatus.boHwRadioOff) );
 
-		hal_driver_init_OK(pHwData) = 1; // Notify hal that the driver is ready now.
-		//set a tx power for reference.....
-//		sme_set_tx_power_level(Adapter, 12);	FIXME?
-		return TRUE;
-	}
-	while(FALSE);
+	hal_driver_init_OK(pHwData) = 1; // Notify hal that the driver is ready now.
+	//set a tx power for reference.....
+//	sme_set_tx_power_level(Adapter, 12);	FIXME?
+	return TRUE;
 
+error:
 	switch (InitStep) {
 	case 5:
 	case 4:

drivers/staging/winbond/wblinux_s.h

@@ -24,8 +24,8 @@
 
 typedef struct _WBLINUX
 {
-	OS_SPIN_LOCK	AtomicSpinLock;
-	OS_SPIN_LOCK	SpinLock;
+	spinlock_t	AtomicSpinLock;
+	spinlock_t	SpinLock;
 	u32	shutdown;
 
 	OS_ATOMIC	ThreadCount;

drivers/staging/wlan-ng/Kconfig

@@ -1,6 +1,6 @@
 config PRISM2_USB
 	tristate "Prism2.5 USB driver"
-	depends on USB
+	depends on WLAN_80211 && USB
 	default n
 	---help---
 	  This is the wlan-ng prism 2.5 USB driver for a wide range of

drivers/staging/wlan-ng/hfa384x.h

@@ -824,7 +824,7 @@ PD Record codes
 #define		HFA384x_CMD_MACPORT_SET(value)		((UINT16)HFA384x_CMD_AINFO_SET(value))
 #define		HFA384x_CMD_ISRECL(value)		((UINT16)(HFA384x_CMD_AINFO_GET((UINT16)(value) & HFA384x_CMD_RECL)))
 #define		HFA384x_CMD_RECL_SET(value)		((UINT16)HFA384x_CMD_AINFO_SET(value))
-#define		HFA384x_CMD_QOS_GET(value)		((UINT16((((UINT16)(value))&((UINT16)0x3000)) >> 12))
+#define		HFA384x_CMD_QOS_GET(value)		((UINT16)((((UINT16)(value))&((UINT16)0x3000)) >> 12))
 #define		HFA384x_CMD_QOS_SET(value)		((UINT16)((((UINT16)(value)) << 12) & 0x3000))
 #define		HFA384x_CMD_ISWRITE(value)		((UINT16)(HFA384x_CMD_AINFO_GET((UINT16)(value) & HFA384x_CMD_WRITE)))
 #define		HFA384x_CMD_WRITE_SET(value)		((UINT16)HFA384x_CMD_AINFO_SET((UINT16)value))

drivers/staging/wlan-ng/p80211wep.c

@@ -64,7 +64,6 @@
 /*================================================================*/
 /* Project Includes */
 
-#include "version.h"
 #include "p80211hdr.h"
 #include "p80211types.h"
 #include "p80211msg.h"

drivers/staging/wlan-ng/prism2mib.c

@@ -90,8 +90,6 @@
 #include <linux/usb.h>
 //#endif
 
-#include "wlan_compat.h"
-
 /*================================================================*/
 /* Project Includes */
 

drivers/staging/wlan-ng/wlan_compat.h

@@ -245,11 +245,11 @@ typedef int64_t		INT64;
 #  define preempt_count() (0UL)
 #endif
 
-#define WLAN_LOG_ERROR(x,args...) printk(KERN_ERR "%s: " x , __FUNCTION__ , ##args);
+#define WLAN_LOG_ERROR(x,args...) printk(KERN_ERR "%s: " x , __func__ , ##args);
 
-#define WLAN_LOG_WARNING(x,args...) printk(KERN_WARNING "%s: " x , __FUNCTION__ , ##args);
+#define WLAN_LOG_WARNING(x,args...) printk(KERN_WARNING "%s: " x , __func__ , ##args);
 
-#define WLAN_LOG_NOTICE(x,args...) printk(KERN_NOTICE "%s: " x , __FUNCTION__ , ##args);
+#define WLAN_LOG_NOTICE(x,args...) printk(KERN_NOTICE "%s: " x , __func__ , ##args);
 
 #define WLAN_LOG_INFO(args... ) printk(KERN_INFO args)
 
@@ -265,7 +265,7 @@ typedef int64_t		INT64;
 	#define DBFENTER { if ( WLAN_DBVAR >= 5 ){ WLAN_LOG_DEBUG(3,"---->\n"); } }
 	#define DBFEXIT  { if ( WLAN_DBVAR >= 5 ){ WLAN_LOG_DEBUG(3,"<----\n"); } }
 
-	#define WLAN_LOG_DEBUG(l,x,args...) if ( WLAN_DBVAR >= (l)) printk(KERN_DEBUG "%s(%lu): " x ,  __FUNCTION__, (preempt_count() & PREEMPT_MASK), ##args );
+	#define WLAN_LOG_DEBUG(l,x,args...) if ( WLAN_DBVAR >= (l)) printk(KERN_DEBUG "%s(%lu): " x ,  __func__, (preempt_count() & PREEMPT_MASK), ##args );
 #else
 	#define WLAN_ASSERT(c)
 	#define WLAN_HEX_DUMP( l, s, p, n)