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@@ -116,6 +116,20 @@ static struct nand_ecclayout fsl_elbc_oob_lp_eccm1 = {
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.oobavail = 48,
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.oobavail = 48,
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};
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};
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+/*
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+ * fsl_elbc_oob_lp_eccm* specify that LP NAND's OOB free area starts at offset
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+ * 1, so we have to adjust bad block pattern. This pattern should be used for
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+ * x8 chips only. So far hardware does not support x16 chips anyway.
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+ */
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+static u8 scan_ff_pattern[] = { 0xff, };
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+
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+static struct nand_bbt_descr largepage_memorybased = {
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+ .options = 0,
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+ .offs = 0,
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+ .len = 1,
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+ .pattern = scan_ff_pattern,
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+};
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+
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/*=================================*/
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/*=================================*/
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/*
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/*
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@@ -687,6 +701,7 @@ static int fsl_elbc_chip_init_tail(struct mtd_info *mtd)
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chip->ecc.layout = (priv->fmr & FMR_ECCM) ?
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chip->ecc.layout = (priv->fmr & FMR_ECCM) ?
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&fsl_elbc_oob_lp_eccm1 :
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&fsl_elbc_oob_lp_eccm1 :
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&fsl_elbc_oob_lp_eccm0;
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&fsl_elbc_oob_lp_eccm0;
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+ chip->badblock_pattern = &largepage_memorybased;
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mtd->ecclayout = chip->ecc.layout;
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mtd->ecclayout = chip->ecc.layout;
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mtd->oobavail = chip->ecc.layout->oobavail;
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mtd->oobavail = chip->ecc.layout->oobavail;
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}
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}
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