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+/*
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+ * Copyright © 2012 Intel Corporation
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+ *
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+ * Permission is hereby granted, free of charge, to any person obtaining a
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+ * copy of this software and associated documentation files (the "Software"),
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+ * to deal in the Software without restriction, including without limitation
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+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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+ * and/or sell copies of the Software, and to permit persons to whom the
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+ * Software is furnished to do so, subject to the following conditions:
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+ *
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+ * The above copyright notice and this permission notice (including the next
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+ * paragraph) shall be included in all copies or substantial portions of the
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+ * Software.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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+ * IN THE SOFTWARE.
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+ *
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+ * Authors:
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+ * Eugeni Dodonov <eugeni.dodonov@intel.com>
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+ *
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+ */
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+
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+#include "i915_drv.h"
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+#include "intel_drv.h"
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+
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+/* HDMI/DVI modes ignore everything but the last 2 items. So we share
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+ * them for both DP and FDI transports, allowing those ports to
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+ * automatically adapt to HDMI connections as well
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+ */
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+static const u32 hsw_ddi_translations_dp[] = {
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+ 0x00FFFFFF, 0x0006000E, /* DP parameters */
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+ 0x00D75FFF, 0x0005000A,
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+ 0x00C30FFF, 0x00040006,
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+ 0x80AAAFFF, 0x000B0000,
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+ 0x00FFFFFF, 0x0005000A,
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+ 0x00D75FFF, 0x000C0004,
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+ 0x80C30FFF, 0x000B0000,
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+ 0x00FFFFFF, 0x00040006,
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+ 0x80D75FFF, 0x000B0000,
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+ 0x00FFFFFF, 0x00040006 /* HDMI parameters */
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+};
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+
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+static const u32 hsw_ddi_translations_fdi[] = {
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+ 0x00FFFFFF, 0x0007000E, /* FDI parameters */
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+ 0x00D75FFF, 0x000F000A,
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+ 0x00C30FFF, 0x00060006,
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+ 0x00AAAFFF, 0x001E0000,
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+ 0x00FFFFFF, 0x000F000A,
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+ 0x00D75FFF, 0x00160004,
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+ 0x00C30FFF, 0x001E0000,
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+ 0x00FFFFFF, 0x00060006,
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+ 0x00D75FFF, 0x001E0000,
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+ 0x00FFFFFF, 0x00040006 /* HDMI parameters */
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+};
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+
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+/* On Haswell, DDI port buffers must be programmed with correct values
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+ * in advance. The buffer values are different for FDI and DP modes,
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+ * but the HDMI/DVI fields are shared among those. So we program the DDI
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+ * in either FDI or DP modes only, as HDMI connections will work with both
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+ * of those
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+ */
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+void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port, bool use_fdi_mode)
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+{
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+ struct drm_i915_private *dev_priv = dev->dev_private;
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+ u32 reg;
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+ int i;
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+ const u32 *ddi_translations = ((use_fdi_mode) ?
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+ hsw_ddi_translations_fdi :
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+ hsw_ddi_translations_dp);
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+
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+ DRM_DEBUG_DRIVER("Initializing DDI buffers for port %c in %s mode\n",
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+ port_name(port),
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+ use_fdi_mode ? "FDI" : "DP");
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+
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+ WARN((use_fdi_mode && (port != PORT_E)),
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+ "Programming port %c in FDI mode, this probably will not work.\n",
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+ port_name(port));
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+
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+ for (i=0, reg=DDI_BUF_TRANS(port); i < ARRAY_SIZE(hsw_ddi_translations_fdi); i++) {
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+ I915_WRITE(reg, ddi_translations[i]);
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+ reg += 4;
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+ }
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+}
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+
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+/* Program DDI buffers translations for DP. By default, program ports A-D in DP
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+ * mode and port E for FDI.
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+ */
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+void intel_prepare_ddi(struct drm_device *dev)
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+{
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+ int port;
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+
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+ if (IS_HASWELL(dev)) {
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+ for (port = PORT_A; port < PORT_E; port++)
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+ intel_prepare_ddi_buffers(dev, port, false);
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+
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+ /* DDI E is the suggested one to work in FDI mode, so program is as such by
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+ * default. It will have to be re-programmed in case a digital DP output
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+ * will be detected on it
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+ */
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+ intel_prepare_ddi_buffers(dev, PORT_E, true);
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+ }
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+}
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