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@@ -1,5 +1,5 @@
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/*
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- * Copyright IBM Corp 2000,2009
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+ * Copyright IBM Corp 2000,2011
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* Author(s): Holger Smolinski <Holger.Smolinski@de.ibm.com>,
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* Denis Joseph Barrow,
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*/
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@@ -7,6 +7,64 @@
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#include <linux/linkage.h>
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#include <asm/asm-offsets.h>
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+#
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+# store_status
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+#
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+# Prerequisites to run this function:
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+# - Prefix register is set to zero
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+# - Original prefix register is stored in "dump_prefix_page"
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+# - Lowcore protection is off
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+#
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+ENTRY(store_status)
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+ /* Save register one and load save area base */
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+ stg %r1,__LC_SAVE_AREA_64(%r0)
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+ lghi %r1,SAVE_AREA_BASE
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+ /* General purpose registers */
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+ stmg %r0,%r15,__LC_GPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ lg %r2,__LC_SAVE_AREA_64(%r0)
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+ stg %r2,__LC_GPREGS_SAVE_AREA-SAVE_AREA_BASE+8(%r1)
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+ /* Control registers */
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+ stctg %c0,%c15,__LC_CREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ /* Access registers */
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+ stam %a0,%a15,__LC_AREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ /* Floating point registers */
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+ std %f0, 0x00 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ std %f1, 0x08 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ std %f2, 0x10 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ std %f3, 0x18 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ std %f4, 0x20 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ std %f5, 0x28 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ std %f6, 0x30 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ std %f7, 0x38 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ std %f8, 0x40 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ std %f9, 0x48 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ std %f10,0x50 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ std %f11,0x58 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ std %f12,0x60 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ std %f13,0x68 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ std %f14,0x70 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ std %f15,0x78 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ /* Floating point control register */
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+ stfpc __LC_FP_CREG_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ /* CPU timer */
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+ stpt __LC_CPU_TIMER_SAVE_AREA-SAVE_AREA_BASE(%r1)
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+ /* Saved prefix register */
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+ larl %r2,dump_prefix_page
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+ mvc __LC_PREFIX_SAVE_AREA-SAVE_AREA_BASE(4,%r1),0(%r2)
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+ /* Clock comparator - seven bytes */
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+ larl %r2,.Lclkcmp
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+ stckc 0(%r2)
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+ mvc __LC_CLOCK_COMP_SAVE_AREA-SAVE_AREA_BASE + 1(7,%r1),1(%r2)
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+ /* Program status word */
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+ epsw %r2,%r3
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+ st %r2,__LC_PSW_SAVE_AREA-SAVE_AREA_BASE + 0(%r1)
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+ st %r3,__LC_PSW_SAVE_AREA-SAVE_AREA_BASE + 4(%r1)
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+ larl %r2,store_status
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+ stg %r2,__LC_PSW_SAVE_AREA-SAVE_AREA_BASE + 8(%r1)
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+ br %r14
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+.align 8
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+.Lclkcmp: .quad 0x0000000000000000
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+
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#
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# do_reipl_asm
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# Parameter: r2 = schid of reipl device
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@@ -15,22 +73,7 @@
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ENTRY(do_reipl_asm)
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basr %r13,0
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.Lpg0: lpswe .Lnewpsw-.Lpg0(%r13)
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-.Lpg1: # do store status of all registers
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-
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- stg %r1,.Lregsave-.Lpg0(%r13)
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- lghi %r1,0x1000
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- stmg %r0,%r15,__LC_GPREGS_SAVE_AREA-0x1000(%r1)
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- lg %r0,.Lregsave-.Lpg0(%r13)
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- stg %r0,__LC_GPREGS_SAVE_AREA-0x1000+8(%r1)
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- stctg %c0,%c15,__LC_CREGS_SAVE_AREA-0x1000(%r1)
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- stam %a0,%a15,__LC_AREGS_SAVE_AREA-0x1000(%r1)
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- lg %r10,.Ldump_pfx-.Lpg0(%r13)
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- mvc __LC_PREFIX_SAVE_AREA-0x1000(4,%r1),0(%r10)
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- stfpc __LC_FP_CREG_SAVE_AREA-0x1000(%r1)
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- stckc .Lclkcmp-.Lpg0(%r13)
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- mvc __LC_CLOCK_COMP_SAVE_AREA-0x1000(7,%r1),.Lclkcmp-.Lpg0(%r13)
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- stpt __LC_CPU_TIMER_SAVE_AREA-0x1000(%r1)
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- stg %r13, __LC_PSW_SAVE_AREA-0x1000+8(%r1)
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+.Lpg1: brasl %r14,store_status
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lctlg %c6,%c6,.Lall-.Lpg0(%r13)
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lgr %r1,%r2
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@@ -67,10 +110,7 @@ ENTRY(do_reipl_asm)
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st %r14,.Ldispsw+12-.Lpg0(%r13)
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lpswe .Ldispsw-.Lpg0(%r13)
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.align 8
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-.Lclkcmp: .quad 0x0000000000000000
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.Lall: .quad 0x00000000ff000000
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-.Ldump_pfx: .quad dump_prefix_page
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-.Lregsave: .quad 0x0000000000000000
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.align 16
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/*
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* These addresses have to be 31 bit otherwise
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