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@@ -65,44 +65,33 @@ static inline unsigned long bmips_read_zscm_reg(unsigned int offset)
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{
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unsigned long ret;
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- __asm__ __volatile__(
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- ".set push\n"
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- ".set noreorder\n"
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- "cache %1, 0(%2)\n"
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- "sync\n"
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- "_ssnop\n"
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- "_ssnop\n"
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- "_ssnop\n"
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- "_ssnop\n"
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- "_ssnop\n"
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- "_ssnop\n"
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- "_ssnop\n"
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- "mfc0 %0, $28, 3\n"
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- "_ssnop\n"
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- ".set pop\n"
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- : "=&r" (ret)
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- : "i" (Index_Load_Tag_S), "r" (ZSCM_REG_BASE + offset)
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- : "memory");
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+ barrier();
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+ cache_op(Index_Load_Tag_S, ZSCM_REG_BASE + offset);
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+ __sync();
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+ _ssnop();
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+ _ssnop();
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+ _ssnop();
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+ _ssnop();
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+ _ssnop();
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+ _ssnop();
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+ _ssnop();
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+ ret = read_c0_ddatalo();
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+ _ssnop();
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+
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return ret;
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}
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static inline void bmips_write_zscm_reg(unsigned int offset, unsigned long data)
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{
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- __asm__ __volatile__(
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- ".set push\n"
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- ".set noreorder\n"
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- "mtc0 %0, $28, 3\n"
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- "_ssnop\n"
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- "_ssnop\n"
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- "_ssnop\n"
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- "cache %1, 0(%2)\n"
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- "_ssnop\n"
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- "_ssnop\n"
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- "_ssnop\n"
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- : /* no outputs */
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- : "r" (data),
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- "i" (Index_Store_Tag_S), "r" (ZSCM_REG_BASE + offset)
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- : "memory");
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+ write_c0_ddatalo(data);
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+ _ssnop();
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+ _ssnop();
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+ _ssnop();
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+ cache_op(Index_Store_Tag_S, ZSCM_REG_BASE + offset);
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+ _ssnop();
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+ _ssnop();
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+ _ssnop();
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+ barrier();
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}
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#endif /* !defined(__ASSEMBLY__) */
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