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@@ -499,15 +499,6 @@
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#define S626_CLKMULT_2X 1 /* 2x clock multiplier. */
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#define S626_CLKMULT_1X 2 /* 1x clock multiplier. */
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-/* Bit Field positions in COUNTER_SETUP structure: */
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-#define S626_BF_LOADSRC 9 /* Preload trigger. */
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-#define S626_BF_INDXSRC 7 /* Index source. */
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-#define S626_BF_INDXPOL 6 /* Index polarity. */
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-#define S626_BF_ENCMODE 4 /* Encoder mode. */
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-#define S626_BF_CLKPOL 3 /* Clock polarity/count direction. */
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-#define S626_BF_CLKMULT 1 /* Clock multiplier. */
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-#define S626_BF_CLKENAB 0 /* Clock enable. */
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-
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/* Enumerated counter clock multipliers. */
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#define S626_MULT_X0 0x0003 /* Supports no multipliers;
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