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@@ -727,15 +727,6 @@ static void sumo_enable_boost(struct radeon_device *rdev,
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sumo_boost_state_enable(rdev, false);
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}
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-static void sumo_update_current_power_levels(struct radeon_device *rdev,
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- struct radeon_ps *rps)
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-{
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- struct sumo_ps *new_ps = sumo_get_ps(rps);
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- struct sumo_power_info *pi = sumo_get_pi(rdev);
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-
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- pi->current_ps = *new_ps;
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-}
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-
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static void sumo_set_forced_level(struct radeon_device *rdev, u32 index)
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{
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WREG32_P(CG_SCLK_DPM_CTRL_3, FORCE_SCLK_STATE(index), ~FORCE_SCLK_STATE_MASK);
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@@ -1089,11 +1080,6 @@ static void sumo_apply_state_adjust_rules(struct radeon_device *rdev,
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u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */
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u32 i;
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- /* point to the hw copy since this function will modify the ps */
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- pi->hw_ps = *ps;
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- rdev->pm.dpm.hw_ps.ps_priv = &pi->hw_ps;
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- ps = &pi->hw_ps;
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-
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if (new_rps->class & ATOM_PPLIB_CLASSIFICATION_THERMAL)
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return sumo_patch_thermal_state(rdev, ps, current_ps);
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@@ -1192,6 +1178,28 @@ static int sumo_set_thermal_temperature_range(struct radeon_device *rdev,
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return 0;
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}
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+static void sumo_update_current_ps(struct radeon_device *rdev,
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+ struct radeon_ps *rps)
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+{
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+ struct sumo_ps *new_ps = sumo_get_ps(rps);
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+ struct sumo_power_info *pi = sumo_get_pi(rdev);
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+
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+ pi->current_rps = *rps;
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+ pi->current_ps = *new_ps;
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+ pi->current_rps.ps_priv = &pi->current_ps;
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+}
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+
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+static void sumo_update_requested_ps(struct radeon_device *rdev,
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+ struct radeon_ps *rps)
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+{
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+ struct sumo_ps *new_ps = sumo_get_ps(rps);
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+ struct sumo_power_info *pi = sumo_get_pi(rdev);
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+
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+ pi->requested_rps = *rps;
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+ pi->requested_ps = *new_ps;
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+ pi->requested_rps.ps_priv = &pi->requested_ps;
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+}
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+
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int sumo_dpm_enable(struct radeon_device *rdev)
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{
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struct sumo_power_info *pi = sumo_get_pi(rdev);
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@@ -1230,6 +1238,8 @@ int sumo_dpm_enable(struct radeon_device *rdev)
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radeon_irq_set(rdev);
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}
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+ sumo_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
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+
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return 0;
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}
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@@ -1252,19 +1262,34 @@ void sumo_dpm_disable(struct radeon_device *rdev)
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rdev->irq.dpm_thermal = false;
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radeon_irq_set(rdev);
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}
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+
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+ sumo_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
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}
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-int sumo_dpm_set_power_state(struct radeon_device *rdev)
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+int sumo_dpm_pre_set_power_state(struct radeon_device *rdev)
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{
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struct sumo_power_info *pi = sumo_get_pi(rdev);
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- struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps;
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- struct radeon_ps *old_ps = rdev->pm.dpm.current_ps;
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+ struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps;
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+ struct radeon_ps *new_ps = &requested_ps;
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+
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+ sumo_update_requested_ps(rdev, new_ps);
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if (pi->enable_dynamic_patch_ps)
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- sumo_apply_state_adjust_rules(rdev, new_ps, old_ps);
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+ sumo_apply_state_adjust_rules(rdev,
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+ &pi->requested_rps,
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+ &pi->current_rps);
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+
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+ return 0;
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+}
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+
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+int sumo_dpm_set_power_state(struct radeon_device *rdev)
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+{
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+ struct sumo_power_info *pi = sumo_get_pi(rdev);
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+ struct radeon_ps *new_ps = &pi->requested_rps;
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+ struct radeon_ps *old_ps = &pi->current_rps;
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+
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if (pi->enable_dpm)
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sumo_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps);
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- sumo_update_current_power_levels(rdev, new_ps);
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if (pi->enable_boost) {
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sumo_enable_boost(rdev, new_ps, false);
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sumo_patch_boost_state(rdev, new_ps);
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@@ -1293,6 +1318,14 @@ int sumo_dpm_set_power_state(struct radeon_device *rdev)
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return 0;
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}
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+void sumo_dpm_post_set_power_state(struct radeon_device *rdev)
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+{
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+ struct sumo_power_info *pi = sumo_get_pi(rdev);
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+ struct radeon_ps *new_ps = &pi->requested_rps;
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+
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+ sumo_update_current_ps(rdev, new_ps);
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+}
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+
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void sumo_dpm_reset_asic(struct radeon_device *rdev)
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{
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sumo_program_bootup_state(rdev);
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@@ -1751,7 +1784,8 @@ void sumo_dpm_fini(struct radeon_device *rdev)
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u32 sumo_dpm_get_sclk(struct radeon_device *rdev, bool low)
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{
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- struct sumo_ps *requested_state = sumo_get_ps(rdev->pm.dpm.requested_ps);
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+ struct sumo_power_info *pi = sumo_get_pi(rdev);
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+ struct sumo_ps *requested_state = sumo_get_ps(&pi->requested_rps);
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if (low)
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return requested_state->levels[0].sclk;
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