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@@ -18,6 +18,7 @@
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#include <asm/hardware/gic.h>
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#include <asm/cacheflush.h>
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+#include <asm/cputype.h>
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#include <asm/mach-types.h>
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#include <mach/msm_iomap.h>
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@@ -40,6 +41,12 @@ volatile int pen_release = -1;
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static DEFINE_SPINLOCK(boot_lock);
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+static inline int get_core_count(void)
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+{
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+ /* 1 + the PART[1:0] field of MIDR */
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+ return ((read_cpuid_id() >> 4) & 3) + 1;
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+}
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+
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void __cpuinit platform_secondary_init(unsigned int cpu)
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{
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/* Configure edge-triggered PPIs */
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@@ -147,9 +154,9 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
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*/
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void __init smp_init_cpus(void)
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{
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- unsigned int i;
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+ unsigned int i, ncores = get_core_count();
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- for (i = 0; i < NR_CPUS; i++)
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+ for (i = 0; i < ncores; i++)
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set_cpu_possible(i, true);
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set_smp_cross_call(gic_raise_softirq);
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