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@@ -166,19 +166,16 @@ enum {
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/*
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* Register's bits
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*/
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-#if defined(CONFIG_CPU_SUBTYPE_SH7734) || defined(CONFIG_CPU_SUBTYPE_SH7763) ||\
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- defined(CONFIG_ARCH_R8A7740)
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-/* EDSR */
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+/* EDSR : sh7734, sh7757, sh7763, and r8a7740 only */
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enum EDSR_BIT {
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EDSR_ENT = 0x01, EDSR_ENR = 0x02,
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};
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#define EDSR_ENALL (EDSR_ENT|EDSR_ENR)
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-/* GECMR */
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+/* GECMR : sh7734, sh7763 and r8a7740 only */
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enum GECMR_BIT {
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GECMR_10 = 0x0, GECMR_100 = 0x04, GECMR_1000 = 0x01,
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};
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-#endif
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/* EDMR */
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enum DMAC_M_BIT {
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