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@@ -17,6 +17,7 @@
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* Base + 0x00 IRQ Status
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* Base + 0x01 IRQ control
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* Base + 0x02 Chipset control
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+ * Base + 0x03 Unknown
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* Base + 0x04 VDMA and reset control + wait bits
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* Base + 0x08 BMIMBA
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* Base + 0x0C DMA Length
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@@ -174,8 +175,12 @@ static int ninja32_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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ata_std_ports(&ap->ioaddr);
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iowrite8(0x05, base + 0x01); /* Enable interrupt lines */
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- iowrite8(0xB3, base + 0x02); /* Burst, ?? setup */
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- iowrite8(0x00, base + 0x04); /* WAIT0 ? */
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+ iowrite8(0xBE, base + 0x02); /* Burst, ?? setup */
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+ iowrite8(0x01, base + 0x03); /* Unknown */
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+ iowrite8(0x20, base + 0x04); /* WAIT0 */
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+ iowrite8(0x8f, base + 0x05); /* Unknown */
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+ iowrite8(0xa4, base + 0x1c); /* Unknown */
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+ iowrite8(0x83, base + 0x1d); /* BMDMA control: WAIT0 */
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/* FIXME: Should we disable them at remove ? */
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return ata_host_activate(host, dev->irq, ata_interrupt,
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IRQF_SHARED, &ninja32_sht);
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