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@@ -33,8 +33,8 @@
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#include <linux/delay.h>
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#include <linux/edac.h>
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#include <linux/mmzone.h>
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-#include <linux/edac_mce.h>
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#include <linux/smp.h>
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+#include <asm/mce.h>
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#include <asm/processor.h>
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#include "edac_core.h"
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@@ -265,9 +265,6 @@ struct i7core_pvt {
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bool is_registered, enable_scrub;
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- /* mcelog glue */
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- struct edac_mce edac_mce;
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-
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/* Fifo double buffers */
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struct mce mce_entry[MCE_LOG_LEN];
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struct mce mce_outentry[MCE_LOG_LEN];
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@@ -1899,33 +1896,43 @@ check_ce_error:
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* WARNING: As this routine should be called at NMI time, extra care should
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* be taken to avoid deadlocks, and to be as fast as possible.
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*/
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-static int i7core_mce_check_error(void *priv, struct mce *mce)
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+static int i7core_mce_check_error(struct notifier_block *nb, unsigned long val,
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+ void *data)
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{
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- struct mem_ctl_info *mci = priv;
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- struct i7core_pvt *pvt = mci->pvt_info;
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+ struct mce *mce = (struct mce *)data;
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+ struct i7core_dev *i7_dev;
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+ struct mem_ctl_info *mci;
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+ struct i7core_pvt *pvt;
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+
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+ i7_dev = get_i7core_dev(mce->socketid);
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+ if (!i7_dev)
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+ return NOTIFY_BAD;
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+
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+ mci = i7_dev->mci;
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+ pvt = mci->pvt_info;
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/*
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* Just let mcelog handle it if the error is
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* outside the memory controller
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*/
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if (((mce->status & 0xffff) >> 7) != 1)
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- return 0;
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+ return NOTIFY_DONE;
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/* Bank 8 registers are the only ones that we know how to handle */
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if (mce->bank != 8)
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- return 0;
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+ return NOTIFY_DONE;
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#ifdef CONFIG_SMP
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/* Only handle if it is the right mc controller */
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if (mce->socketid != pvt->i7core_dev->socket)
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- return 0;
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+ return NOTIFY_DONE;
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#endif
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smp_rmb();
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if ((pvt->mce_out + 1) % MCE_LOG_LEN == pvt->mce_in) {
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smp_wmb();
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pvt->mce_overrun++;
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- return 0;
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+ return NOTIFY_DONE;
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}
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/* Copy memory error at the ringbuffer */
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@@ -1938,9 +1945,13 @@ static int i7core_mce_check_error(void *priv, struct mce *mce)
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i7core_check_error(mci);
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/* Advise mcelog that the errors were handled */
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- return 1;
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+ return NOTIFY_STOP;
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}
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+static struct notifier_block i7_mce_dec = {
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+ .notifier_call = i7core_mce_check_error,
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+};
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+
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/*
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* set_sdram_scrub_rate This routine sets byte/sec bandwidth scrub rate
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* to hardware according to SCRUBINTERVAL formula
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@@ -2093,8 +2104,7 @@ static void i7core_unregister_mci(struct i7core_dev *i7core_dev)
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if (pvt->enable_scrub)
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disable_sdram_scrub_setting(mci);
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- /* Disable MCE NMI handler */
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- edac_mce_unregister(&pvt->edac_mce);
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+ atomic_notifier_chain_unregister(&x86_mce_decoder_chain, &i7_mce_dec);
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/* Disable EDAC polling */
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i7core_pci_ctl_release(pvt);
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@@ -2193,21 +2203,10 @@ static int i7core_register_mci(struct i7core_dev *i7core_dev)
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/* allocating generic PCI control info */
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i7core_pci_ctl_create(pvt);
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- /* Registers on edac_mce in order to receive memory errors */
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- pvt->edac_mce.priv = mci;
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- pvt->edac_mce.check_error = i7core_mce_check_error;
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- rc = edac_mce_register(&pvt->edac_mce);
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- if (unlikely(rc < 0)) {
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- debugf0("MC: " __FILE__
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- ": %s(): failed edac_mce_register()\n", __func__);
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- goto fail1;
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- }
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+ atomic_notifier_chain_register(&x86_mce_decoder_chain, &i7_mce_dec);
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return 0;
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-fail1:
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- i7core_pci_ctl_release(pvt);
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- edac_mc_del_mc(mci->dev);
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fail0:
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kfree(mci->ctl_name);
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edac_mc_free(mci);
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Borislav Petkov