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@@ -14,6 +14,9 @@
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which debugging register was responsible for the trap. The other bits
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which debugging register was responsible for the trap. The other bits
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are either reserved or not of interest to us. */
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are either reserved or not of interest to us. */
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+/* Define reserved bits in DR6 which are always set to 1 */
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+#define DR6_RESERVED (0xFFFF0FF0)
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+
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#define DR_TRAP0 (0x1) /* db0 */
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#define DR_TRAP0 (0x1) /* db0 */
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#define DR_TRAP1 (0x2) /* db1 */
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#define DR_TRAP1 (0x2) /* db1 */
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#define DR_TRAP2 (0x4) /* db2 */
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#define DR_TRAP2 (0x4) /* db2 */
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