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@@ -1258,13 +1258,9 @@ static int dma_set_runtime_config(struct dma_chan *chan,
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cctl |= burst << PL080_CONTROL_DB_SIZE_SHIFT;
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if (plchan->runtime_direction == DMA_DEV_TO_MEM) {
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- plchan->src_cctl = pl08x_cctl(cctl) | PL080_CONTROL_DST_INCR |
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- pl08x_select_bus(plchan->cd->periph_buses,
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- pl08x->mem_buses);
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+ plchan->src_cctl = pl08x_cctl(cctl);
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} else {
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- plchan->dst_cctl = pl08x_cctl(cctl) | PL080_CONTROL_SRC_INCR |
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- pl08x_select_bus(pl08x->mem_buses,
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- plchan->cd->periph_buses);
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+ plchan->dst_cctl = pl08x_cctl(cctl);
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}
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dev_dbg(&pl08x->adev->dev,
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@@ -1451,6 +1447,8 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
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struct scatterlist *sg;
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dma_addr_t slave_addr;
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int ret, tmp;
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+ u8 src_buses, dst_buses;
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+ u32 cctl;
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dev_dbg(&pl08x->adev->dev, "%s prepare transaction of %d bytes from %s\n",
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__func__, sg_dma_len(sgl), plchan->name);
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@@ -1474,11 +1472,15 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
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txd->direction = direction;
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if (direction == DMA_MEM_TO_DEV) {
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- txd->cctl = plchan->dst_cctl;
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+ cctl = plchan->dst_cctl | PL080_CONTROL_SRC_INCR;
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slave_addr = plchan->cfg.dst_addr;
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+ src_buses = pl08x->mem_buses;
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+ dst_buses = plchan->cd->periph_buses;
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} else if (direction == DMA_DEV_TO_MEM) {
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- txd->cctl = plchan->src_cctl;
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+ cctl = plchan->src_cctl | PL080_CONTROL_DST_INCR;
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slave_addr = plchan->cfg.src_addr;
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+ src_buses = plchan->cd->periph_buses;
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+ dst_buses = pl08x->mem_buses;
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} else {
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pl08x_free_txd(pl08x, txd);
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dev_err(&pl08x->adev->dev,
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@@ -1486,6 +1488,8 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
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return NULL;
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}
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+ txd->cctl = cctl | pl08x_select_bus(src_buses, dst_buses);
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+
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if (plchan->cfg.device_fc)
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tmp = (direction == DMA_MEM_TO_DEV) ? PL080_FLOW_MEM2PER_PER :
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PL080_FLOW_PER2MEM_PER;
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@@ -1785,10 +1789,8 @@ static void pl08x_dma_slave_init(struct pl08x_dma_chan *chan)
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chan->name = chan->cd->bus_id;
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chan->cfg.src_addr = chan->cd->addr;
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chan->cfg.dst_addr = chan->cd->addr;
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- chan->src_cctl = cctl | PL080_CONTROL_DST_INCR |
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- pl08x_select_bus(chan->cd->periph_buses, chan->host->mem_buses);
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- chan->dst_cctl = cctl | PL080_CONTROL_SRC_INCR |
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- pl08x_select_bus(chan->host->mem_buses, chan->cd->periph_buses);
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+ chan->src_cctl = cctl;
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+ chan->dst_cctl = cctl;
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}
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/*
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