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@@ -84,11 +84,22 @@ static const unsigned long omap1_mcbsp_port[][2] = {
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static const int omap1_dma_reqs[][2] = {};
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static const unsigned long omap1_mcbsp_port[][2] = {};
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#endif
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-#if defined(CONFIG_ARCH_OMAP2420)
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-static const int omap2420_dma_reqs[][2] = {
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+
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+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
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+static const int omap24xx_dma_reqs[][2] = {
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{ OMAP24XX_DMA_MCBSP1_TX, OMAP24XX_DMA_MCBSP1_RX },
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{ OMAP24XX_DMA_MCBSP2_TX, OMAP24XX_DMA_MCBSP2_RX },
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+#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP34XX)
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+ { OMAP24XX_DMA_MCBSP3_TX, OMAP24XX_DMA_MCBSP3_RX },
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+ { OMAP24XX_DMA_MCBSP4_TX, OMAP24XX_DMA_MCBSP4_RX },
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+ { OMAP24XX_DMA_MCBSP5_TX, OMAP24XX_DMA_MCBSP5_RX },
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+#endif
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};
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+#else
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+static const int omap24xx_dma_reqs[][2] = {};
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+#endif
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+
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+#if defined(CONFIG_ARCH_OMAP2420)
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static const unsigned long omap2420_mcbsp_port[][2] = {
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{ OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1,
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OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1 },
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@@ -96,10 +107,43 @@ static const unsigned long omap2420_mcbsp_port[][2] = {
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OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1 },
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};
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#else
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-static const int omap2420_dma_reqs[][2] = {};
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static const unsigned long omap2420_mcbsp_port[][2] = {};
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#endif
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+#if defined(CONFIG_ARCH_OMAP2430)
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+static const unsigned long omap2430_mcbsp_port[][2] = {
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+ { OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR,
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+ OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR },
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+ { OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR,
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+ OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR },
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+ { OMAP2430_MCBSP3_BASE + OMAP_MCBSP_REG_DXR,
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+ OMAP2430_MCBSP3_BASE + OMAP_MCBSP_REG_DRR },
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+ { OMAP2430_MCBSP4_BASE + OMAP_MCBSP_REG_DXR,
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+ OMAP2430_MCBSP4_BASE + OMAP_MCBSP_REG_DRR },
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+ { OMAP2430_MCBSP5_BASE + OMAP_MCBSP_REG_DXR,
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+ OMAP2430_MCBSP5_BASE + OMAP_MCBSP_REG_DRR },
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+};
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+#else
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+static const unsigned long omap2430_mcbsp_port[][2] = {};
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+#endif
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+
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+#if defined(CONFIG_ARCH_OMAP34XX)
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+static const unsigned long omap34xx_mcbsp_port[][2] = {
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+ { OMAP34XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR,
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+ OMAP34XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR },
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+ { OMAP34XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR,
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+ OMAP34XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR },
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+ { OMAP34XX_MCBSP3_BASE + OMAP_MCBSP_REG_DXR,
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+ OMAP34XX_MCBSP3_BASE + OMAP_MCBSP_REG_DRR },
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+ { OMAP34XX_MCBSP4_BASE + OMAP_MCBSP_REG_DXR,
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+ OMAP34XX_MCBSP4_BASE + OMAP_MCBSP_REG_DRR },
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+ { OMAP34XX_MCBSP5_BASE + OMAP_MCBSP_REG_DXR,
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+ OMAP34XX_MCBSP5_BASE + OMAP_MCBSP_REG_DRR },
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+};
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+#else
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+static const unsigned long omap34xx_mcbsp_port[][2] = {};
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+#endif
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+
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static int omap_mcbsp_dai_startup(struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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@@ -167,12 +211,15 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream,
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dma = omap1_dma_reqs[bus_id][substream->stream];
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port = omap1_mcbsp_port[bus_id][substream->stream];
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} else if (cpu_is_omap2420()) {
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- dma = omap2420_dma_reqs[bus_id][substream->stream];
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+ dma = omap24xx_dma_reqs[bus_id][substream->stream];
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port = omap2420_mcbsp_port[bus_id][substream->stream];
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+ } else if (cpu_is_omap2430()) {
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+ dma = omap24xx_dma_reqs[bus_id][substream->stream];
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+ port = omap2430_mcbsp_port[bus_id][substream->stream];
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+ } else if (cpu_is_omap343x()) {
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+ dma = omap24xx_dma_reqs[bus_id][substream->stream];
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+ port = omap34xx_mcbsp_port[bus_id][substream->stream];
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} else {
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- /*
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- * TODO: Add support for 2430 and 3430
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- */
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return -ENODEV;
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}
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omap_mcbsp_dai_dma_params[id][substream->stream].dma_req = dma;
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@@ -315,7 +362,7 @@ static int omap_mcbsp_dai_set_clks_src(struct omap_mcbsp_data *mcbsp_data,
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int clk_id)
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{
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int sel_bit;
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- u16 reg;
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+ u16 reg, reg_devconf1 = OMAP243X_CONTROL_DEVCONF1;
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if (cpu_class_is_omap1()) {
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/* OMAP1's can use only external source clock */
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@@ -325,6 +372,12 @@ static int omap_mcbsp_dai_set_clks_src(struct omap_mcbsp_data *mcbsp_data,
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return 0;
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}
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+ if (cpu_is_omap2420() && mcbsp_data->bus_id > 1)
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+ return -EINVAL;
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+
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+ if (cpu_is_omap343x())
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+ reg_devconf1 = OMAP343X_CONTROL_DEVCONF1;
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+
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switch (mcbsp_data->bus_id) {
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case 0:
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reg = OMAP2_CONTROL_DEVCONF0;
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@@ -334,20 +387,26 @@ static int omap_mcbsp_dai_set_clks_src(struct omap_mcbsp_data *mcbsp_data,
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reg = OMAP2_CONTROL_DEVCONF0;
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sel_bit = 6;
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break;
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- /* TODO: Support for ports 3 - 5 in OMAP2430 and OMAP34xx */
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+ case 2:
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+ reg = reg_devconf1;
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+ sel_bit = 0;
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+ break;
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+ case 3:
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+ reg = reg_devconf1;
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+ sel_bit = 2;
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+ break;
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+ case 4:
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+ reg = reg_devconf1;
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+ sel_bit = 4;
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+ break;
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default:
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return -EINVAL;
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}
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- if (cpu_class_is_omap2()) {
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- if (clk_id == OMAP_MCBSP_SYSCLK_CLKS_FCLK) {
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- omap_ctrl_writel(omap_ctrl_readl(reg) &
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- ~(1 << sel_bit), reg);
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- } else {
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- omap_ctrl_writel(omap_ctrl_readl(reg) |
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- (1 << sel_bit), reg);
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- }
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- }
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+ if (clk_id == OMAP_MCBSP_SYSCLK_CLKS_FCLK)
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+ omap_ctrl_writel(omap_ctrl_readl(reg) & ~(1 << sel_bit), reg);
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+ else
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+ omap_ctrl_writel(omap_ctrl_readl(reg) | (1 << sel_bit), reg);
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return 0;
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}
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