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@@ -114,7 +114,7 @@ static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc)
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pr_devel("axon_msi: woff %x roff %x msi %x\n",
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write_offset, msic->read_offset, msi);
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- if (msi < NR_IRQS && irq_get_chip_data(msi) == msic) {
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+ if (msi < nr_irqs && irq_get_chip_data(msi) == msic) {
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generic_handle_irq(msi);
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msic->fifo_virt[idx] = cpu_to_le32(0xffffffff);
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} else {
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@@ -276,9 +276,6 @@ static int axon_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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if (rc)
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return rc;
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- /* We rely on being able to stash a virq in a u16 */
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- BUILD_BUG_ON(NR_IRQS > 65536);
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-
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list_for_each_entry(entry, &dev->msi_list, list) {
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virq = irq_create_direct_mapping(msic->irq_domain);
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if (virq == NO_IRQ) {
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@@ -392,7 +389,8 @@ static int axon_msi_probe(struct platform_device *device)
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}
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memset(msic->fifo_virt, 0xff, MSIC_FIFO_SIZE_BYTES);
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- msic->irq_domain = irq_domain_add_nomap(dn, 0, &msic_host_ops, msic);
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+ /* We rely on being able to stash a virq in a u16, so limit irqs to < 65536 */
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+ msic->irq_domain = irq_domain_add_nomap(dn, 65536, &msic_host_ops, msic);
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if (!msic->irq_domain) {
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printk(KERN_ERR "axon_msi: couldn't allocate irq_domain for %s\n",
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dn->full_name);
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