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@@ -266,6 +266,7 @@ static struct tegra_dma_desc *tegra_dma_desc_get(
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if (async_tx_test_ack(&dma_desc->txd)) {
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list_del(&dma_desc->node);
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spin_unlock_irqrestore(&tdc->lock, flags);
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+ dma_desc->txd.flags = 0;
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return dma_desc;
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}
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}
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@@ -1050,7 +1051,9 @@ struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic(
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TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT;
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ahb_seq |= TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32;
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- csr |= TEGRA_APBDMA_CSR_FLOW | TEGRA_APBDMA_CSR_IE_EOC;
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+ csr |= TEGRA_APBDMA_CSR_FLOW;
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+ if (flags & DMA_PREP_INTERRUPT)
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+ csr |= TEGRA_APBDMA_CSR_IE_EOC;
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csr |= tdc->dma_sconfig.slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT;
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apb_seq |= TEGRA_APBDMA_APBSEQ_WRAP_WORD_1;
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@@ -1095,7 +1098,8 @@ struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic(
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mem += len;
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}
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sg_req->last_sg = true;
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- dma_desc->txd.flags = 0;
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+ if (flags & DMA_CTRL_ACK)
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+ dma_desc->txd.flags = DMA_CTRL_ACK;
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/*
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* Make sure that mode should not be conflicting with currently
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