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@@ -5353,6 +5353,11 @@ static int tg3_reset_hw(struct tg3 *tp)
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gpio_mask = GRC_LCLCTRL_GPIO_OE0 | GRC_LCLCTRL_GPIO_OE2 |
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gpio_mask = GRC_LCLCTRL_GPIO_OE0 | GRC_LCLCTRL_GPIO_OE2 |
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GRC_LCLCTRL_GPIO_OUTPUT0 | GRC_LCLCTRL_GPIO_OUTPUT2;
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GRC_LCLCTRL_GPIO_OUTPUT0 | GRC_LCLCTRL_GPIO_OUTPUT2;
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+
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+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
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+ gpio_mask |= GRC_LCLCTRL_GPIO_OE3 |
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+ GRC_LCLCTRL_GPIO_OUTPUT3;
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+
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tp->grc_local_ctrl |= tr32(GRC_LOCAL_CTRL) & gpio_mask;
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tp->grc_local_ctrl |= tr32(GRC_LOCAL_CTRL) & gpio_mask;
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/* GPIO1 must be driven high for eeprom write protect */
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/* GPIO1 must be driven high for eeprom write protect */
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@@ -8077,6 +8082,11 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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(tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT))
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(tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT))
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tp->grc_local_ctrl |= (GRC_LCLCTRL_GPIO_OE1 |
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tp->grc_local_ctrl |= (GRC_LCLCTRL_GPIO_OE1 |
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GRC_LCLCTRL_GPIO_OUTPUT1);
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GRC_LCLCTRL_GPIO_OUTPUT1);
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+ /* Unused GPIO3 must be driven as output on 5752 because there
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+ * are no pull-up resistors on unused GPIO pins.
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+ */
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+ else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
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+ tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_OE3;
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/* Force the chip into D0. */
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/* Force the chip into D0. */
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err = tg3_set_power_state(tp, 0);
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err = tg3_set_power_state(tp, 0);
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