فهرست منبع

sdhci: Add quirk for controllers that need small delays for PIO

Small udelay is needed to make eSDHC work in PIO mode. Without
the delay reading causes endless interrupt storm, and writing
corrupts data. The first guess would be that we must wait for
some bit in some register, but I didn't find any reliable bits
that change before and after the delay.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Anton Vorontsov 16 سال پیش
والد
کامیت
3e3bf20756
2فایلهای تغییر یافته به همراه5 افزوده شده و 0 حذف شده
  1. 3 0
      drivers/mmc/host/sdhci.c
  2. 2 0
      drivers/mmc/host/sdhci.h

+ 3 - 0
drivers/mmc/host/sdhci.c

@@ -336,6 +336,9 @@ static void sdhci_transfer_pio(struct sdhci_host *host)
 		mask = ~0;
 		mask = ~0;
 
 
 	while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
 	while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
+		if (host->quirks & SDHCI_QUIRK_PIO_NEEDS_DELAY)
+			udelay(100);
+
 		if (host->data->flags & MMC_DATA_READ)
 		if (host->data->flags & MMC_DATA_READ)
 			sdhci_read_block_pio(host);
 			sdhci_read_block_pio(host);
 		else
 		else

+ 2 - 0
drivers/mmc/host/sdhci.h

@@ -220,6 +220,8 @@ struct sdhci_host {
 #define SDHCI_QUIRK_INVERTED_WRITE_PROTECT		(1<<16)
 #define SDHCI_QUIRK_INVERTED_WRITE_PROTECT		(1<<16)
 /* Controller has nonstandard clock management */
 /* Controller has nonstandard clock management */
 #define SDHCI_QUIRK_NONSTANDARD_CLOCK			(1<<17)
 #define SDHCI_QUIRK_NONSTANDARD_CLOCK			(1<<17)
+/* Controller does not like fast PIO transfers */
+#define SDHCI_QUIRK_PIO_NEEDS_DELAY			(1<<18)
 
 
 	int			irq;		/* Device IRQ */
 	int			irq;		/* Device IRQ */
 	void __iomem *		ioaddr;		/* Mapped address */
 	void __iomem *		ioaddr;		/* Mapped address */