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@@ -925,6 +925,16 @@ qla2x00_setup_chip(scsi_qla_host_t *ha)
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{
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int rval;
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uint32_t srisc_address = 0;
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+ struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
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+ unsigned long flags;
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+
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+ if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
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+ /* Disable SRAM, Instruction RAM and GP RAM parity. */
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+ spin_lock_irqsave(&ha->hardware_lock, flags);
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+ WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0));
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+ RD_REG_WORD(®->hccr);
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+ spin_unlock_irqrestore(&ha->hardware_lock, flags);
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+ }
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/* Load firmware sequences */
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rval = ha->isp_ops->load_risc(ha, &srisc_address);
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@@ -968,6 +978,19 @@ qla2x00_setup_chip(scsi_qla_host_t *ha)
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}
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}
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+ if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
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+ /* Enable proper parity. */
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+ spin_lock_irqsave(&ha->hardware_lock, flags);
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+ if (IS_QLA2300(ha))
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+ /* SRAM parity */
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+ WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1);
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+ else
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+ /* SRAM, Instruction RAM and GP RAM parity */
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+ WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7);
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+ RD_REG_WORD(®->hccr);
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+ spin_unlock_irqrestore(&ha->hardware_lock, flags);
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+ }
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+
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if (rval) {
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DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
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ha->host_no));
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@@ -3344,60 +3367,15 @@ static int
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qla2x00_restart_isp(scsi_qla_host_t *ha)
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{
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uint8_t status = 0;
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- struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
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- unsigned long flags = 0;
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uint32_t wait_time;
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/* If firmware needs to be loaded */
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if (qla2x00_isp_firmware(ha)) {
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ha->flags.online = 0;
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- if (!(status = ha->isp_ops->chip_diag(ha))) {
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- if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
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- status = qla2x00_setup_chip(ha);
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- goto done;
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- }
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-
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- spin_lock_irqsave(&ha->hardware_lock, flags);
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-
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- if (!IS_QLA24XX(ha) && !IS_QLA54XX(ha) &&
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- !IS_QLA25XX(ha)) {
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- /*
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- * Disable SRAM, Instruction RAM and GP RAM
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- * parity.
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- */
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- WRT_REG_WORD(®->hccr,
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- (HCCR_ENABLE_PARITY + 0x0));
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- RD_REG_WORD(®->hccr);
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- }
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-
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- spin_unlock_irqrestore(&ha->hardware_lock, flags);
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-
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+ if (!(status = ha->isp_ops->chip_diag(ha)))
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status = qla2x00_setup_chip(ha);
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-
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- spin_lock_irqsave(&ha->hardware_lock, flags);
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-
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- if (!IS_QLA24XX(ha) && !IS_QLA54XX(ha) &&
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- !IS_QLA25XX(ha)) {
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- /* Enable proper parity */
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- if (IS_QLA2300(ha))
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- /* SRAM parity */
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- WRT_REG_WORD(®->hccr,
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- (HCCR_ENABLE_PARITY + 0x1));
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- else
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- /*
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- * SRAM, Instruction RAM and GP RAM
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- * parity.
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- */
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- WRT_REG_WORD(®->hccr,
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- (HCCR_ENABLE_PARITY + 0x7));
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- RD_REG_WORD(®->hccr);
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- }
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-
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- spin_unlock_irqrestore(&ha->hardware_lock, flags);
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- }
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}
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- done:
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if (!status && !(status = qla2x00_init_rings(ha))) {
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clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
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if (!(status = qla2x00_fw_ready(ha))) {
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