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@@ -302,7 +302,7 @@ struct ni_gpct_device *ni_gpct_device_construct(struct comedi_device *dev,
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ni_gpct_register
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reg),
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unsigned (*read_register)
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- (struct ni_gpct * counter,
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+ (struct ni_gpct *counter,
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enum ni_gpct_register reg),
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enum ni_gpct_variant variant,
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unsigned num_counters)
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@@ -332,6 +332,7 @@ struct ni_gpct_device *ni_gpct_device_construct(struct comedi_device *dev,
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counter_dev->num_counters = num_counters;
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return counter_dev;
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}
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+EXPORT_SYMBOL_GPL(ni_gpct_device_construct);
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void ni_gpct_device_destroy(struct ni_gpct_device *counter_dev)
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{
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@@ -340,6 +341,7 @@ void ni_gpct_device_destroy(struct ni_gpct_device *counter_dev)
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kfree(counter_dev->counters);
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kfree(counter_dev);
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}
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+EXPORT_SYMBOL_GPL(ni_gpct_device_destroy);
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static int ni_tio_second_gate_registers_present(const struct ni_gpct_device
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*counter_dev)
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@@ -418,6 +420,7 @@ void ni_tio_init_counter(struct ni_gpct *counter)
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NITIO_Gi_Interrupt_Enable_Reg(counter->counter_index),
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~0, 0x0);
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}
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+EXPORT_SYMBOL_GPL(ni_tio_init_counter);
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static unsigned int ni_tio_counter_status(struct ni_gpct *counter)
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{
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@@ -446,9 +449,7 @@ static void ni_tio_set_sync_mode(struct ni_gpct *counter, int force_alt_sync)
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if (ni_tio_counting_mode_registers_present(counter_dev) == 0)
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return;
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- switch (ni_tio_get_soft_copy(counter,
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- counting_mode_reg) & Gi_Counting_Mode_Mask)
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- {
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+ switch (ni_tio_get_soft_copy(counter, counting_mode_reg) & Gi_Counting_Mode_Mask) {
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case Gi_Counting_Mode_QuadratureX1_Bits:
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case Gi_Counting_Mode_QuadratureX2_Bits:
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case Gi_Counting_Mode_QuadratureX4_Bits:
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@@ -513,9 +514,8 @@ static int ni_tio_set_counter_mode(struct ni_gpct *counter, unsigned mode)
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counting_mode_bits |=
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((mode >> NI_GPCT_INDEX_PHASE_BITSHIFT) <<
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Gi_Index_Phase_Bitshift) & Gi_Index_Phase_Mask;
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- if (mode & NI_GPCT_INDEX_ENABLE_BIT) {
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+ if (mode & NI_GPCT_INDEX_ENABLE_BIT)
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counting_mode_bits |= Gi_Index_Mode_Bit;
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- }
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ni_tio_set_bits(counter,
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NITIO_Gi_Counting_Mode_Reg(counter->
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counter_index),
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@@ -529,12 +529,10 @@ static int ni_tio_set_counter_mode(struct ni_gpct *counter, unsigned mode)
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(mode >> NI_GPCT_COUNTING_DIRECTION_SHIFT) <<
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Gi_Up_Down_Shift);
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- if (mode & NI_GPCT_OR_GATE_BIT) {
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+ if (mode & NI_GPCT_OR_GATE_BIT)
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input_select_bits |= Gi_Or_Gate_Bit;
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- }
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- if (mode & NI_GPCT_INVERT_OUTPUT_BIT) {
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+ if (mode & NI_GPCT_INVERT_OUTPUT_BIT)
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input_select_bits |= Gi_Output_Polarity_Bit;
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- }
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ni_tio_set_bits(counter,
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NITIO_Gi_Input_Select_Reg(counter->counter_index),
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Gi_Gate_Select_Load_Source_Bit | Gi_Or_Gate_Bit |
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@@ -600,6 +598,7 @@ int ni_tio_arm(struct ni_gpct *counter, int arm, unsigned start_trigger)
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0, 0, command_transient_bits);
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return 0;
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}
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+EXPORT_SYMBOL_GPL(ni_tio_arm);
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static unsigned ni_660x_source_select_bits(unsigned int clock_source)
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{
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@@ -706,7 +705,7 @@ static unsigned ni_m_series_source_select_bits(unsigned int clock_source)
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}
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if (i <= ni_m_series_max_pfi_channel)
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break;
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- printk("invalid clock source 0x%lx\n",
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+ printk(KERN_ERR "invalid clock source 0x%lx\n",
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(unsigned long)clock_source);
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BUG();
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ni_m_series_clock = 0;
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@@ -1026,14 +1025,12 @@ static void ni_tio_set_first_gate_modifiers(struct ni_gpct *counter,
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const unsigned mode_mask = Gi_Gate_Polarity_Bit | Gi_Gating_Mode_Mask;
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unsigned mode_values = 0;
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- if (gate_source & CR_INVERT) {
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+ if (gate_source & CR_INVERT)
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mode_values |= Gi_Gate_Polarity_Bit;
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- }
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- if (gate_source & CR_EDGE) {
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+ if (gate_source & CR_EDGE)
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mode_values |= Gi_Rising_Edge_Gating_Bits;
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- } else {
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+ else
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mode_values |= Gi_Level_Gating_Bits;
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- }
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ni_tio_set_bits(counter, NITIO_Gi_Mode_Reg(counter->counter_index),
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mode_mask, mode_values);
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}
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@@ -1290,6 +1287,7 @@ int ni_tio_set_gate_src(struct ni_gpct *counter, unsigned gate_index,
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}
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return 0;
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}
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+EXPORT_SYMBOL_GPL(ni_tio_set_gate_src);
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static int ni_tio_set_other_src(struct ni_gpct *counter, unsigned index,
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unsigned int source)
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@@ -1531,12 +1529,10 @@ static int ni_tio_get_gate_src(struct ni_gpct *counter, unsigned gate_index,
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BUG();
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break;
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}
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- if (mode_bits & Gi_Gate_Polarity_Bit) {
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+ if (mode_bits & Gi_Gate_Polarity_Bit)
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*gate_source |= CR_INVERT;
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- }
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- if ((mode_bits & Gi_Gating_Mode_Mask) != Gi_Level_Gating_Bits) {
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+ if ((mode_bits & Gi_Gating_Mode_Mask) != Gi_Level_Gating_Bits)
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*gate_source |= CR_EDGE;
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- }
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break;
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case 1:
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if ((mode_bits & Gi_Gating_Mode_Mask) == Gi_Gating_Disabled_Bits
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@@ -1572,9 +1568,8 @@ static int ni_tio_get_gate_src(struct ni_gpct *counter, unsigned gate_index,
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*gate_source |= CR_INVERT;
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}
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/* second gate can't have edge/level mode set independently */
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- if ((mode_bits & Gi_Gating_Mode_Mask) != Gi_Level_Gating_Bits) {
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+ if ((mode_bits & Gi_Gating_Mode_Mask) != Gi_Level_Gating_Bits)
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*gate_source |= CR_EDGE;
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- }
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break;
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default:
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return -EINVAL;
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@@ -1627,6 +1622,7 @@ int ni_tio_insn_config(struct ni_gpct *counter,
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}
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return -EINVAL;
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}
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+EXPORT_SYMBOL_GPL(ni_tio_insn_config);
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int ni_tio_rinsn(struct ni_gpct *counter, struct comedi_insn *insn,
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unsigned int *data)
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@@ -1681,6 +1677,7 @@ int ni_tio_rinsn(struct ni_gpct *counter, struct comedi_insn *insn,
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};
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return 0;
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}
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+EXPORT_SYMBOL_GPL(ni_tio_rinsn);
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static unsigned ni_tio_next_load_register(struct ni_gpct *counter)
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{
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@@ -1734,12 +1731,4 @@ int ni_tio_winsn(struct ni_gpct *counter, struct comedi_insn *insn,
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}
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return 0;
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}
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-
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-EXPORT_SYMBOL_GPL(ni_tio_rinsn);
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EXPORT_SYMBOL_GPL(ni_tio_winsn);
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-EXPORT_SYMBOL_GPL(ni_tio_insn_config);
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-EXPORT_SYMBOL_GPL(ni_tio_init_counter);
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-EXPORT_SYMBOL_GPL(ni_tio_arm);
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-EXPORT_SYMBOL_GPL(ni_tio_set_gate_src);
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-EXPORT_SYMBOL_GPL(ni_gpct_device_construct);
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-EXPORT_SYMBOL_GPL(ni_gpct_device_destroy);
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