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@@ -109,6 +109,8 @@ static struct omap_hwmod omap2420_uart2_hwmod;
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static struct omap_hwmod omap2420_uart3_hwmod;
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static struct omap_hwmod omap2420_i2c1_hwmod;
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static struct omap_hwmod omap2420_i2c2_hwmod;
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+static struct omap_hwmod omap2420_mcbsp1_hwmod;
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+static struct omap_hwmod omap2420_mcbsp2_hwmod;
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/* l4 core -> mcspi1 interface */
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static struct omap_hwmod_addr_space omap2420_mcspi1_addr_space[] = {
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@@ -1390,6 +1392,129 @@ static struct omap_hwmod omap2420_mcspi2_hwmod = {
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
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};
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+/*
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+ * 'mcbsp' class
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+ * multi channel buffered serial port controller
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+ */
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+
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+static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = {
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+ .name = "mcbsp",
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+};
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+
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+/* mcbsp1 */
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+static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = {
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+ { .name = "tx", .irq = 59 },
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+ { .name = "rx", .irq = 60 },
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+};
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+
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+static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = {
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+ { .name = "rx", .dma_req = 32 },
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+ { .name = "tx", .dma_req = 31 },
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+};
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+
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+static struct omap_hwmod_addr_space omap2420_mcbsp1_addrs[] = {
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+ {
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+ .name = "mpu",
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+ .pa_start = 0x48074000,
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+ .pa_end = 0x480740ff,
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+ .flags = ADDR_TYPE_RT
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+ },
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+};
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+
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+/* l4_core -> mcbsp1 */
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+static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = {
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+ .master = &omap2420_l4_core_hwmod,
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+ .slave = &omap2420_mcbsp1_hwmod,
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+ .clk = "mcbsp1_ick",
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+ .addr = omap2420_mcbsp1_addrs,
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+ .addr_cnt = ARRAY_SIZE(omap2420_mcbsp1_addrs),
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/* mcbsp1 slave ports */
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+static struct omap_hwmod_ocp_if *omap2420_mcbsp1_slaves[] = {
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+ &omap2420_l4_core__mcbsp1,
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+};
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+
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+static struct omap_hwmod omap2420_mcbsp1_hwmod = {
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+ .name = "mcbsp1",
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+ .class = &omap2420_mcbsp_hwmod_class,
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+ .mpu_irqs = omap2420_mcbsp1_irqs,
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+ .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_irqs),
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+ .sdma_reqs = omap2420_mcbsp1_sdma_chs,
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+ .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs),
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+ .main_clk = "mcbsp1_fck",
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+ .prcm = {
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+ .omap2 = {
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+ .prcm_reg_id = 1,
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+ .module_bit = OMAP24XX_EN_MCBSP1_SHIFT,
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+ .module_offs = CORE_MOD,
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+ .idlest_reg_id = 1,
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+ .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
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+ },
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+ },
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+ .slaves = omap2420_mcbsp1_slaves,
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+ .slaves_cnt = ARRAY_SIZE(omap2420_mcbsp1_slaves),
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+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
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+};
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+
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+/* mcbsp2 */
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+static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = {
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+ { .name = "tx", .irq = 62 },
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+ { .name = "rx", .irq = 63 },
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+};
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+
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+static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = {
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+ { .name = "rx", .dma_req = 34 },
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+ { .name = "tx", .dma_req = 33 },
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+};
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+
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+static struct omap_hwmod_addr_space omap2420_mcbsp2_addrs[] = {
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+ {
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+ .name = "mpu",
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+ .pa_start = 0x48076000,
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+ .pa_end = 0x480760ff,
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+ .flags = ADDR_TYPE_RT
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+ },
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+};
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+
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+/* l4_core -> mcbsp2 */
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+static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = {
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+ .master = &omap2420_l4_core_hwmod,
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+ .slave = &omap2420_mcbsp2_hwmod,
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+ .clk = "mcbsp2_ick",
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+ .addr = omap2420_mcbsp2_addrs,
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+ .addr_cnt = ARRAY_SIZE(omap2420_mcbsp2_addrs),
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/* mcbsp2 slave ports */
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+static struct omap_hwmod_ocp_if *omap2420_mcbsp2_slaves[] = {
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+ &omap2420_l4_core__mcbsp2,
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+};
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+
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+static struct omap_hwmod omap2420_mcbsp2_hwmod = {
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+ .name = "mcbsp2",
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+ .class = &omap2420_mcbsp_hwmod_class,
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+ .mpu_irqs = omap2420_mcbsp2_irqs,
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+ .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_irqs),
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+ .sdma_reqs = omap2420_mcbsp2_sdma_chs,
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+ .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs),
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+ .main_clk = "mcbsp2_fck",
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+ .prcm = {
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+ .omap2 = {
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+ .prcm_reg_id = 1,
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+ .module_bit = OMAP24XX_EN_MCBSP2_SHIFT,
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+ .module_offs = CORE_MOD,
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+ .idlest_reg_id = 1,
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+ .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
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+ },
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+ },
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+ .slaves = omap2420_mcbsp2_slaves,
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+ .slaves_cnt = ARRAY_SIZE(omap2420_mcbsp2_slaves),
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+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
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+};
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+
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static __initdata struct omap_hwmod *omap2420_hwmods[] = {
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&omap2420_l3_main_hwmod,
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&omap2420_l4_core_hwmod,
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@@ -1421,6 +1546,10 @@ static __initdata struct omap_hwmod *omap2420_hwmods[] = {
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/* mailbox class */
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&omap2420_mailbox_hwmod,
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+ /* mcbsp class */
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+ &omap2420_mcbsp1_hwmod,
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+ &omap2420_mcbsp2_hwmod,
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+
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/* mcspi class */
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&omap2420_mcspi1_hwmod,
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&omap2420_mcspi2_hwmod,
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