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@@ -0,0 +1,524 @@
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+/*
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+ * exynos4_tmu.c - Samsung EXYNOS4 TMU (Thermal Management Unit)
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+ *
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+ * Copyright (C) 2011 Samsung Electronics
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+ * Donggeun Kim <dg77.kim@samsung.com>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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+ *
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+ */
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+
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+#include <linux/module.h>
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+#include <linux/err.h>
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+#include <linux/kernel.h>
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+#include <linux/slab.h>
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+#include <linux/platform_device.h>
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+#include <linux/interrupt.h>
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+#include <linux/clk.h>
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+#include <linux/workqueue.h>
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+#include <linux/sysfs.h>
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+#include <linux/kobject.h>
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+#include <linux/io.h>
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+#include <linux/mutex.h>
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+
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+#include <linux/hwmon.h>
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+#include <linux/hwmon-sysfs.h>
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+
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+#include <linux/platform_data/exynos4_tmu.h>
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+
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+#define EXYNOS4_TMU_REG_TRIMINFO 0x0
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+#define EXYNOS4_TMU_REG_CONTROL 0x20
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+#define EXYNOS4_TMU_REG_STATUS 0x28
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+#define EXYNOS4_TMU_REG_CURRENT_TEMP 0x40
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+#define EXYNOS4_TMU_REG_THRESHOLD_TEMP 0x44
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+#define EXYNOS4_TMU_REG_TRIG_LEVEL0 0x50
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+#define EXYNOS4_TMU_REG_TRIG_LEVEL1 0x54
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+#define EXYNOS4_TMU_REG_TRIG_LEVEL2 0x58
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+#define EXYNOS4_TMU_REG_TRIG_LEVEL3 0x5C
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+#define EXYNOS4_TMU_REG_PAST_TEMP0 0x60
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+#define EXYNOS4_TMU_REG_PAST_TEMP1 0x64
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+#define EXYNOS4_TMU_REG_PAST_TEMP2 0x68
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+#define EXYNOS4_TMU_REG_PAST_TEMP3 0x6C
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+#define EXYNOS4_TMU_REG_INTEN 0x70
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+#define EXYNOS4_TMU_REG_INTSTAT 0x74
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+#define EXYNOS4_TMU_REG_INTCLEAR 0x78
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+
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+#define EXYNOS4_TMU_GAIN_SHIFT 8
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+#define EXYNOS4_TMU_REF_VOLTAGE_SHIFT 24
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+
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+#define EXYNOS4_TMU_TRIM_TEMP_MASK 0xff
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+#define EXYNOS4_TMU_CORE_ON 3
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+#define EXYNOS4_TMU_CORE_OFF 2
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+#define EXYNOS4_TMU_DEF_CODE_TO_TEMP_OFFSET 50
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+#define EXYNOS4_TMU_TRIG_LEVEL0_MASK 0x1
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+#define EXYNOS4_TMU_TRIG_LEVEL1_MASK 0x10
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+#define EXYNOS4_TMU_TRIG_LEVEL2_MASK 0x100
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+#define EXYNOS4_TMU_TRIG_LEVEL3_MASK 0x1000
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+#define EXYNOS4_TMU_INTCLEAR_VAL 0x1111
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+
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+struct exynos4_tmu_data {
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+ struct exynos4_tmu_platform_data *pdata;
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+ struct device *hwmon_dev;
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+ struct resource *mem;
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+ void __iomem *base;
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+ int irq;
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+ struct work_struct irq_work;
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+ struct mutex lock;
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+ struct clk *clk;
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+ u8 temp_error1, temp_error2;
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+};
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+
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+/*
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+ * TMU treats temperature as a mapped temperature code.
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+ * The temperature is converted differently depending on the calibration type.
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+ */
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+static int temp_to_code(struct exynos4_tmu_data *data, u8 temp)
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+{
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+ struct exynos4_tmu_platform_data *pdata = data->pdata;
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+ int temp_code;
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+
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+ /* temp should range between 25 and 125 */
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+ if (temp < 25 || temp > 125) {
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+ temp_code = -EINVAL;
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+ goto out;
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+ }
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+
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+ switch (pdata->cal_type) {
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+ case TYPE_TWO_POINT_TRIMMING:
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+ temp_code = (temp - 25) *
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+ (data->temp_error2 - data->temp_error1) /
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+ (85 - 25) + data->temp_error1;
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+ break;
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+ case TYPE_ONE_POINT_TRIMMING:
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+ temp_code = temp + data->temp_error1 - 25;
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+ break;
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+ default:
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+ temp_code = temp + EXYNOS4_TMU_DEF_CODE_TO_TEMP_OFFSET;
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+ break;
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+ }
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+out:
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+ return temp_code;
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+}
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+
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+/*
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+ * Calculate a temperature value from a temperature code.
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+ * The unit of the temperature is degree Celsius.
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+ */
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+static int code_to_temp(struct exynos4_tmu_data *data, u8 temp_code)
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+{
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+ struct exynos4_tmu_platform_data *pdata = data->pdata;
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+ int temp;
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+
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+ /* temp_code should range between 75 and 175 */
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+ if (temp_code < 75 || temp_code > 175) {
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+ temp = -ENODATA;
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+ goto out;
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+ }
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+
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+ switch (pdata->cal_type) {
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+ case TYPE_TWO_POINT_TRIMMING:
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+ temp = (temp_code - data->temp_error1) * (85 - 25) /
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+ (data->temp_error2 - data->temp_error1) + 25;
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+ break;
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+ case TYPE_ONE_POINT_TRIMMING:
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+ temp = temp_code - data->temp_error1 + 25;
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+ break;
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+ default:
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+ temp = temp_code - EXYNOS4_TMU_DEF_CODE_TO_TEMP_OFFSET;
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+ break;
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+ }
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+out:
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+ return temp;
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+}
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+
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+static int exynos4_tmu_initialize(struct platform_device *pdev)
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+{
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+ struct exynos4_tmu_data *data = platform_get_drvdata(pdev);
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+ struct exynos4_tmu_platform_data *pdata = data->pdata;
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+ unsigned int status, trim_info;
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+ int ret = 0, threshold_code;
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+
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+ mutex_lock(&data->lock);
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+ clk_enable(data->clk);
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+
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+ status = readb(data->base + EXYNOS4_TMU_REG_STATUS);
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+ if (!status) {
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+ ret = -EBUSY;
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+ goto out;
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+ }
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+
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+ /* Save trimming info in order to perform calibration */
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+ trim_info = readl(data->base + EXYNOS4_TMU_REG_TRIMINFO);
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+ data->temp_error1 = trim_info & EXYNOS4_TMU_TRIM_TEMP_MASK;
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+ data->temp_error2 = ((trim_info >> 8) & EXYNOS4_TMU_TRIM_TEMP_MASK);
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+
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+ /* Write temperature code for threshold */
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+ threshold_code = temp_to_code(data, pdata->threshold);
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+ if (threshold_code < 0) {
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+ ret = threshold_code;
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+ goto out;
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+ }
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+ writeb(threshold_code,
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+ data->base + EXYNOS4_TMU_REG_THRESHOLD_TEMP);
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+
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+ writeb(pdata->trigger_levels[0],
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+ data->base + EXYNOS4_TMU_REG_TRIG_LEVEL0);
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+ writeb(pdata->trigger_levels[1],
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+ data->base + EXYNOS4_TMU_REG_TRIG_LEVEL1);
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+ writeb(pdata->trigger_levels[2],
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+ data->base + EXYNOS4_TMU_REG_TRIG_LEVEL2);
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+ writeb(pdata->trigger_levels[3],
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+ data->base + EXYNOS4_TMU_REG_TRIG_LEVEL3);
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+
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+ writel(EXYNOS4_TMU_INTCLEAR_VAL,
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+ data->base + EXYNOS4_TMU_REG_INTCLEAR);
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+out:
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+ clk_disable(data->clk);
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+ mutex_unlock(&data->lock);
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+
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+ return ret;
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+}
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+
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+static void exynos4_tmu_control(struct platform_device *pdev, bool on)
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+{
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+ struct exynos4_tmu_data *data = platform_get_drvdata(pdev);
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+ struct exynos4_tmu_platform_data *pdata = data->pdata;
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+ unsigned int con, interrupt_en;
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+
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+ mutex_lock(&data->lock);
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+ clk_enable(data->clk);
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+
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+ con = pdata->reference_voltage << EXYNOS4_TMU_REF_VOLTAGE_SHIFT |
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+ pdata->gain << EXYNOS4_TMU_GAIN_SHIFT;
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+ if (on) {
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+ con |= EXYNOS4_TMU_CORE_ON;
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+ interrupt_en = pdata->trigger_level3_en << 12 |
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+ pdata->trigger_level2_en << 8 |
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+ pdata->trigger_level1_en << 4 |
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+ pdata->trigger_level0_en;
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+ } else {
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+ con |= EXYNOS4_TMU_CORE_OFF;
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+ interrupt_en = 0; /* Disable all interrupts */
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+ }
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+ writel(interrupt_en, data->base + EXYNOS4_TMU_REG_INTEN);
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+ writel(con, data->base + EXYNOS4_TMU_REG_CONTROL);
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+
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+ clk_disable(data->clk);
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+ mutex_unlock(&data->lock);
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+}
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+
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+static int exynos4_tmu_read(struct exynos4_tmu_data *data)
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+{
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+ u8 temp_code;
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+ int temp;
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+
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+ mutex_lock(&data->lock);
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+ clk_enable(data->clk);
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+
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+ temp_code = readb(data->base + EXYNOS4_TMU_REG_CURRENT_TEMP);
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+ temp = code_to_temp(data, temp_code);
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+
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+ clk_disable(data->clk);
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+ mutex_unlock(&data->lock);
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+
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+ return temp;
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+}
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+
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+static void exynos4_tmu_work(struct work_struct *work)
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+{
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+ struct exynos4_tmu_data *data = container_of(work,
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+ struct exynos4_tmu_data, irq_work);
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+
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+ mutex_lock(&data->lock);
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+ clk_enable(data->clk);
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+
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+ writel(EXYNOS4_TMU_INTCLEAR_VAL, data->base + EXYNOS4_TMU_REG_INTCLEAR);
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+
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+ kobject_uevent(&data->hwmon_dev->kobj, KOBJ_CHANGE);
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+
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+ enable_irq(data->irq);
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+
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+ clk_disable(data->clk);
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+ mutex_unlock(&data->lock);
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+}
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+
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+static irqreturn_t exynos4_tmu_irq(int irq, void *id)
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+{
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+ struct exynos4_tmu_data *data = id;
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+
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+ disable_irq_nosync(irq);
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+ schedule_work(&data->irq_work);
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+
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+ return IRQ_HANDLED;
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+}
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+
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+static ssize_t exynos4_tmu_show_name(struct device *dev,
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+ struct device_attribute *attr, char *buf)
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+{
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+ return sprintf(buf, "exynos4-tmu\n");
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+}
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+
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+static ssize_t exynos4_tmu_show_temp(struct device *dev,
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+ struct device_attribute *attr, char *buf)
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+{
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+ struct exynos4_tmu_data *data = dev_get_drvdata(dev);
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+ int ret;
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+
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+ ret = exynos4_tmu_read(data);
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+ if (ret < 0)
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+ return ret;
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+
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+ /* convert from degree Celsius to millidegree Celsius */
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+ return sprintf(buf, "%d\n", ret * 1000);
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+}
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+
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+static ssize_t exynos4_tmu_show_alarm(struct device *dev,
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+ struct device_attribute *devattr, char *buf)
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+{
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+ struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
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+ struct exynos4_tmu_data *data = dev_get_drvdata(dev);
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+ struct exynos4_tmu_platform_data *pdata = data->pdata;
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+ int temp;
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+ unsigned int trigger_level;
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+
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+ temp = exynos4_tmu_read(data);
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+ if (temp < 0)
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+ return temp;
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+
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+ trigger_level = pdata->threshold + pdata->trigger_levels[attr->index];
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+
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+ return sprintf(buf, "%d\n", !!(temp > trigger_level));
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+}
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+
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+static ssize_t exynos4_tmu_show_level(struct device *dev,
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+ struct device_attribute *devattr, char *buf)
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+{
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+ struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
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+ struct exynos4_tmu_data *data = dev_get_drvdata(dev);
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+ struct exynos4_tmu_platform_data *pdata = data->pdata;
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+ unsigned int temp = pdata->threshold +
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+ pdata->trigger_levels[attr->index];
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+
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+ return sprintf(buf, "%u\n", temp * 1000);
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+}
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+
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+static DEVICE_ATTR(name, S_IRUGO, exynos4_tmu_show_name, NULL);
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+static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, exynos4_tmu_show_temp, NULL, 0);
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+
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+static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO,
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+ exynos4_tmu_show_alarm, NULL, 1);
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+static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO,
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+ exynos4_tmu_show_alarm, NULL, 2);
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+static SENSOR_DEVICE_ATTR(temp1_emergency_alarm, S_IRUGO,
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+ exynos4_tmu_show_alarm, NULL, 3);
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+
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+static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO, exynos4_tmu_show_level, NULL, 1);
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+static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, exynos4_tmu_show_level, NULL, 2);
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+static SENSOR_DEVICE_ATTR(temp1_emergency, S_IRUGO,
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+ exynos4_tmu_show_level, NULL, 3);
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+
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+static struct attribute *exynos4_tmu_attributes[] = {
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+ &dev_attr_name.attr,
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+ &sensor_dev_attr_temp1_input.dev_attr.attr,
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+ &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
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+ &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
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+ &sensor_dev_attr_temp1_emergency_alarm.dev_attr.attr,
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+ &sensor_dev_attr_temp1_max.dev_attr.attr,
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+ &sensor_dev_attr_temp1_crit.dev_attr.attr,
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+ &sensor_dev_attr_temp1_emergency.dev_attr.attr,
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+ NULL,
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+};
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+
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+static const struct attribute_group exynos4_tmu_attr_group = {
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+ .attrs = exynos4_tmu_attributes,
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+};
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+
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+static int __devinit exynos4_tmu_probe(struct platform_device *pdev)
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+{
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+ struct exynos4_tmu_data *data;
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+ struct exynos4_tmu_platform_data *pdata = pdev->dev.platform_data;
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+ int ret;
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+
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+ if (!pdata) {
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+ dev_err(&pdev->dev, "No platform init data supplied.\n");
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+ return -ENODEV;
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+ }
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+
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+ data = kzalloc(sizeof(struct exynos4_tmu_data), GFP_KERNEL);
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+ if (!data) {
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+ dev_err(&pdev->dev, "Failed to allocate driver structure\n");
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+ return -ENOMEM;
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+ }
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+
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+ data->irq = platform_get_irq(pdev, 0);
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+ if (data->irq < 0) {
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+ ret = data->irq;
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+ dev_err(&pdev->dev, "Failed to get platform irq\n");
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+ goto err_free;
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+ }
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+
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|
|
+ INIT_WORK(&data->irq_work, exynos4_tmu_work);
|
|
|
+
|
|
|
+ data->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
+ if (!data->mem) {
|
|
|
+ ret = -ENOENT;
|
|
|
+ dev_err(&pdev->dev, "Failed to get platform resource\n");
|
|
|
+ goto err_free;
|
|
|
+ }
|
|
|
+
|
|
|
+ data->mem = request_mem_region(data->mem->start,
|
|
|
+ resource_size(data->mem), pdev->name);
|
|
|
+ if (!data->mem) {
|
|
|
+ ret = -ENODEV;
|
|
|
+ dev_err(&pdev->dev, "Failed to request memory region\n");
|
|
|
+ goto err_free;
|
|
|
+ }
|
|
|
+
|
|
|
+ data->base = ioremap(data->mem->start, resource_size(data->mem));
|
|
|
+ if (!data->base) {
|
|
|
+ ret = -ENODEV;
|
|
|
+ dev_err(&pdev->dev, "Failed to ioremap memory\n");
|
|
|
+ goto err_mem_region;
|
|
|
+ }
|
|
|
+
|
|
|
+ ret = request_irq(data->irq, exynos4_tmu_irq,
|
|
|
+ IRQF_TRIGGER_RISING,
|
|
|
+ "exynos4-tmu", data);
|
|
|
+ if (ret) {
|
|
|
+ dev_err(&pdev->dev, "Failed to request irq: %d\n", data->irq);
|
|
|
+ goto err_io_remap;
|
|
|
+ }
|
|
|
+
|
|
|
+ data->clk = clk_get(NULL, "tmu_apbif");
|
|
|
+ if (IS_ERR(data->clk)) {
|
|
|
+ ret = PTR_ERR(data->clk);
|
|
|
+ dev_err(&pdev->dev, "Failed to get clock\n");
|
|
|
+ goto err_irq;
|
|
|
+ }
|
|
|
+
|
|
|
+ data->pdata = pdata;
|
|
|
+ platform_set_drvdata(pdev, data);
|
|
|
+ mutex_init(&data->lock);
|
|
|
+
|
|
|
+ ret = exynos4_tmu_initialize(pdev);
|
|
|
+ if (ret) {
|
|
|
+ dev_err(&pdev->dev, "Failed to initialize TMU\n");
|
|
|
+ goto err_clk;
|
|
|
+ }
|
|
|
+
|
|
|
+ ret = sysfs_create_group(&pdev->dev.kobj, &exynos4_tmu_attr_group);
|
|
|
+ if (ret) {
|
|
|
+ dev_err(&pdev->dev, "Failed to create sysfs group\n");
|
|
|
+ goto err_clk;
|
|
|
+ }
|
|
|
+
|
|
|
+ data->hwmon_dev = hwmon_device_register(&pdev->dev);
|
|
|
+ if (IS_ERR(data->hwmon_dev)) {
|
|
|
+ ret = PTR_ERR(data->hwmon_dev);
|
|
|
+ dev_err(&pdev->dev, "Failed to register hwmon device\n");
|
|
|
+ goto err_create_group;
|
|
|
+ }
|
|
|
+
|
|
|
+ exynos4_tmu_control(pdev, true);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+
|
|
|
+err_create_group:
|
|
|
+ sysfs_remove_group(&pdev->dev.kobj, &exynos4_tmu_attr_group);
|
|
|
+err_clk:
|
|
|
+ platform_set_drvdata(pdev, NULL);
|
|
|
+ clk_put(data->clk);
|
|
|
+err_irq:
|
|
|
+ free_irq(data->irq, data);
|
|
|
+err_io_remap:
|
|
|
+ iounmap(data->base);
|
|
|
+err_mem_region:
|
|
|
+ release_mem_region(data->mem->start, resource_size(data->mem));
|
|
|
+err_free:
|
|
|
+ kfree(data);
|
|
|
+
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static int __devexit exynos4_tmu_remove(struct platform_device *pdev)
|
|
|
+{
|
|
|
+ struct exynos4_tmu_data *data = platform_get_drvdata(pdev);
|
|
|
+
|
|
|
+ exynos4_tmu_control(pdev, false);
|
|
|
+
|
|
|
+ hwmon_device_unregister(data->hwmon_dev);
|
|
|
+ sysfs_remove_group(&pdev->dev.kobj, &exynos4_tmu_attr_group);
|
|
|
+
|
|
|
+ clk_put(data->clk);
|
|
|
+
|
|
|
+ free_irq(data->irq, data);
|
|
|
+
|
|
|
+ iounmap(data->base);
|
|
|
+ release_mem_region(data->mem->start, resource_size(data->mem));
|
|
|
+
|
|
|
+ platform_set_drvdata(pdev, NULL);
|
|
|
+
|
|
|
+ kfree(data);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+#ifdef CONFIG_PM
|
|
|
+static int exynos4_tmu_suspend(struct platform_device *pdev, pm_message_t state)
|
|
|
+{
|
|
|
+ exynos4_tmu_control(pdev, false);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int exynos4_tmu_resume(struct platform_device *pdev)
|
|
|
+{
|
|
|
+ exynos4_tmu_initialize(pdev);
|
|
|
+ exynos4_tmu_control(pdev, true);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+#else
|
|
|
+#define exynos4_tmu_suspend NULL
|
|
|
+#define exynos4_tmu_resume NULL
|
|
|
+#endif
|
|
|
+
|
|
|
+static struct platform_driver exynos4_tmu_driver = {
|
|
|
+ .driver = {
|
|
|
+ .name = "exynos4-tmu",
|
|
|
+ .owner = THIS_MODULE,
|
|
|
+ },
|
|
|
+ .probe = exynos4_tmu_probe,
|
|
|
+ .remove = __devexit_p(exynos4_tmu_remove),
|
|
|
+ .suspend = exynos4_tmu_suspend,
|
|
|
+ .resume = exynos4_tmu_resume,
|
|
|
+};
|
|
|
+
|
|
|
+static int __init exynos4_tmu_driver_init(void)
|
|
|
+{
|
|
|
+ return platform_driver_register(&exynos4_tmu_driver);
|
|
|
+}
|
|
|
+module_init(exynos4_tmu_driver_init);
|
|
|
+
|
|
|
+static void __exit exynos4_tmu_driver_exit(void)
|
|
|
+{
|
|
|
+ platform_driver_unregister(&exynos4_tmu_driver);
|
|
|
+}
|
|
|
+module_exit(exynos4_tmu_driver_exit);
|
|
|
+
|
|
|
+MODULE_DESCRIPTION("EXYNOS4 TMU Driver");
|
|
|
+MODULE_AUTHOR("Donggeun Kim <dg77.kim@samsung.com>");
|
|
|
+MODULE_LICENSE("GPL");
|
|
|
+MODULE_ALIAS("platform:exynos4-tmu");
|