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@@ -1,5 +1,170 @@
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+#ifndef _KEXEC_H
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+#define _KEXEC_H
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+
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#ifdef CONFIG_X86_32
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-# include "kexec_32.h"
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+# define PA_CONTROL_PAGE 0
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+# define VA_CONTROL_PAGE 1
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+# define PA_PGD 2
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+# define VA_PGD 3
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+# define PA_PTE_0 4
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+# define VA_PTE_0 5
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+# define PA_PTE_1 6
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+# define VA_PTE_1 7
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+# ifdef CONFIG_X86_PAE
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+# define PA_PMD_0 8
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+# define VA_PMD_0 9
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+# define PA_PMD_1 10
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+# define VA_PMD_1 11
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+# define PAGES_NR 12
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+# else
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+# define PAGES_NR 8
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+# endif
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#else
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-# include "kexec_64.h"
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+# define PA_CONTROL_PAGE 0
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+# define VA_CONTROL_PAGE 1
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+# define PA_PGD 2
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+# define VA_PGD 3
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+# define PA_PUD_0 4
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+# define VA_PUD_0 5
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+# define PA_PMD_0 6
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+# define VA_PMD_0 7
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+# define PA_PTE_0 8
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+# define VA_PTE_0 9
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+# define PA_PUD_1 10
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+# define VA_PUD_1 11
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+# define PA_PMD_1 12
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+# define VA_PMD_1 13
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+# define PA_PTE_1 14
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+# define VA_PTE_1 15
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+# define PA_TABLE_PAGE 16
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+# define PAGES_NR 17
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#endif
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+
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+#ifndef __ASSEMBLY__
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+
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+#include <linux/string.h>
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+
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+#include <asm/page.h>
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+#include <asm/ptrace.h>
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+
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+/*
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+ * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.
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+ * I.e. Maximum page that is mapped directly into kernel memory,
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+ * and kmap is not required.
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+ *
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+ * So far x86_64 is limited to 40 physical address bits.
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+ */
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+#ifdef CONFIG_X86_32
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+/* Maximum physical address we can use pages from */
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+# define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
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+/* Maximum address we can reach in physical address mode */
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+# define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
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+/* Maximum address we can use for the control code buffer */
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+# define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
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+
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+# define KEXEC_CONTROL_CODE_SIZE 4096
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+
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+/* The native architecture */
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+# define KEXEC_ARCH KEXEC_ARCH_386
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+
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+/* We can also handle crash dumps from 64 bit kernel. */
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+# define vmcore_elf_check_arch_cross(x) ((x)->e_machine == EM_X86_64)
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+#else
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+/* Maximum physical address we can use pages from */
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+# define KEXEC_SOURCE_MEMORY_LIMIT (0xFFFFFFFFFFUL)
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+/* Maximum address we can reach in physical address mode */
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+# define KEXEC_DESTINATION_MEMORY_LIMIT (0xFFFFFFFFFFUL)
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+/* Maximum address we can use for the control pages */
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+# define KEXEC_CONTROL_MEMORY_LIMIT (0xFFFFFFFFFFUL)
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+
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+/* Allocate one page for the pdp and the second for the code */
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+# define KEXEC_CONTROL_CODE_SIZE (4096UL + 4096UL)
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+
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+/* The native architecture */
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+# define KEXEC_ARCH KEXEC_ARCH_X86_64
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+#endif
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+
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+/*
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+ * CPU does not save ss and sp on stack if execution is already
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+ * running in kernel mode at the time of NMI occurrence. This code
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+ * fixes it.
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+ */
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+static inline void crash_fixup_ss_esp(struct pt_regs *newregs,
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+ struct pt_regs *oldregs)
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+{
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+#ifdef CONFIG_X86_32
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+ newregs->sp = (unsigned long)&(oldregs->sp);
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+ __asm__ __volatile__(
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+ "xorl %%eax, %%eax\n\t"
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+ "movw %%ss, %%ax\n\t"
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+ :"=a"(newregs->ss));
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+#endif
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+}
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+
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+/*
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+ * This function is responsible for capturing register states if coming
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+ * via panic otherwise just fix up the ss and sp if coming via kernel
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+ * mode exception.
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+ */
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+static inline void crash_setup_regs(struct pt_regs *newregs,
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+ struct pt_regs *oldregs)
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+{
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+ if (oldregs) {
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+ memcpy(newregs, oldregs, sizeof(*newregs));
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+ crash_fixup_ss_esp(newregs, oldregs);
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+ } else {
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+#ifdef CONFIG_X86_32
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+ __asm__ __volatile__("movl %%ebx,%0" : "=m"(newregs->bx));
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+ __asm__ __volatile__("movl %%ecx,%0" : "=m"(newregs->cx));
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+ __asm__ __volatile__("movl %%edx,%0" : "=m"(newregs->dx));
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+ __asm__ __volatile__("movl %%esi,%0" : "=m"(newregs->si));
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+ __asm__ __volatile__("movl %%edi,%0" : "=m"(newregs->di));
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+ __asm__ __volatile__("movl %%ebp,%0" : "=m"(newregs->bp));
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+ __asm__ __volatile__("movl %%eax,%0" : "=m"(newregs->ax));
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+ __asm__ __volatile__("movl %%esp,%0" : "=m"(newregs->sp));
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+ __asm__ __volatile__("movl %%ss, %%eax;" :"=a"(newregs->ss));
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+ __asm__ __volatile__("movl %%cs, %%eax;" :"=a"(newregs->cs));
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+ __asm__ __volatile__("movl %%ds, %%eax;" :"=a"(newregs->ds));
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+ __asm__ __volatile__("movl %%es, %%eax;" :"=a"(newregs->es));
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+ __asm__ __volatile__("pushfl; popl %0" :"=m"(newregs->flags));
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+#else
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+ __asm__ __volatile__("movq %%rbx,%0" : "=m"(newregs->bx));
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+ __asm__ __volatile__("movq %%rcx,%0" : "=m"(newregs->cx));
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+ __asm__ __volatile__("movq %%rdx,%0" : "=m"(newregs->dx));
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+ __asm__ __volatile__("movq %%rsi,%0" : "=m"(newregs->si));
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+ __asm__ __volatile__("movq %%rdi,%0" : "=m"(newregs->di));
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+ __asm__ __volatile__("movq %%rbp,%0" : "=m"(newregs->bp));
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+ __asm__ __volatile__("movq %%rax,%0" : "=m"(newregs->ax));
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+ __asm__ __volatile__("movq %%rsp,%0" : "=m"(newregs->sp));
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+ __asm__ __volatile__("movq %%r8,%0" : "=m"(newregs->r8));
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+ __asm__ __volatile__("movq %%r9,%0" : "=m"(newregs->r9));
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+ __asm__ __volatile__("movq %%r10,%0" : "=m"(newregs->r10));
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+ __asm__ __volatile__("movq %%r11,%0" : "=m"(newregs->r11));
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+ __asm__ __volatile__("movq %%r12,%0" : "=m"(newregs->r12));
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+ __asm__ __volatile__("movq %%r13,%0" : "=m"(newregs->r13));
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+ __asm__ __volatile__("movq %%r14,%0" : "=m"(newregs->r14));
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+ __asm__ __volatile__("movq %%r15,%0" : "=m"(newregs->r15));
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+ __asm__ __volatile__("movl %%ss, %%eax;" :"=a"(newregs->ss));
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+ __asm__ __volatile__("movl %%cs, %%eax;" :"=a"(newregs->cs));
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+ __asm__ __volatile__("pushfq; popq %0" :"=m"(newregs->flags));
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+#endif
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+ newregs->ip = (unsigned long)current_text_addr();
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+ }
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+}
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+
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+#ifdef CONFIG_X86_32
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+asmlinkage NORET_TYPE void
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+relocate_kernel(unsigned long indirection_page,
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+ unsigned long control_page,
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+ unsigned long start_address,
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+ unsigned int has_pae) ATTRIB_NORET;
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+#else
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+NORET_TYPE void
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+relocate_kernel(unsigned long indirection_page,
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+ unsigned long page_list,
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+ unsigned long start_address) ATTRIB_NORET;
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+#endif
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+
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+#endif /* __ASSEMBLY__ */
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+
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+#endif /* _KEXEC_H */
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