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@@ -97,9 +97,10 @@ asmlinkage void plat_irq_dispatch(void)
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if (pending & IE_IRQ4) {
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if (pending & IE_IRQ4) {
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r4030_read_reg32(JAZZ_TIMER_REGISTER);
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r4030_read_reg32(JAZZ_TIMER_REGISTER);
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do_IRQ(JAZZ_TIMER_IRQ);
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do_IRQ(JAZZ_TIMER_IRQ);
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- } else if (pending & IE_IRQ2)
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- do_IRQ(r4030_read_reg32(JAZZ_EISA_IRQ_ACK));
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- else if (pending & IE_IRQ1) {
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+ } else if (pending & IE_IRQ2) {
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+ irq = *(volatile u8 *)JAZZ_EISA_IRQ_ACK;
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+ do_IRQ(irq);
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+ } else if (pending & IE_IRQ1) {
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irq = *(volatile u8 *)JAZZ_IO_IRQ_SOURCE >> 2;
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irq = *(volatile u8 *)JAZZ_IO_IRQ_SOURCE >> 2;
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if (likely(irq > 0))
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if (likely(irq > 0))
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do_IRQ(irq + JAZZ_IRQ_START - 1);
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do_IRQ(irq + JAZZ_IRQ_START - 1);
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@@ -117,16 +118,16 @@ static void r4030_set_mode(enum clock_event_mode mode,
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struct clock_event_device r4030_clockevent = {
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struct clock_event_device r4030_clockevent = {
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.name = "r4030",
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.name = "r4030",
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.features = CLOCK_EVT_FEAT_PERIODIC,
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.features = CLOCK_EVT_FEAT_PERIODIC,
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- .rating = 100,
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+ .rating = 300,
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.irq = JAZZ_TIMER_IRQ,
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.irq = JAZZ_TIMER_IRQ,
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- .cpumask = CPU_MASK_CPU0,
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.set_mode = r4030_set_mode,
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.set_mode = r4030_set_mode,
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};
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};
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static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id)
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static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id)
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{
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{
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- r4030_clockevent.event_handler(&r4030_clockevent);
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+ struct clock_event_device *cd = dev_id;
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+ cd->event_handler(cd);
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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}
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}
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@@ -134,15 +135,22 @@ static struct irqaction r4030_timer_irqaction = {
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.handler = r4030_timer_interrupt,
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.handler = r4030_timer_interrupt,
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.flags = IRQF_DISABLED,
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.flags = IRQF_DISABLED,
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.mask = CPU_MASK_CPU0,
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.mask = CPU_MASK_CPU0,
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- .name = "timer",
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+ .name = "R4030 timer",
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};
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};
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void __init plat_time_init(void)
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void __init plat_time_init(void)
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{
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{
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- struct irqaction *irq = &r4030_timer_irqaction;
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+ struct clock_event_device *cd = &r4030_clockevent;
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+ struct irqaction *action = &r4030_timer_irqaction;
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+ unsigned int cpu = smp_processor_id();
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BUG_ON(HZ != 100);
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BUG_ON(HZ != 100);
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+ cd->cpumask = cpumask_of_cpu(cpu);
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+ clockevents_register_device(cd);
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+ action->dev_id = cd;
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+ setup_irq(JAZZ_TIMER_IRQ, action);
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+
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/*
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/*
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* Set clock to 100Hz.
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* Set clock to 100Hz.
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*
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*
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@@ -150,8 +158,5 @@ void __init plat_time_init(void)
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* a programmable 4-bit divider. This makes it fairly inflexible.
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* a programmable 4-bit divider. This makes it fairly inflexible.
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*/
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*/
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r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9);
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r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9);
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- setup_irq(JAZZ_TIMER_IRQ, irq);
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-
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- clockevents_register_device(&r4030_clockevent);
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setup_pit_timer();
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setup_pit_timer();
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}
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}
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