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@@ -31,6 +31,9 @@
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#include <asm/smp_twd.h>
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#define AVECR IOMEM(0xfe700040)
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+#define R8A7779_SCU_BASE IOMEM(0xf0000000)
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+
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+static void __iomem *shmobile_scu_base;
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static struct r8a7779_pm_ch r8a7779_ch_cpu1 = {
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.chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
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@@ -56,11 +59,6 @@ static struct r8a7779_pm_ch *r8a7779_ch_cpu[4] = {
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[3] = &r8a7779_ch_cpu3,
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};
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-static void __iomem *scu_base_addr(void)
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-{
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- return (void __iomem *)0xf0000000;
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-}
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-
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static DEFINE_SPINLOCK(scu_lock);
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static unsigned long tmp;
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@@ -75,7 +73,7 @@ void __init r8a7779_register_twd(void)
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static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
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{
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- void __iomem *scu_base = scu_base_addr();
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+ void __iomem *scu_base = shmobile_scu_base;
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spin_lock(&scu_lock);
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tmp = __raw_readl(scu_base + 8);
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@@ -153,7 +151,7 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
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{
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int cpu = cpu_logical_map(0);
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- scu_enable(scu_base_addr());
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+ scu_enable(shmobile_scu_base);
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/* Map the reset vector (in headsmp.S) */
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__raw_writel(__pa(shmobile_secondary_vector), AVECR);
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@@ -171,9 +169,10 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
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static void __init r8a7779_smp_init_cpus(void)
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{
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- unsigned int ncores = scu_get_core_count(scu_base_addr());
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+ /* setup r8a7779 specific SCU base */
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+ shmobile_scu_base = R8A7779_SCU_BASE;
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- shmobile_smp_init_cpus(ncores);
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+ shmobile_smp_init_cpus(scu_get_core_count(shmobile_scu_base));
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}
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struct smp_operations r8a7779_smp_ops __initdata = {
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