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@@ -0,0 +1,420 @@
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+/*
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+ * Xen mmu operations
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+ *
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+ * This file contains the various mmu fetch and update operations.
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+ * The most important job they must perform is the mapping between the
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+ * domain's pfn and the overall machine mfns.
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+ *
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+ * Xen allows guests to directly update the pagetable, in a controlled
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+ * fashion. In other words, the guest modifies the same pagetable
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+ * that the CPU actually uses, which eliminates the overhead of having
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+ * a separate shadow pagetable.
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+ *
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+ * In order to allow this, it falls on the guest domain to map its
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+ * notion of a "physical" pfn - which is just a domain-local linear
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+ * address - into a real "machine address" which the CPU's MMU can
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+ * use.
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+ *
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+ * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
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+ * inserted directly into the pagetable. When creating a new
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+ * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
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+ * when reading the content back with __(pgd|pmd|pte)_val, it converts
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+ * the mfn back into a pfn.
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+ *
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+ * The other constraint is that all pages which make up a pagetable
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+ * must be mapped read-only in the guest. This prevents uncontrolled
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+ * guest updates to the pagetable. Xen strictly enforces this, and
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+ * will disallow any pagetable update which will end up mapping a
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+ * pagetable page RW, and will disallow using any writable page as a
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+ * pagetable.
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+ *
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+ * Naively, when loading %cr3 with the base of a new pagetable, Xen
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+ * would need to validate the whole pagetable before going on.
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+ * Naturally, this is quite slow. The solution is to "pin" a
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+ * pagetable, which enforces all the constraints on the pagetable even
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+ * when it is not actively in use. This menas that Xen can be assured
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+ * that it is still valid when you do load it into %cr3, and doesn't
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+ * need to revalidate it.
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+ *
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+ * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
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+ */
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+#include <linux/bug.h>
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+#include <linux/sched.h>
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+
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+#include <asm/pgtable.h>
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+#include <asm/tlbflush.h>
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+#include <asm/mmu_context.h>
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+
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+#include <asm/xen/hypercall.h>
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+#include <asm/paravirt.h>
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+
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+#include <xen/page.h>
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+#include <xen/interface/xen.h>
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+
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+#include "mmu.h"
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+
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+xmaddr_t arbitrary_virt_to_machine(unsigned long address)
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+{
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+ pte_t *pte = lookup_address(address);
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+ unsigned offset = address & PAGE_MASK;
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+
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+ BUG_ON(pte == NULL);
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+
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+ return XMADDR((pte_mfn(*pte) << PAGE_SHIFT) + offset);
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+}
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+
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+void make_lowmem_page_readonly(void *vaddr)
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+{
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+ pte_t *pte, ptev;
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+ unsigned long address = (unsigned long)vaddr;
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+
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+ pte = lookup_address(address);
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+ BUG_ON(pte == NULL);
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+
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+ ptev = pte_wrprotect(*pte);
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+
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+ if (HYPERVISOR_update_va_mapping(address, ptev, 0))
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+ BUG();
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+}
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+
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+void make_lowmem_page_readwrite(void *vaddr)
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+{
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+ pte_t *pte, ptev;
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+ unsigned long address = (unsigned long)vaddr;
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+
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+ pte = lookup_address(address);
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+ BUG_ON(pte == NULL);
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+
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+ ptev = pte_mkwrite(*pte);
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+
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+ if (HYPERVISOR_update_va_mapping(address, ptev, 0))
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+ BUG();
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+}
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+
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+
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+void xen_set_pte(pte_t *ptep, pte_t pte)
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+{
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+ struct mmu_update u;
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+
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+ u.ptr = virt_to_machine(ptep).maddr;
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+ u.val = pte_val_ma(pte);
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+ if (HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF) < 0)
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+ BUG();
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+}
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+
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+void xen_set_pmd(pmd_t *ptr, pmd_t val)
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+{
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+ struct mmu_update u;
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+
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+ u.ptr = virt_to_machine(ptr).maddr;
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+ u.val = pmd_val_ma(val);
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+ if (HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF) < 0)
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+ BUG();
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+}
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+
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+#ifdef CONFIG_X86_PAE
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+void xen_set_pud(pud_t *ptr, pud_t val)
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+{
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+ struct mmu_update u;
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+
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+ u.ptr = virt_to_machine(ptr).maddr;
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+ u.val = pud_val_ma(val);
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+ if (HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF) < 0)
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+ BUG();
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+}
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+#endif
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+
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+/*
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+ * Associate a virtual page frame with a given physical page frame
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+ * and protection flags for that frame.
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+ */
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+void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
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+{
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+ pgd_t *pgd;
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+ pud_t *pud;
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+ pmd_t *pmd;
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+ pte_t *pte;
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+
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+ pgd = swapper_pg_dir + pgd_index(vaddr);
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+ if (pgd_none(*pgd)) {
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+ BUG();
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+ return;
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+ }
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+ pud = pud_offset(pgd, vaddr);
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+ if (pud_none(*pud)) {
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+ BUG();
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+ return;
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+ }
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+ pmd = pmd_offset(pud, vaddr);
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+ if (pmd_none(*pmd)) {
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+ BUG();
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+ return;
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+ }
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+ pte = pte_offset_kernel(pmd, vaddr);
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+ /* <mfn,flags> stored as-is, to permit clearing entries */
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+ xen_set_pte(pte, mfn_pte(mfn, flags));
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+
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+ /*
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+ * It's enough to flush this one mapping.
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+ * (PGE mappings get flushed as well)
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+ */
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+ __flush_tlb_one(vaddr);
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+}
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+
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+void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
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+ pte_t *ptep, pte_t pteval)
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+{
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+ if ((mm != current->mm && mm != &init_mm) ||
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+ HYPERVISOR_update_va_mapping(addr, pteval, 0) != 0)
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+ xen_set_pte(ptep, pteval);
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+}
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+
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+#ifdef CONFIG_X86_PAE
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+void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
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+{
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+ set_64bit((u64 *)ptep, pte_val_ma(pte));
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+}
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+
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+void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
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+{
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+ ptep->pte_low = 0;
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+ smp_wmb(); /* make sure low gets written first */
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+ ptep->pte_high = 0;
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+}
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+
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+void xen_pmd_clear(pmd_t *pmdp)
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+{
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+ xen_set_pmd(pmdp, __pmd(0));
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+}
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+
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+unsigned long long xen_pte_val(pte_t pte)
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+{
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+ unsigned long long ret = 0;
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+
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+ if (pte.pte_low) {
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+ ret = ((unsigned long long)pte.pte_high << 32) | pte.pte_low;
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+ ret = machine_to_phys(XMADDR(ret)).paddr | 1;
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+ }
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+
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+ return ret;
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+}
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+
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+unsigned long long xen_pmd_val(pmd_t pmd)
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+{
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+ unsigned long long ret = pmd.pmd;
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+ if (ret)
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+ ret = machine_to_phys(XMADDR(ret)).paddr | 1;
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+ return ret;
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+}
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+
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+unsigned long long xen_pgd_val(pgd_t pgd)
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+{
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+ unsigned long long ret = pgd.pgd;
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+ if (ret)
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+ ret = machine_to_phys(XMADDR(ret)).paddr | 1;
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+ return ret;
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+}
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+
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+pte_t xen_make_pte(unsigned long long pte)
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+{
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+ if (pte & 1)
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+ pte = phys_to_machine(XPADDR(pte)).maddr;
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+
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+ return (pte_t){ pte, pte >> 32 };
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+}
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+
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+pmd_t xen_make_pmd(unsigned long long pmd)
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+{
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+ if (pmd & 1)
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+ pmd = phys_to_machine(XPADDR(pmd)).maddr;
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+
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+ return (pmd_t){ pmd };
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+}
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+
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+pgd_t xen_make_pgd(unsigned long long pgd)
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+{
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+ if (pgd & _PAGE_PRESENT)
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+ pgd = phys_to_machine(XPADDR(pgd)).maddr;
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+
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+ return (pgd_t){ pgd };
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+}
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+#else /* !PAE */
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+unsigned long xen_pte_val(pte_t pte)
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+{
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+ unsigned long ret = pte.pte_low;
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+
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+ if (ret & _PAGE_PRESENT)
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+ ret = machine_to_phys(XMADDR(ret)).paddr;
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+
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+ return ret;
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+}
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+
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+unsigned long xen_pmd_val(pmd_t pmd)
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+{
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+ /* a BUG here is a lot easier to track down than a NULL eip */
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+ BUG();
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+ return 0;
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+}
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+
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+unsigned long xen_pgd_val(pgd_t pgd)
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+{
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+ unsigned long ret = pgd.pgd;
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+ if (ret)
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+ ret = machine_to_phys(XMADDR(ret)).paddr | 1;
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+ return ret;
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+}
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+
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+pte_t xen_make_pte(unsigned long pte)
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+{
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+ if (pte & _PAGE_PRESENT)
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+ pte = phys_to_machine(XPADDR(pte)).maddr;
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+
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+ return (pte_t){ pte };
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+}
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+
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+pmd_t xen_make_pmd(unsigned long pmd)
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+{
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+ /* a BUG here is a lot easier to track down than a NULL eip */
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+ BUG();
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+ return __pmd(0);
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+}
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+
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+pgd_t xen_make_pgd(unsigned long pgd)
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+{
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+ if (pgd & _PAGE_PRESENT)
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+ pgd = phys_to_machine(XPADDR(pgd)).maddr;
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+
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+ return (pgd_t){ pgd };
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+}
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+#endif /* CONFIG_X86_PAE */
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+
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+
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+
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+static void pgd_walk_set_prot(void *pt, pgprot_t flags)
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+{
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+ unsigned long pfn = PFN_DOWN(__pa(pt));
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+
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+ if (HYPERVISOR_update_va_mapping((unsigned long)pt,
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+ pfn_pte(pfn, flags), 0) < 0)
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+ BUG();
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+}
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+
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+static void pgd_walk(pgd_t *pgd_base, pgprot_t flags)
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+{
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+ pgd_t *pgd = pgd_base;
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+ pud_t *pud;
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+ pmd_t *pmd;
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+ pte_t *pte;
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+ int g, u, m;
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+
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+ if (xen_feature(XENFEAT_auto_translated_physmap))
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+ return;
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+
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+ for (g = 0; g < USER_PTRS_PER_PGD; g++, pgd++) {
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+ if (pgd_none(*pgd))
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+ continue;
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+ pud = pud_offset(pgd, 0);
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+
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+ if (PTRS_PER_PUD > 1) /* not folded */
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+ pgd_walk_set_prot(pud, flags);
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+
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+ for (u = 0; u < PTRS_PER_PUD; u++, pud++) {
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+ if (pud_none(*pud))
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+ continue;
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+ pmd = pmd_offset(pud, 0);
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+
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+ if (PTRS_PER_PMD > 1) /* not folded */
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+ pgd_walk_set_prot(pmd, flags);
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+
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+ for (m = 0; m < PTRS_PER_PMD; m++, pmd++) {
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+ if (pmd_none(*pmd))
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+ continue;
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+
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+ /* This can get called before mem_map
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+ is set up, so we assume nothing is
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+ highmem at that point. */
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+ if (mem_map == NULL ||
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+ !PageHighMem(pmd_page(*pmd))) {
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+ pte = pte_offset_kernel(pmd, 0);
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+ pgd_walk_set_prot(pte, flags);
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+ }
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+ }
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+ }
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+ }
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+
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+ if (HYPERVISOR_update_va_mapping((unsigned long)pgd_base,
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+ pfn_pte(PFN_DOWN(__pa(pgd_base)),
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+ flags),
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+ UVMF_TLB_FLUSH) < 0)
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+ BUG();
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+}
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+
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+
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+/* This is called just after a mm has been duplicated from its parent,
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+ but it has not been used yet. We need to make sure that its
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+ pagetable is all read-only, and can be pinned. */
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+void xen_pgd_pin(pgd_t *pgd)
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+{
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+ struct mmuext_op op;
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+
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+ pgd_walk(pgd, PAGE_KERNEL_RO);
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+
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+#if defined(CONFIG_X86_PAE)
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+ op.cmd = MMUEXT_PIN_L3_TABLE;
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+#else
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+ op.cmd = MMUEXT_PIN_L2_TABLE;
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+#endif
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+ op.arg1.mfn = pfn_to_mfn(PFN_DOWN(__pa(pgd)));
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+ if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF) < 0)
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+ BUG();
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+}
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+
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+/* Release a pagetables pages back as normal RW */
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+void xen_pgd_unpin(pgd_t *pgd)
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+{
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+ struct mmuext_op op;
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+
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+ op.cmd = MMUEXT_UNPIN_TABLE;
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+ op.arg1.mfn = pfn_to_mfn(PFN_DOWN(__pa(pgd)));
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+
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+ if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF) < 0)
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+ BUG();
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+
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+ pgd_walk(pgd, PAGE_KERNEL);
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+}
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+
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+
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+void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
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+{
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+ xen_pgd_pin(next->pgd);
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+}
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+
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+void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
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+{
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+ xen_pgd_pin(mm->pgd);
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+}
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+
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+void xen_exit_mmap(struct mm_struct *mm)
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+{
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+ struct task_struct *tsk = current;
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+
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+ task_lock(tsk);
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+
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+ /*
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+ * We aggressively remove defunct pgd from cr3. We execute unmap_vmas()
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+ * *much* faster this way, as no tlb flushes means bigger wrpt batches.
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+ */
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+ if (tsk->active_mm == mm) {
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+ tsk->active_mm = &init_mm;
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+ atomic_inc(&init_mm.mm_count);
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+
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+ switch_mm(mm, &init_mm, tsk);
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+
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|
|
+ atomic_dec(&mm->mm_count);
|
|
|
+ BUG_ON(atomic_read(&mm->mm_count) == 0);
|
|
|
+ }
|
|
|
+
|
|
|
+ task_unlock(tsk);
|
|
|
+
|
|
|
+ xen_pgd_unpin(mm->pgd);
|
|
|
+}
|