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@@ -0,0 +1,391 @@
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+/*
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+ * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
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+ * Author: Chao Xie <chao.xie@marvell.com>
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+ * Neil Zhang <zhangwm@marvell.com>
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License as published by the
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+ * Free Software Foundation; either version 2 of the License, or (at your
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+ * option) any later version.
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/platform_device.h>
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+#include <linux/clk.h>
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+#include <linux/usb/otg.h>
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+#include <linux/platform_data/mv_usb.h>
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+
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+#define CAPLENGTH_MASK (0xff)
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+
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+struct ehci_hcd_mv {
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+ struct usb_hcd *hcd;
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+
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+ /* Which mode does this ehci running OTG/Host ? */
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+ int mode;
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+
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+ void __iomem *phy_regs;
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+ void __iomem *cap_regs;
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+ void __iomem *op_regs;
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+
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+ struct otg_transceiver *otg;
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+
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+ struct mv_usb_platform_data *pdata;
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+
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+ /* clock source and total clock number */
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+ unsigned int clknum;
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+ struct clk *clk[0];
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+};
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+
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+static void ehci_clock_enable(struct ehci_hcd_mv *ehci_mv)
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+{
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+ unsigned int i;
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+
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+ for (i = 0; i < ehci_mv->clknum; i++)
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+ clk_enable(ehci_mv->clk[i]);
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+}
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+
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+static void ehci_clock_disable(struct ehci_hcd_mv *ehci_mv)
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+{
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+ unsigned int i;
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+
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+ for (i = 0; i < ehci_mv->clknum; i++)
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+ clk_disable(ehci_mv->clk[i]);
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+}
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+
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+static int mv_ehci_enable(struct ehci_hcd_mv *ehci_mv)
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+{
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+ int retval;
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+
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+ ehci_clock_enable(ehci_mv);
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+ if (ehci_mv->pdata->phy_init) {
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+ retval = ehci_mv->pdata->phy_init(ehci_mv->phy_regs);
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+ if (retval)
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+ return retval;
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+ }
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+
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+ return 0;
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+}
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+
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+static void mv_ehci_disable(struct ehci_hcd_mv *ehci_mv)
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+{
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+ if (ehci_mv->pdata->phy_deinit)
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+ ehci_mv->pdata->phy_deinit(ehci_mv->phy_regs);
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+ ehci_clock_disable(ehci_mv);
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+}
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+
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+static int mv_ehci_reset(struct usb_hcd *hcd)
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+{
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+ struct ehci_hcd *ehci = hcd_to_ehci(hcd);
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+ struct device *dev = hcd->self.controller;
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+ struct ehci_hcd_mv *ehci_mv = dev_get_drvdata(dev);
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+ int retval;
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+
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+ if (ehci_mv == NULL) {
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+ dev_err(dev, "Can not find private ehci data\n");
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+ return -ENODEV;
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+ }
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+
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+ /*
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+ * data structure init
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+ */
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+ retval = ehci_init(hcd);
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+ if (retval) {
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+ dev_err(dev, "ehci_init failed %d\n", retval);
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+ return retval;
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+ }
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+
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+ hcd->has_tt = 1;
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+ ehci->sbrn = 0x20;
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+
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+ retval = ehci_reset(ehci);
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+ if (retval) {
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+ dev_err(dev, "ehci_reset failed %d\n", retval);
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+ return retval;
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+ }
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+
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+ return 0;
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+}
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+
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+static const struct hc_driver mv_ehci_hc_driver = {
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+ .description = hcd_name,
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+ .product_desc = "Marvell EHCI",
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+ .hcd_priv_size = sizeof(struct ehci_hcd),
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+
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+ /*
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+ * generic hardware linkage
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+ */
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+ .irq = ehci_irq,
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+ .flags = HCD_MEMORY | HCD_USB2,
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+
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+ /*
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+ * basic lifecycle operations
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+ */
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+ .reset = mv_ehci_reset,
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+ .start = ehci_run,
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+ .stop = ehci_stop,
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+ .shutdown = ehci_shutdown,
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+
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+ /*
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+ * managing i/o requests and associated device resources
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+ */
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+ .urb_enqueue = ehci_urb_enqueue,
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+ .urb_dequeue = ehci_urb_dequeue,
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+ .endpoint_disable = ehci_endpoint_disable,
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+ .endpoint_reset = ehci_endpoint_reset,
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+ .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
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+
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+ /*
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+ * scheduling support
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+ */
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+ .get_frame_number = ehci_get_frame,
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+
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+ /*
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+ * root hub support
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+ */
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+ .hub_status_data = ehci_hub_status_data,
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+ .hub_control = ehci_hub_control,
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+ .bus_suspend = ehci_bus_suspend,
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+ .bus_resume = ehci_bus_resume,
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+};
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+
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+static int mv_ehci_probe(struct platform_device *pdev)
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+{
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+ struct mv_usb_platform_data *pdata = pdev->dev.platform_data;
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+ struct usb_hcd *hcd;
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+ struct ehci_hcd *ehci;
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+ struct ehci_hcd_mv *ehci_mv;
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+ struct resource *r;
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+ int clk_i, retval = -ENODEV;
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+ u32 offset;
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+ size_t size;
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+
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+ if (!pdata) {
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+ dev_err(&pdev->dev, "missing platform_data\n");
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+ return -ENODEV;
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+ }
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+
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+ if (usb_disabled())
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+ return -ENODEV;
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+
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+ hcd = usb_create_hcd(&mv_ehci_hc_driver, &pdev->dev, "mv ehci");
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+ if (!hcd)
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+ return -ENOMEM;
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+
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+ size = sizeof(*ehci_mv) + sizeof(struct clk *) * pdata->clknum;
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+ ehci_mv = kzalloc(size, GFP_KERNEL);
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+ if (ehci_mv == NULL) {
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+ dev_err(&pdev->dev, "cannot allocate ehci_hcd_mv\n");
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+ retval = -ENOMEM;
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+ goto err_put_hcd;
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+ }
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+
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+ platform_set_drvdata(pdev, ehci_mv);
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+ ehci_mv->pdata = pdata;
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+ ehci_mv->hcd = hcd;
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+
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+ ehci_mv->clknum = pdata->clknum;
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+ for (clk_i = 0; clk_i < ehci_mv->clknum; clk_i++) {
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+ ehci_mv->clk[clk_i] =
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+ clk_get(&pdev->dev, pdata->clkname[clk_i]);
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+ if (IS_ERR(ehci_mv->clk[clk_i])) {
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+ dev_err(&pdev->dev, "error get clck \"%s\"\n",
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+ pdata->clkname[clk_i]);
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+ retval = PTR_ERR(ehci_mv->clk[clk_i]);
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+ goto err_put_clk;
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+ }
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+ }
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+
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+ r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phyregs");
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+ if (r == NULL) {
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+ dev_err(&pdev->dev, "no phy I/O memory resource defined\n");
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+ retval = -ENODEV;
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+ goto err_put_clk;
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+ }
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+
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+ ehci_mv->phy_regs = ioremap(r->start, resource_size(r));
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+ if (ehci_mv->phy_regs == 0) {
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+ dev_err(&pdev->dev, "failed to map phy I/O memory\n");
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+ retval = -EFAULT;
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+ goto err_put_clk;
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+ }
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+
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+ r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "capregs");
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+ if (!r) {
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+ dev_err(&pdev->dev, "no I/O memory resource defined\n");
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+ retval = -ENODEV;
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+ goto err_iounmap_phyreg;
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+ }
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+
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+ ehci_mv->cap_regs = ioremap(r->start, resource_size(r));
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+ if (ehci_mv->cap_regs == NULL) {
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+ dev_err(&pdev->dev, "failed to map I/O memory\n");
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+ retval = -EFAULT;
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+ goto err_iounmap_phyreg;
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+ }
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+
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+ retval = mv_ehci_enable(ehci_mv);
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+ if (retval) {
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+ dev_err(&pdev->dev, "init phy error %d\n", retval);
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+ goto err_iounmap_capreg;
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+ }
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+
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+ offset = readl(ehci_mv->cap_regs) & CAPLENGTH_MASK;
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+ ehci_mv->op_regs =
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+ (void __iomem *) ((unsigned long) ehci_mv->cap_regs + offset);
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+
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+ hcd->rsrc_start = r->start;
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+ hcd->rsrc_len = r->end - r->start + 1;
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+ hcd->regs = ehci_mv->op_regs;
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+
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+ hcd->irq = platform_get_irq(pdev, 0);
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+ if (!hcd->irq) {
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+ dev_err(&pdev->dev, "Cannot get irq.");
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+ retval = -ENODEV;
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+ goto err_disable_clk;
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+ }
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+
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+ ehci = hcd_to_ehci(hcd);
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+ ehci->caps = (struct ehci_caps *) ehci_mv->cap_regs;
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+ ehci->regs = (struct ehci_regs *) ehci_mv->op_regs;
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+ ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
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+
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+ ehci_mv->mode = pdata->mode;
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+ if (ehci_mv->mode == MV_USB_MODE_OTG) {
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+#ifdef CONFIG_USB_OTG_UTILS
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+ ehci_mv->otg = otg_get_transceiver();
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+ if (!ehci_mv->otg) {
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+ dev_err(&pdev->dev,
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+ "unable to find transceiver\n");
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+ retval = -ENODEV;
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+ goto err_disable_clk;
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+ }
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+
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+ retval = otg_set_host(ehci_mv->otg, &hcd->self);
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+ if (retval < 0) {
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+ dev_err(&pdev->dev,
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+ "unable to register with transceiver\n");
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+ retval = -ENODEV;
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+ goto err_put_transceiver;
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+ }
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+ /* otg will enable clock before use as host */
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+ mv_ehci_disable(ehci_mv);
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+#else
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+ dev_info(&pdev->dev, "MV_USB_MODE_OTG "
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+ "must have CONFIG_USB_OTG_UTILS enabled\n");
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+ goto err_disable_clk;
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+#endif
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+ } else {
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+ if (pdata->set_vbus)
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+ pdata->set_vbus(1);
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+
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+ retval = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
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+ if (retval) {
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+ dev_err(&pdev->dev,
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+ "failed to add hcd with err %d\n", retval);
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+ goto err_set_vbus;
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+ }
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+ }
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+
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+ if (pdata->private_init)
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+ pdata->private_init(ehci_mv->op_regs, ehci_mv->phy_regs);
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+
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+ dev_info(&pdev->dev,
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+ "successful find EHCI device with regs 0x%p irq %d"
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+ " working in %s mode\n", hcd->regs, hcd->irq,
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+ ehci_mv->mode == MV_USB_MODE_OTG ? "OTG" : "Host");
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+
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+ return 0;
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+
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+err_set_vbus:
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+ if (pdata->set_vbus)
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+ pdata->set_vbus(0);
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+#ifdef CONFIG_USB_OTG_UTILS
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+err_put_transceiver:
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+ if (ehci_mv->otg)
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+ otg_put_transceiver(ehci_mv->otg);
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+#endif
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+err_disable_clk:
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+ mv_ehci_disable(ehci_mv);
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+err_iounmap_capreg:
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+ iounmap(ehci_mv->cap_regs);
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+err_iounmap_phyreg:
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+ iounmap(ehci_mv->phy_regs);
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+err_put_clk:
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+ for (clk_i--; clk_i >= 0; clk_i--)
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+ clk_put(ehci_mv->clk[clk_i]);
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+ platform_set_drvdata(pdev, NULL);
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+ kfree(ehci_mv);
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+err_put_hcd:
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+ usb_put_hcd(hcd);
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+
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+ return retval;
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+}
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+
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+static int mv_ehci_remove(struct platform_device *pdev)
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+{
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+ struct ehci_hcd_mv *ehci_mv = platform_get_drvdata(pdev);
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+ struct usb_hcd *hcd = ehci_mv->hcd;
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+ int clk_i;
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+
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+ if (hcd->rh_registered)
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+ usb_remove_hcd(hcd);
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+
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+ if (ehci_mv->otg) {
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+ otg_set_host(ehci_mv->otg, NULL);
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+ otg_put_transceiver(ehci_mv->otg);
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+ }
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+
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+ if (ehci_mv->mode == MV_USB_MODE_HOST) {
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+ if (ehci_mv->pdata->set_vbus)
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+ ehci_mv->pdata->set_vbus(0);
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+
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+ mv_ehci_disable(ehci_mv);
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+ }
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+
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+ iounmap(ehci_mv->cap_regs);
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+ iounmap(ehci_mv->phy_regs);
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+
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+ for (clk_i = 0; clk_i < ehci_mv->clknum; clk_i++)
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+ clk_put(ehci_mv->clk[clk_i]);
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+
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+ platform_set_drvdata(pdev, NULL);
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+
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+ kfree(ehci_mv);
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+ usb_put_hcd(hcd);
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+
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+ return 0;
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+}
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+
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+MODULE_ALIAS("mv-ehci");
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+
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+static const struct platform_device_id ehci_id_table[] = {
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+ {"pxa-u2oehci", PXA_U2OEHCI},
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+ {"pxa-sph", PXA_SPH},
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+ {"mmp3-hsic", MMP3_HSIC},
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+ {"mmp3-fsic", MMP3_FSIC},
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+ {},
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+};
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+
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+static void mv_ehci_shutdown(struct platform_device *pdev)
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+{
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+ struct ehci_hcd_mv *ehci_mv = platform_get_drvdata(pdev);
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+ struct usb_hcd *hcd = ehci_mv->hcd;
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+
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+ if (!hcd->rh_registered)
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+ return;
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+
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+ if (hcd->driver->shutdown)
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+ hcd->driver->shutdown(hcd);
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+}
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+
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+static struct platform_driver ehci_mv_driver = {
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+ .probe = mv_ehci_probe,
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+ .remove = mv_ehci_remove,
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+ .shutdown = mv_ehci_shutdown,
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+ .driver = {
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+ .name = "mv-ehci",
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+ .bus = &platform_bus_type,
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+ },
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+ .id_table = ehci_id_table,
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+};
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