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@@ -26,6 +26,7 @@
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#include <linux/clocksource.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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+#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <asm/mach/time.h>
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@@ -33,8 +34,6 @@
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#include <asm/sched_clock.h>
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#include "board.h"
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-#include "clock.h"
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-#include "iomap.h"
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#define RTC_SECONDS 0x08
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#define RTC_SHADOW_SECONDS 0x0c
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@@ -52,8 +51,8 @@
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#define TIMER_PTV 0x0
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#define TIMER_PCR 0x4
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-static void __iomem *timer_reg_base = IO_ADDRESS(TEGRA_TMR1_BASE);
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-static void __iomem *rtc_base = IO_ADDRESS(TEGRA_RTC_BASE);
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+static void __iomem *timer_reg_base;
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+static void __iomem *rtc_base;
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static struct timespec persistent_ts;
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static u64 persistent_ms, last_persistent_ms;
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@@ -164,6 +163,11 @@ static const struct of_device_id timer_match[] __initconst = {
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{}
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};
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+static const struct of_device_id rtc_match[] __initconst = {
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+ { .compatible = "nvidia,tegra20-rtc" },
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+ {}
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+};
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+
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static void __init tegra_init_timer(void)
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{
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struct device_node *np;
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@@ -177,6 +181,12 @@ static void __init tegra_init_timer(void)
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BUG();
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}
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+ timer_reg_base = of_iomap(np, 0);
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+ if (!timer_reg_base) {
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+ pr_err("Can't map timer registers");
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+ BUG();
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+ }
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+
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tegra_timer_irq.irq = irq_of_parse_and_map(np, 2);
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if (tegra_timer_irq.irq <= 0) {
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pr_err("Failed to map timer IRQ\n");
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@@ -192,6 +202,20 @@ static void __init tegra_init_timer(void)
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rate = clk_get_rate(clk);
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}
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+ of_node_put(np);
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+
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+ np = of_find_matching_node(NULL, rtc_match);
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+ if (!np) {
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+ pr_err("Failed to find RTC DT node\n");
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+ BUG();
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+ }
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+
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+ rtc_base = of_iomap(np, 0);
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+ if (!rtc_base) {
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+ pr_err("Can't map RTC registers");
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+ BUG();
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+ }
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+
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/*
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* rtc registers are used by read_persistent_clock, keep the rtc clock
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* enabled
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