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@@ -31,20 +31,20 @@
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* contiguous (although various IO spaces may punch holes in
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* it)..
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*
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- * N - Number of bits in the node portion of a socket physical
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- * address.
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+ * N - Number of bits in the node portion of a socket physical
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+ * address.
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*
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- * NASID - network ID of a router, Mbrick or Cbrick. Nasid values of
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- * routers always have low bit of 1, C/MBricks have low bit
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- * equal to 0. Most addressing macros that target UV hub chips
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- * right shift the NASID by 1 to exclude the always-zero bit.
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- * NASIDs contain up to 15 bits.
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+ * NASID - network ID of a router, Mbrick or Cbrick. Nasid values of
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+ * routers always have low bit of 1, C/MBricks have low bit
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+ * equal to 0. Most addressing macros that target UV hub chips
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+ * right shift the NASID by 1 to exclude the always-zero bit.
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+ * NASIDs contain up to 15 bits.
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*
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* GNODE - NASID right shifted by 1 bit. Most mmrs contain gnodes instead
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* of nasids.
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*
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- * PNODE - the low N bits of the GNODE. The PNODE is the most useful variant
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- * of the nasid for socket usage.
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+ * PNODE - the low N bits of the GNODE. The PNODE is the most useful variant
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+ * of the nasid for socket usage.
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*
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*
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* NumaLink Global Physical Address Format:
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@@ -71,12 +71,12 @@
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*
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*
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* APICID format
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- * NOTE!!!!!! This is the current format of the APICID. However, code
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- * should assume that this will change in the future. Use functions
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- * in this file for all APICID bit manipulations and conversion.
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+ * NOTE!!!!!! This is the current format of the APICID. However, code
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+ * should assume that this will change in the future. Use functions
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+ * in this file for all APICID bit manipulations and conversion.
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*
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- * 1111110000000000
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- * 5432109876543210
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+ * 1111110000000000
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+ * 5432109876543210
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* pppppppppplc0cch
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* sssssssssss
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*
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@@ -89,9 +89,9 @@
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* Note: Processor only supports 12 bits in the APICID register. The ACPI
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* tables hold all 16 bits. Software needs to be aware of this.
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*
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- * Unless otherwise specified, all references to APICID refer to
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- * the FULL value contained in ACPI tables, not the subset in the
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- * processor APICID register.
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+ * Unless otherwise specified, all references to APICID refer to
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+ * the FULL value contained in ACPI tables, not the subset in the
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+ * processor APICID register.
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*/
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@@ -151,16 +151,16 @@ struct uv_hub_info_s {
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};
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DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
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-#define uv_hub_info (&__get_cpu_var(__uv_hub_info))
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+#define uv_hub_info (&__get_cpu_var(__uv_hub_info))
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#define uv_cpu_hub_info(cpu) (&per_cpu(__uv_hub_info, cpu))
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/*
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* Local & Global MMR space macros.
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- * Note: macros are intended to be used ONLY by inline functions
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- * in this file - not by other kernel code.
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- * n - NASID (full 15-bit global nasid)
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- * g - GNODE (full 15-bit global nasid, right shifted 1)
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- * p - PNODE (local part of nsids, right shifted 1)
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+ * Note: macros are intended to be used ONLY by inline functions
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+ * in this file - not by other kernel code.
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+ * n - NASID (full 15-bit global nasid)
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+ * g - GNODE (full 15-bit global nasid, right shifted 1)
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+ * p - PNODE (local part of nsids, right shifted 1)
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*/
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#define UV_NASID_TO_PNODE(n) (((n) >> 1) & uv_hub_info->pnode_mask)
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#define UV_PNODE_TO_GNODE(p) ((p) |uv_hub_info->gnode_extra)
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@@ -215,8 +215,8 @@ DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
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/*
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* Macros for converting between kernel virtual addresses, socket local physical
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* addresses, and UV global physical addresses.
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- * Note: use the standard __pa() & __va() macros for converting
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- * between socket virtual and socket physical addresses.
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+ * Note: use the standard __pa() & __va() macros for converting
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+ * between socket virtual and socket physical addresses.
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*/
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/* socket phys RAM --> UV global physical address */
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@@ -287,21 +287,18 @@ static inline int uv_apicid_to_pnode(int apicid)
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* Access global MMRs using the low memory MMR32 space. This region supports
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* faster MMR access but not all MMRs are accessible in this space.
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*/
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-static inline unsigned long *uv_global_mmr32_address(int pnode,
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- unsigned long offset)
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+static inline unsigned long *uv_global_mmr32_address(int pnode, unsigned long offset)
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{
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return __va(UV_GLOBAL_MMR32_BASE |
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UV_GLOBAL_MMR32_PNODE_BITS(pnode) | offset);
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}
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-static inline void uv_write_global_mmr32(int pnode, unsigned long offset,
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- unsigned long val)
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+static inline void uv_write_global_mmr32(int pnode, unsigned long offset, unsigned long val)
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{
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writeq(val, uv_global_mmr32_address(pnode, offset));
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}
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-static inline unsigned long uv_read_global_mmr32(int pnode,
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- unsigned long offset)
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+static inline unsigned long uv_read_global_mmr32(int pnode, unsigned long offset)
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{
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return readq(uv_global_mmr32_address(pnode, offset));
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}
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@@ -310,21 +307,18 @@ static inline unsigned long uv_read_global_mmr32(int pnode,
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* Access Global MMR space using the MMR space located at the top of physical
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* memory.
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*/
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-static inline unsigned long *uv_global_mmr64_address(int pnode,
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- unsigned long offset)
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+static inline unsigned long *uv_global_mmr64_address(int pnode, unsigned long offset)
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{
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return __va(UV_GLOBAL_MMR64_BASE |
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UV_GLOBAL_MMR64_PNODE_BITS(pnode) | offset);
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}
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-static inline void uv_write_global_mmr64(int pnode, unsigned long offset,
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- unsigned long val)
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+static inline void uv_write_global_mmr64(int pnode, unsigned long offset, unsigned long val)
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{
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writeq(val, uv_global_mmr64_address(pnode, offset));
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}
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-static inline unsigned long uv_read_global_mmr64(int pnode,
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- unsigned long offset)
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+static inline unsigned long uv_read_global_mmr64(int pnode, unsigned long offset)
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{
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return readq(uv_global_mmr64_address(pnode, offset));
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}
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@@ -338,6 +332,16 @@ static inline unsigned long uv_global_gru_mmr_address(int pnode, unsigned long o
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return UV_GLOBAL_GRU_MMR_BASE | offset | (pnode << uv_hub_info->m_val);
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}
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+static inline void uv_write_global_mmr8(int pnode, unsigned long offset, unsigned char val)
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+{
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+ writeb(val, uv_global_mmr64_address(pnode, offset));
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+}
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+
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+static inline unsigned char uv_read_global_mmr8(int pnode, unsigned long offset)
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+{
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+ return readb(uv_global_mmr64_address(pnode, offset));
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+}
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+
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/*
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* Access hub local MMRs. Faster than using global space but only local MMRs
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* are accessible.
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@@ -457,11 +461,17 @@ static inline void uv_set_scir_bits(unsigned char value)
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}
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}
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+static inline unsigned long uv_scir_offset(int apicid)
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+{
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+ return SCIR_LOCAL_MMR_BASE | (apicid & 0x3f);
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+}
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+
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static inline void uv_set_cpu_scir_bits(int cpu, unsigned char value)
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{
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if (uv_cpu_hub_info(cpu)->scir.state != value) {
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+ uv_write_global_mmr8(uv_cpu_to_pnode(cpu),
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+ uv_cpu_hub_info(cpu)->scir.offset, value);
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uv_cpu_hub_info(cpu)->scir.state = value;
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- uv_write_local_mmr8(uv_cpu_hub_info(cpu)->scir.offset, value);
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}
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}
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