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@@ -204,6 +204,23 @@ static int __init ppc4xx_setup_one_pci_PMM(struct pci_controller *hose,
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{
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u32 ma, pcila, pciha;
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+ /* Hack warning ! The "old" PCI 2.x cell only let us configure the low
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+ * 32-bit of incoming PLB addresses. The top 4 bits of the 36-bit
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+ * address are actually hard wired to a value that appears to depend
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+ * on the specific SoC. For example, it's 0 on 440EP and 1 on 440EPx.
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+ *
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+ * The trick here is we just crop those top bits and ignore them when
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+ * programming the chip. That means the device-tree has to be right
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+ * for the specific part used (we don't print a warning if it's wrong
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+ * but on the other hand, you'll crash quickly enough), but at least
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+ * this code should work whatever the hard coded value is
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+ */
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+ plb_addr &= 0xffffffffull;
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+
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+ /* Note: Due to the above hack, the test below doesn't actually test
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+ * if you address is above 4G, but it tests that address and
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+ * (address + size) are both contained in the same 4G
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+ */
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if ((plb_addr + size) > 0xffffffffull || !is_power_of_2(size) ||
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size < 0x1000 || (plb_addr & (size - 1)) != 0) {
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printk(KERN_WARNING "%s: Resource out of range\n",
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Linus Torvalds