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@@ -7,6 +7,7 @@
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* Copyright (C) 2008, 2009 Wind River Systems
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* written by Ralf Baechle <ralf@linux-mips.org>
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*/
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+#include <linux/compiler.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/console.h>
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@@ -712,7 +713,7 @@ void __init prom_init(void)
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if (cvmx_read_csr(CVMX_L2D_FUS3) & (3ull << 34)) {
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pr_info("Skipping L2 locking due to reduced L2 cache size\n");
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} else {
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- uint32_t ebase = read_c0_ebase() & 0x3ffff000;
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+ uint32_t __maybe_unused ebase = read_c0_ebase() & 0x3ffff000;
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#ifdef CONFIG_CAVIUM_OCTEON_LOCK_L2_TLB
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/* TLB refill */
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cvmx_l2c_lock_mem_region(ebase, 0x100);
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