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@@ -258,6 +258,25 @@ MODULE_SUPPORTED_DEVICE("{{RME HDSPM-MADI}}");
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#define HDSPM_wclk_sel (1<<30)
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+/* additional control register bits for AIO*/
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+#define HDSPM_c0_Wck48 0x20 /* also RayDAT */
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+#define HDSPM_c0_Input0 0x1000
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+#define HDSPM_c0_Input1 0x2000
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+#define HDSPM_c0_Spdif_Opt 0x4000
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+#define HDSPM_c0_Pro 0x8000
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+#define HDSPM_c0_clr_tms 0x10000
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+#define HDSPM_c0_AEB1 0x20000
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+#define HDSPM_c0_AEB2 0x40000
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+#define HDSPM_c0_LineOut 0x80000
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+#define HDSPM_c0_AD_GAIN0 0x100000
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+#define HDSPM_c0_AD_GAIN1 0x200000
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+#define HDSPM_c0_DA_GAIN0 0x400000
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+#define HDSPM_c0_DA_GAIN1 0x800000
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+#define HDSPM_c0_PH_GAIN0 0x1000000
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+#define HDSPM_c0_PH_GAIN1 0x2000000
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+#define HDSPM_c0_Sym6db 0x4000000
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+
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+
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/* --- bit helper defines */
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#define HDSPM_LatencyMask (HDSPM_Latency0|HDSPM_Latency1|HDSPM_Latency2)
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#define HDSPM_FrequencyMask (HDSPM_Frequency0|HDSPM_Frequency1|\
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