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@@ -721,9 +721,8 @@ ex_handler_done:
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* Many of these bits are software only. Bits we don't set
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* here we (properly should) assume have the appropriate value.
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*/
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+ brid finish_tlb_load
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andni r4, r4, 0x0ce2 /* Make sure 20, 21 are zero */
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-
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- bri finish_tlb_load
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ex7:
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/* The bailout. Restore registers to pre-exception conditions
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* and call the heavyweights to help us out.
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@@ -779,7 +778,7 @@ ex_handler_done:
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lwi r4, r5, 0 /* Get Linux PTE */
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andi r6, r4, _PAGE_PRESENT
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- beqi r6, ex7
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+ beqi r6, ex10
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ori r4, r4, _PAGE_ACCESSED
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swi r4, r5, 0
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@@ -792,9 +791,8 @@ ex_handler_done:
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* Many of these bits are software only. Bits we don't set
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* here we (properly should) assume have the appropriate value.
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*/
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+ brid finish_tlb_load
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andni r4, r4, 0x0ce2 /* Make sure 20, 21 are zero */
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-
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- bri finish_tlb_load
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ex10:
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/* The bailout. Restore registers to pre-exception conditions
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* and call the heavyweights to help us out.
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@@ -824,9 +822,9 @@ ex_handler_done:
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andi r5, r5, (MICROBLAZE_TLB_SIZE-1)
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ori r6, r0, 1
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cmp r31, r5, r6
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- blti r31, sem
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+ blti r31, ex12
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addik r5, r6, 1
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- sem:
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+ ex12:
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/* MS: save back current TLB index */
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swi r5, r0, TOPHYS(tlb_index)
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@@ -846,7 +844,6 @@ ex_handler_done:
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nop
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/* Done...restore registers and get out of here. */
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- ex12:
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mts rpid, r11
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nop
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bri 4
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