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@@ -0,0 +1,345 @@
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+/*
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+ * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms and conditions of the GNU General Public License,
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+ * version 2, as published by the Free Software Foundation.
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+ */
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+
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+#include <linux/module.h>
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+#include <linux/platform_device.h>
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+#include <linux/clk.h>
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+#include <linux/delay.h>
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+#include <linux/err.h>
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+#include <linux/io.h>
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+#include <linux/usb/otg.h>
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+#include <linux/platform_data/mv_usb.h>
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+
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+#include "mv_u3d_phy.h"
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+
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+/*
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+ * struct mv_u3d_phy - transceiver driver state
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+ * @phy: transceiver structure
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+ * @dev: The parent device supplied to the probe function
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+ * @clk: usb phy clock
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+ * @base: usb phy register memory base
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+ */
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+struct mv_u3d_phy {
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+ struct usb_phy phy;
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+ struct mv_usb_platform_data *plat;
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+ struct device *dev;
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+ struct clk *clk;
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+ void __iomem *base;
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+};
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+
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+static u32 mv_u3d_phy_read(void __iomem *base, u32 reg)
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+{
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+ void __iomem *addr, *data;
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+
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+ addr = base;
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+ data = base + 0x4;
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+
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+ writel_relaxed(reg, addr);
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+ return readl_relaxed(data);
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+}
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+
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+static void mv_u3d_phy_set(void __iomem *base, u32 reg, u32 value)
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+{
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+ void __iomem *addr, *data;
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+ u32 tmp;
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+
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+ addr = base;
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+ data = base + 0x4;
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+
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+ writel_relaxed(reg, addr);
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+ tmp = readl_relaxed(data);
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+ tmp |= value;
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+ writel_relaxed(tmp, data);
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+}
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+
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+static void mv_u3d_phy_clear(void __iomem *base, u32 reg, u32 value)
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+{
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+ void __iomem *addr, *data;
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+ u32 tmp;
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+
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+ addr = base;
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+ data = base + 0x4;
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+
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+ writel_relaxed(reg, addr);
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+ tmp = readl_relaxed(data);
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+ tmp &= ~value;
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+ writel_relaxed(tmp, data);
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+}
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+
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+static void mv_u3d_phy_write(void __iomem *base, u32 reg, u32 value)
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+{
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+ void __iomem *addr, *data;
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+
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+ addr = base;
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+ data = base + 0x4;
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+
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+ writel_relaxed(reg, addr);
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+ writel_relaxed(value, data);
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+}
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+
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+void mv_u3d_phy_shutdown(struct usb_phy *phy)
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+{
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+ struct mv_u3d_phy *mv_u3d_phy;
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+ void __iomem *base;
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+ u32 val;
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+
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+ mv_u3d_phy = container_of(phy, struct mv_u3d_phy, phy);
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+ base = mv_u3d_phy->base;
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+
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+ /* Power down Reference Analog current, bit 15
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+ * Power down PLL, bit 14
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+ * Power down Receiver, bit 13
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+ * Power down Transmitter, bit 12
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+ * of USB3_POWER_PLL_CONTROL register
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+ */
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+ val = mv_u3d_phy_read(base, USB3_POWER_PLL_CONTROL);
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+ val &= ~(USB3_POWER_PLL_CONTROL_PU);
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+ mv_u3d_phy_write(base, USB3_POWER_PLL_CONTROL, val);
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+
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+ if (mv_u3d_phy->clk)
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+ clk_disable(mv_u3d_phy->clk);
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+}
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+
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+static int mv_u3d_phy_init(struct usb_phy *phy)
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+{
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+ struct mv_u3d_phy *mv_u3d_phy;
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+ void __iomem *base;
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+ u32 val, count;
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+
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+ /* enable usb3 phy */
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+ mv_u3d_phy = container_of(phy, struct mv_u3d_phy, phy);
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+
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+ if (mv_u3d_phy->clk)
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+ clk_enable(mv_u3d_phy->clk);
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+
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+ base = mv_u3d_phy->base;
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+
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+ val = mv_u3d_phy_read(base, USB3_POWER_PLL_CONTROL);
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+ val &= ~(USB3_POWER_PLL_CONTROL_PU_MASK);
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+ val |= 0xF << USB3_POWER_PLL_CONTROL_PU_SHIFT;
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+ mv_u3d_phy_write(base, USB3_POWER_PLL_CONTROL, val);
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+ udelay(100);
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+
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+ mv_u3d_phy_write(base, USB3_RESET_CONTROL,
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+ USB3_RESET_CONTROL_RESET_PIPE);
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+ udelay(100);
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+
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+ mv_u3d_phy_write(base, USB3_RESET_CONTROL,
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+ USB3_RESET_CONTROL_RESET_PIPE
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+ | USB3_RESET_CONTROL_RESET_PHY);
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+ udelay(100);
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+
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+ val = mv_u3d_phy_read(base, USB3_POWER_PLL_CONTROL);
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+ val &= ~(USB3_POWER_PLL_CONTROL_REF_FREF_SEL_MASK
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+ | USB3_POWER_PLL_CONTROL_PHY_MODE_MASK);
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+ val |= (USB3_PLL_25MHZ << USB3_POWER_PLL_CONTROL_REF_FREF_SEL_SHIFT)
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+ | (0x5 << USB3_POWER_PLL_CONTROL_PHY_MODE_SHIFT);
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+ mv_u3d_phy_write(base, USB3_POWER_PLL_CONTROL, val);
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+ udelay(100);
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+
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+ mv_u3d_phy_clear(base, USB3_KVCO_CALI_CONTROL,
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+ USB3_KVCO_CALI_CONTROL_USE_MAX_PLL_RATE_MASK);
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+ udelay(100);
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+
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+ val = mv_u3d_phy_read(base, USB3_SQUELCH_FFE);
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+ val &= ~(USB3_SQUELCH_FFE_FFE_CAP_SEL_MASK
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+ | USB3_SQUELCH_FFE_FFE_RES_SEL_MASK
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+ | USB3_SQUELCH_FFE_SQ_THRESH_IN_MASK);
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+ val |= ((0xD << USB3_SQUELCH_FFE_FFE_CAP_SEL_SHIFT)
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+ | (0x7 << USB3_SQUELCH_FFE_FFE_RES_SEL_SHIFT)
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+ | (0x8 << USB3_SQUELCH_FFE_SQ_THRESH_IN_SHIFT));
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+ mv_u3d_phy_write(base, USB3_SQUELCH_FFE, val);
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+ udelay(100);
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+
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+ val = mv_u3d_phy_read(base, USB3_GEN1_SET0);
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+ val &= ~USB3_GEN1_SET0_G1_TX_SLEW_CTRL_EN_MASK;
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+ val |= 1 << USB3_GEN1_SET0_G1_TX_EMPH_EN_SHIFT;
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+ mv_u3d_phy_write(base, USB3_GEN1_SET0, val);
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+ udelay(100);
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+
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+ val = mv_u3d_phy_read(base, USB3_GEN2_SET0);
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+ val &= ~(USB3_GEN2_SET0_G2_TX_AMP_MASK
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+ | USB3_GEN2_SET0_G2_TX_EMPH_AMP_MASK
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+ | USB3_GEN2_SET0_G2_TX_SLEW_CTRL_EN_MASK);
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+ val |= ((0x14 << USB3_GEN2_SET0_G2_TX_AMP_SHIFT)
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+ | (1 << USB3_GEN2_SET0_G2_TX_AMP_ADJ_SHIFT)
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+ | (0xA << USB3_GEN2_SET0_G2_TX_EMPH_AMP_SHIFT)
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+ | (1 << USB3_GEN2_SET0_G2_TX_EMPH_EN_SHIFT));
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+ mv_u3d_phy_write(base, USB3_GEN2_SET0, val);
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+ udelay(100);
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+
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+ mv_u3d_phy_read(base, USB3_TX_EMPPH);
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+ val &= ~(USB3_TX_EMPPH_AMP_MASK
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+ | USB3_TX_EMPPH_EN_MASK
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+ | USB3_TX_EMPPH_AMP_FORCE_MASK
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+ | USB3_TX_EMPPH_PAR1_MASK
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+ | USB3_TX_EMPPH_PAR2_MASK);
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+ val |= ((0xB << USB3_TX_EMPPH_AMP_SHIFT)
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+ | (1 << USB3_TX_EMPPH_EN_SHIFT)
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+ | (1 << USB3_TX_EMPPH_AMP_FORCE_SHIFT)
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+ | (0x1C << USB3_TX_EMPPH_PAR1_SHIFT)
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+ | (1 << USB3_TX_EMPPH_PAR2_SHIFT));
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+
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+ mv_u3d_phy_write(base, USB3_TX_EMPPH, val);
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+ udelay(100);
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+
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+ val = mv_u3d_phy_read(base, USB3_GEN2_SET1);
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+ val &= ~(USB3_GEN2_SET1_G2_RX_SELMUPI_MASK
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+ | USB3_GEN2_SET1_G2_RX_SELMUPF_MASK
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+ | USB3_GEN2_SET1_G2_RX_SELMUFI_MASK
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+ | USB3_GEN2_SET1_G2_RX_SELMUFF_MASK);
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+ val |= ((1 << USB3_GEN2_SET1_G2_RX_SELMUPI_SHIFT)
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+ | (1 << USB3_GEN2_SET1_G2_RX_SELMUPF_SHIFT)
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+ | (1 << USB3_GEN2_SET1_G2_RX_SELMUFI_SHIFT)
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+ | (1 << USB3_GEN2_SET1_G2_RX_SELMUFF_SHIFT));
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+ mv_u3d_phy_write(base, USB3_GEN2_SET1, val);
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+ udelay(100);
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+
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+ val = mv_u3d_phy_read(base, USB3_DIGITAL_LOOPBACK_EN);
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+ val &= ~USB3_DIGITAL_LOOPBACK_EN_SEL_BITS_MASK;
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+ val |= 1 << USB3_DIGITAL_LOOPBACK_EN_SEL_BITS_SHIFT;
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+ mv_u3d_phy_write(base, USB3_DIGITAL_LOOPBACK_EN, val);
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+ udelay(100);
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+
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+ val = mv_u3d_phy_read(base, USB3_IMPEDANCE_TX_SSC);
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+ val &= ~USB3_IMPEDANCE_TX_SSC_SSC_AMP_MASK;
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+ val |= 0xC << USB3_IMPEDANCE_TX_SSC_SSC_AMP_SHIFT;
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+ mv_u3d_phy_write(base, USB3_IMPEDANCE_TX_SSC, val);
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+ udelay(100);
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+
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+ val = mv_u3d_phy_read(base, USB3_IMPEDANCE_CALI_CTRL);
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+ val &= ~USB3_IMPEDANCE_CALI_CTRL_IMP_CAL_THR_MASK;
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+ val |= 0x4 << USB3_IMPEDANCE_CALI_CTRL_IMP_CAL_THR_SHIFT;
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+ mv_u3d_phy_write(base, USB3_IMPEDANCE_CALI_CTRL, val);
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+ udelay(100);
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+
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+ val = mv_u3d_phy_read(base, USB3_PHY_ISOLATION_MODE);
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+ val &= ~(USB3_PHY_ISOLATION_MODE_PHY_GEN_RX_MASK
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+ | USB3_PHY_ISOLATION_MODE_PHY_GEN_TX_MASK
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+ | USB3_PHY_ISOLATION_MODE_TX_DRV_IDLE_MASK);
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+ val |= ((1 << USB3_PHY_ISOLATION_MODE_PHY_GEN_RX_SHIFT)
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+ | (1 << USB3_PHY_ISOLATION_MODE_PHY_GEN_TX_SHIFT));
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+ mv_u3d_phy_write(base, USB3_PHY_ISOLATION_MODE, val);
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+ udelay(100);
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+
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+ val = mv_u3d_phy_read(base, USB3_TXDETRX);
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+ val &= ~(USB3_TXDETRX_VTHSEL_MASK);
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+ val |= 0x1 << USB3_TXDETRX_VTHSEL_SHIFT;
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+ mv_u3d_phy_write(base, USB3_TXDETRX, val);
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+ udelay(100);
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+
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+ dev_dbg(mv_u3d_phy->dev, "start calibration\n");
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+
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+calstart:
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+ /* Perform Manual Calibration */
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+ mv_u3d_phy_set(base, USB3_KVCO_CALI_CONTROL,
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+ 1 << USB3_KVCO_CALI_CONTROL_CAL_START_SHIFT);
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+
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+ mdelay(1);
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+
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+ count = 0;
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+ while (1) {
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+ val = mv_u3d_phy_read(base, USB3_KVCO_CALI_CONTROL);
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+ if (val & (1 << USB3_KVCO_CALI_CONTROL_CAL_DONE_SHIFT))
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+ break;
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+ else if (count > 50) {
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+ dev_dbg(mv_u3d_phy->dev, "calibration failure, retry...\n");
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+ goto calstart;
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+ }
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+ count++;
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+ mdelay(1);
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+ }
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+
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+ /* active PIPE interface */
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+ mv_u3d_phy_write(base, USB3_PIPE_SM_CTRL,
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+ 1 << USB3_PIPE_SM_CTRL_PHY_INIT_DONE);
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+
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+ return 0;
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+}
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+
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+static int __devinit mv_u3d_phy_probe(struct platform_device *pdev)
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+{
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+ struct mv_u3d_phy *mv_u3d_phy;
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+ struct mv_usb_platform_data *pdata;
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+ struct device *dev = &pdev->dev;
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+ struct resource *res;
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+ void __iomem *phy_base;
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+ int ret;
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+
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+ pdata = pdev->dev.platform_data;
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+ if (!pdata) {
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+ dev_err(&pdev->dev, "%s: no platform data defined\n", __func__);
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+ return -EINVAL;
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+ }
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+
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ if (!res) {
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+ dev_err(dev, "missing mem resource\n");
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+ return -ENODEV;
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+ }
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+
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+ phy_base = devm_request_and_ioremap(dev, res);
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+ if (!phy_base) {
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+ dev_err(dev, "%s: register mapping failed\n", __func__);
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+ return -ENXIO;
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+ }
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+
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+ mv_u3d_phy = devm_kzalloc(dev, sizeof(*mv_u3d_phy), GFP_KERNEL);
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+ if (!mv_u3d_phy)
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+ return -ENOMEM;
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+
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+ mv_u3d_phy->dev = &pdev->dev;
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+ mv_u3d_phy->plat = pdata;
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+ mv_u3d_phy->base = phy_base;
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+ mv_u3d_phy->phy.dev = mv_u3d_phy->dev;
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+ mv_u3d_phy->phy.label = "mv-u3d-phy";
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+ mv_u3d_phy->phy.init = mv_u3d_phy_init;
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+ mv_u3d_phy->phy.shutdown = mv_u3d_phy_shutdown;
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+
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+ ret = usb_add_phy(&mv_u3d_phy->phy, USB_PHY_TYPE_USB3);
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+ if (ret)
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+ goto err;
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+
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+ if (!mv_u3d_phy->clk)
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+ mv_u3d_phy->clk = clk_get(mv_u3d_phy->dev, "u3dphy");
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+
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+ platform_set_drvdata(pdev, mv_u3d_phy);
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+
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+ dev_info(&pdev->dev, "Initialized Marvell USB 3.0 PHY\n");
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+err:
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+ return ret;
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+}
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+
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+static int __exit mv_u3d_phy_remove(struct platform_device *pdev)
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+{
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+ struct mv_u3d_phy *mv_u3d_phy = platform_get_drvdata(pdev);
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+
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+ usb_remove_phy(&mv_u3d_phy->phy);
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+
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+ if (mv_u3d_phy->clk) {
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+ clk_put(mv_u3d_phy->clk);
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+ mv_u3d_phy->clk = NULL;
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+ }
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+
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+ return 0;
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+}
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+
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+static struct platform_driver mv_u3d_phy_driver = {
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+ .probe = mv_u3d_phy_probe,
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+ .remove = __devexit_p(mv_u3d_phy_remove),
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+ .driver = {
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+ .name = "mv-u3d-phy",
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+ .owner = THIS_MODULE,
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+ },
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+};
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+
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+module_platform_driver(mv_u3d_phy_driver);
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+MODULE_DESCRIPTION("Marvell USB 3.0 PHY controller");
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+MODULE_AUTHOR("Yu Xu <yuxu@marvell.com>");
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+MODULE_LICENSE("GPL");
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+MODULE_ALIAS("platform:mv-u3d-phy");
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