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@@ -1,138 +0,0 @@
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-#ifndef __ASM_MACH_APIC_H
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-#define __ASM_MACH_APIC_H
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-
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-#define xapic_phys_to_log_apicid(cpu) (per_cpu(x86_bios_cpu_apicid, cpu))
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-
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-static inline int bigsmp_apic_id_registered(void)
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-{
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- return 1;
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-}
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-
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-static inline const cpumask_t *bigsmp_target_cpus(void)
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-{
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-#ifdef CONFIG_SMP
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- return &cpu_online_map;
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-#else
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- return &cpumask_of_cpu(0);
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-#endif
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-}
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-
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-#define APIC_DFR_VALUE (APIC_DFR_FLAT)
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-
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-static inline unsigned long
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-bigsmp_check_apicid_used(physid_mask_t bitmap, int apicid)
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-{
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- return 0;
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-}
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-
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-static inline unsigned long bigsmp_check_apicid_present(int bit)
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-{
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- return 1;
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-}
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-
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-static inline unsigned long calculate_ldr(int cpu)
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-{
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- unsigned long val, id;
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- val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
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- id = xapic_phys_to_log_apicid(cpu);
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- val |= SET_APIC_LOGICAL_ID(id);
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- return val;
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-}
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-
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-/*
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- * Set up the logical destination ID.
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- *
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- * Intel recommends to set DFR, LDR and TPR before enabling
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- * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
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- * document number 292116). So here it goes...
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- */
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-static inline void bigsmp_init_apic_ldr(void)
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-{
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- unsigned long val;
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- int cpu = smp_processor_id();
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-
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- apic_write(APIC_DFR, APIC_DFR_VALUE);
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- val = calculate_ldr(cpu);
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- apic_write(APIC_LDR, val);
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-}
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-
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-static inline void bigsmp_setup_apic_routing(void)
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-{
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- printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
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- "Physflat", nr_ioapics);
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-}
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-
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-static inline int bigsmp_apicid_to_node(int logical_apicid)
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-{
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- return apicid_2_node[hard_smp_processor_id()];
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-}
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-
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-static inline int bigsmp_cpu_present_to_apicid(int mps_cpu)
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-{
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- if (mps_cpu < nr_cpu_ids)
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- return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
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-
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- return BAD_APICID;
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-}
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-
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-static inline physid_mask_t bigsmp_apicid_to_cpu_present(int phys_apicid)
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-{
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- return physid_mask_of_physid(phys_apicid);
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-}
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-
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-extern u8 cpu_2_logical_apicid[];
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-/* Mapping from cpu number to logical apicid */
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-static inline int bigsmp_cpu_to_logical_apicid(int cpu)
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-{
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- if (cpu >= nr_cpu_ids)
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- return BAD_APICID;
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- return cpu_physical_id(cpu);
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-}
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-
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-static inline physid_mask_t bigsmp_ioapic_phys_id_map(physid_mask_t phys_map)
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-{
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- /* For clustered we don't have a good way to do this yet - hack */
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- return physids_promote(0xFFL);
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-}
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-
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-static inline void bigsmp_setup_portio_remap(void)
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-{
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-}
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-
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-static inline int bigsmp_check_phys_apicid_present(int boot_cpu_physical_apicid)
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-{
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- return 1;
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-}
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-
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-/* As we are using single CPU as destination, pick only one CPU here */
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-static inline unsigned int bigsmp_cpu_mask_to_apicid(const cpumask_t *cpumask)
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-{
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- return bigsmp_cpu_to_logical_apicid(first_cpu(*cpumask));
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-}
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-
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-static inline unsigned int
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-bigsmp_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
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- const struct cpumask *andmask)
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-{
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- int cpu;
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-
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- /*
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- * We're using fixed IRQ delivery, can only return one phys APIC ID.
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- * May as well be the first.
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- */
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- for_each_cpu_and(cpu, cpumask, andmask) {
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- if (cpumask_test_cpu(cpu, cpu_online_mask))
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- break;
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- }
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- if (cpu < nr_cpu_ids)
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- return bigsmp_cpu_to_logical_apicid(cpu);
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-
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- return BAD_APICID;
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-}
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-
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-static inline int bigsmp_phys_pkg_id(int cpuid_apic, int index_msb)
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-{
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- return cpuid_apic >> index_msb;
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-}
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-
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-#endif /* __ASM_MACH_APIC_H */
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