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@@ -25,12 +25,6 @@
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#define DAVINCI_CPUIDLE_MAX_STATES 2
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-struct davinci_ops {
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- void (*enter) (void);
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- void (*exit) (void);
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- u32 flags;
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-};
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-
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static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device);
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static void __iomem *ddr2_reg_base;
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static bool ddr2_pdown;
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@@ -54,39 +48,17 @@ static void davinci_save_ddr_power(int enter, bool pdown)
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__raw_writel(val, ddr2_reg_base + DDR2_SDRCR_OFFSET);
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}
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-static void davinci_c2state_enter(void)
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-{
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- davinci_save_ddr_power(1, ddr2_pdown);
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-}
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-
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-static void davinci_c2state_exit(void)
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-{
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- davinci_save_ddr_power(0, ddr2_pdown);
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-}
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-
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-static struct davinci_ops davinci_states[DAVINCI_CPUIDLE_MAX_STATES] = {
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- [1] = {
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- .enter = davinci_c2state_enter,
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- .exit = davinci_c2state_exit,
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- },
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-};
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-
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/* Actual code that puts the SoC in different idle states */
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static int davinci_enter_idle(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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- struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
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- struct davinci_ops *ops = cpuidle_get_statedata(state_usage);
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-
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- if (ops && ops->enter)
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- ops->enter();
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+ davinci_save_ddr_power(1, ddr2_pdown);
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index = cpuidle_wrap_enter(dev, drv, index,
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arm_cpuidle_simple_enter);
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- if (ops && ops->exit)
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- ops->exit();
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+ davinci_save_ddr_power(0, ddr2_pdown);
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return index;
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}
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@@ -123,7 +95,6 @@ static int __init davinci_cpuidle_probe(struct platform_device *pdev)
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ddr2_reg_base = pdata->ddr2_ctlr_base;
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ddr2_pdown = pdata->ddr2_pdown;
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- cpuidle_set_statedata(&device->states_usage[1], &davinci_states[1]);
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device->state_count = DAVINCI_CPUIDLE_MAX_STATES;
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