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@@ -20,6 +20,8 @@
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#include <linux/delay.h>
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#include <linux/percpu.h>
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#include <linux/of.h>
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+#include <linux/of_irq.h>
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+#include <linux/of_address.h>
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#include <asm/arch_timer.h>
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#include <asm/localtimer.h>
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@@ -474,14 +476,16 @@ static struct local_timer_ops exynos4_mct_tick_ops __cpuinitdata = {
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};
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#endif /* CONFIG_LOCAL_TIMERS */
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-static void __init exynos4_timer_resources(void)
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+static void __init exynos4_timer_resources(struct device_node *np)
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{
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struct clk *mct_clk;
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mct_clk = clk_get(NULL, "xtal");
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clk_rate = clk_get_rate(mct_clk);
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- reg_base = S5P_VA_SYSTIMER;
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+ reg_base = np ? of_iomap(np, 0) : S5P_VA_SYSTIMER;
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+ if (!reg_base)
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+ panic("%s: unable to ioremap mct address space\n", __func__);
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#ifdef CONFIG_LOCAL_TIMERS
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if (mct_int_type == MCT_INT_PPI) {
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@@ -498,30 +502,51 @@ static void __init exynos4_timer_resources(void)
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#endif /* CONFIG_LOCAL_TIMERS */
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}
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+static const struct of_device_id exynos_mct_ids[] = {
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+ { .compatible = "samsung,exynos4210-mct", .data = (void *)MCT_INT_SPI },
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+ { .compatible = "samsung,exynos4412-mct", .data = (void *)MCT_INT_PPI },
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+};
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+
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void __init exynos4_timer_init(void)
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{
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+ struct device_node *np = NULL;
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+ const struct of_device_id *match;
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+ u32 nr_irqs, i;
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+
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if (soc_is_exynos5440()) {
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arch_timer_of_register();
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return;
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}
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- if (soc_is_exynos4210()) {
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+#ifdef CONFIG_OF
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+ np = of_find_matching_node_and_match(NULL, exynos_mct_ids, &match);
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+#endif
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+ if (np) {
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+ mct_int_type = (u32)(match->data);
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+
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+ /* This driver uses only one global timer interrupt */
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+ mct_irqs[MCT_G0_IRQ] = irq_of_parse_and_map(np, MCT_G0_IRQ);
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+
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+ /*
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+ * Find out the number of local irqs specified. The local
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+ * timer irqs are specified after the four global timer
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+ * irqs are specified.
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+ */
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+#ifdef CONFIG_OF
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+ nr_irqs = of_irq_count(np);
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+#endif
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+ for (i = MCT_L0_IRQ; i < nr_irqs; i++)
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+ mct_irqs[i] = irq_of_parse_and_map(np, i);
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+ } else if (soc_is_exynos4210()) {
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mct_irqs[MCT_G0_IRQ] = EXYNOS4_IRQ_MCT_G0;
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mct_irqs[MCT_L0_IRQ] = EXYNOS4_IRQ_MCT_L0;
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mct_irqs[MCT_L1_IRQ] = EXYNOS4_IRQ_MCT_L1;
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mct_int_type = MCT_INT_SPI;
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- } else if (soc_is_exynos5250()) {
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- mct_irqs[MCT_G0_IRQ] = EXYNOS5_IRQ_MCT_G0;
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- mct_irqs[MCT_L0_IRQ] = EXYNOS5_IRQ_MCT_L0;
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- mct_irqs[MCT_L1_IRQ] = EXYNOS5_IRQ_MCT_L1;
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- mct_int_type = MCT_INT_SPI;
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} else {
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- mct_irqs[MCT_G0_IRQ] = EXYNOS4_IRQ_MCT_G0;
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- mct_irqs[MCT_L0_IRQ] = EXYNOS_IRQ_MCT_LOCALTIMER;
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- mct_int_type = MCT_INT_PPI;
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+ panic("unable to determine mct controller type\n");
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}
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- exynos4_timer_resources();
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+ exynos4_timer_resources(np);
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exynos4_clocksource_init();
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exynos4_clockevent_init();
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}
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