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@@ -19,6 +19,7 @@
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#include <linux/platform_device.h>
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#include <linux/mtd/physmap.h>
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+#include <linux/mtd/plat-ram.h>
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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#include <mach/common.h>
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@@ -30,6 +31,31 @@
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#include "devices.h"
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+/*
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+ * Phytec's PCM038 comes with 2MiB battery buffered SRAM,
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+ * 16 bit width
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+ */
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+
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+static struct platdata_mtd_ram pcm038_sram_data = {
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+ .bankwidth = 2,
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+};
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+
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+static struct resource pcm038_sram_resource = {
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+ .start = CS1_BASE_ADDR,
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+ .end = CS1_BASE_ADDR + 512 * 1024 - 1,
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+ .flags = IORESOURCE_MEM,
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+};
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+
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+static struct platform_device pcm038_sram_mtd_device = {
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+ .name = "mtd-ram",
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+ .id = 0,
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+ .dev = {
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+ .platform_data = &pcm038_sram_data,
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+ },
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+ .num_resources = 1,
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+ .resource = &pcm038_sram_resource,
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+};
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+
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/*
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* Phytec's phyCORE-i.MX27 comes with 32MiB flash,
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* 16 bit width
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@@ -164,11 +190,22 @@ static void gpio_fec_inactive(void)
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static struct platform_device *platform_devices[] __initdata = {
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&pcm038_nor_mtd_device,
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&mxc_w1_master_device,
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+ &pcm038_sram_mtd_device,
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};
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+/* On pcm038 there's a sram attached to CS1, we enable the chipselect here and
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+ * setup other stuffs to access the sram. */
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+static void __init pcm038_init_sram(void)
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+{
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+ __raw_writel(0x0000d843, CSCR_U(1));
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+ __raw_writel(0x22252521, CSCR_L(1));
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+ __raw_writel(0x22220a00, CSCR_A(1));
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+}
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+
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static void __init pcm038_init(void)
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{
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gpio_fec_active();
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+ pcm038_init_sram();
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mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
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mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
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