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@@ -68,8 +68,8 @@
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#define DRV_MODULE_NAME "tg3"
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#define PFX DRV_MODULE_NAME ": "
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-#define DRV_MODULE_VERSION "3.46"
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-#define DRV_MODULE_RELDATE "Dec 19, 2005"
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+#define DRV_MODULE_VERSION "3.47"
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+#define DRV_MODULE_RELDATE "Dec 28, 2005"
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#define TG3_DEF_MAC_MODE 0
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#define TG3_DEF_RX_MODE 0
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@@ -7151,8 +7151,13 @@ do { p = (u32 *)(orig_p + (reg)); \
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GET_REG32_LOOP(BUFMGR_MODE, 0x58);
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GET_REG32_LOOP(RDMAC_MODE, 0x08);
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GET_REG32_LOOP(WDMAC_MODE, 0x08);
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- GET_REG32_LOOP(RX_CPU_BASE, 0x280);
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- GET_REG32_LOOP(TX_CPU_BASE, 0x280);
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+ GET_REG32_1(RX_CPU_MODE);
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+ GET_REG32_1(RX_CPU_STATE);
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+ GET_REG32_1(RX_CPU_PGMCTR);
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+ GET_REG32_1(RX_CPU_HWBKPT);
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+ GET_REG32_1(TX_CPU_MODE);
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+ GET_REG32_1(TX_CPU_STATE);
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+ GET_REG32_1(TX_CPU_PGMCTR);
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GET_REG32_LOOP(GRCMBOX_INTERRUPT_0, 0x110);
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GET_REG32_LOOP(FTQ_RESET, 0x120);
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GET_REG32_LOOP(MSGINT_MODE, 0x0c);
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